Motorola MC74HC366AD, MC74HC366ADT Datasheet

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SEMICONDUCTOR TECHNICAL DATA

1

REV 0

 Motorola, Inc. 1997

1/97

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High–Performance Silicon–Gate CMOS

The MC74HC366A is identical in pinout to the LS366. The device inputs
are compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.

This device is a high–speed hex buffer with 3–state outputs and two
common active–low Output Enables. When either of the enables is high, the
buffer outputs are placed into high–impedance states. The HC366A has
inverting outputs.

• Output Drive Capability: 15 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2 to 6 V

• Low Input Current: 1 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 78 FETs or 19.5 Equivalent Gates

LOGIC DIAGRAM

A3

A4

A5

A0

A1

A2

2

4

6

10

12

14

OUTPUT ENABLE 1

1

15

PIN 16 = V

CC

PIN 8 = GND

OUTPUT ENABLE 2

Y3

Y4

Y5

Y0

Y1

Y2

3

5

7

9

11

13

This document contains information on a product under development. Motorola reserves the right to change or
discontinue this product without notice.

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PIN ASSIGNMENT

13

14

15

16

9

10

11

125

4

3

2

1

8

7

6

A4

Y5

A5

OUTPUT
ENABLE 2

V

CC

Y3

A3

Y4

A1

Y0

A0

OUTPUT

ENABLE 1

GND

Y2

A2

Y1

FUNCTION TABLE

Inputs Output

Enable Enable

12AY

LLLH
LLHL
HXXZ
XHXZ

X = don’t care
Z = high impedance

D SUFFIX

SOIC PACKAGE

16–LEAD

CASE 751B–05

N SUFFIX

PLASTIC PACKAGE

16–LEAD

CASE 648–08

ORDERING INFORMATION

MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT

Plastic
SOIC
TSSOP

DT SUFFIX

TSSOP PACKAGE

16–LEAD

CASE 948F–01

MC74HC366A

MOTOROLA High–Speed CMOS Logic Data

DL129 — Rev 6

2

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

V

CC

DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

V

in

DC Input Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

V

out

DC Output Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

I

in

DC Input Current, per Pin

± 20

mA

I

out

DC Output Current, per Pin

± 25

mA

I

CC

DC Supply Current, VCC and GND Pins

± 50

mA

Î

Î

Î

P

D

ОООООООООООО

Î

ОООООООООООО

Power Dissipation in Still Air, Plastic DIP†

SOIC Package†

TSSOP Package†

ÎÎÎÎ

Î

ÎÎÎÎ

750
500
450

Î

Î

Î

mW

Î

T

stg

ОООООООООООО

Storage Temperature

ÎÎÎÎ

– 65 to + 150

Î

_

C

Î

Î

T

L

ОООООООООООО

Î

Lead Temperature, 1 mm from Case for 10 Seconds

Plastic DIP, SOIC or TSSOP Package

ÎÎÎÎ

Î

260

Î

Î

_

C

*Maximum Ratings are those values beyond which damage to the device may occur .

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C

SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

ÎÎ

V

CC

ОООООООООООО

DC Supply Voltage (Referenced to GND)

Î

2.0Î6.0ÎV

Vin, V

out

DC Input Voltage, Output Voltage (Referenced to GND)

0

V

CC

V

T

A

Operating Temperature, All Package Types

– 55

+ 125

_

C

ÎÎ

Î

ÎÎ

Î

tr, t

f

ОООООООООООО

Î

ОООООООООООО

Î

Input Rise and Fall Time VCC = 2.0 V

(Figure 1) VCC = 4.5 V

VCC = 6.0 V

Î

Î

Î

Î

0
0
0

Î

Î

Î

Î

1000

500
400

Î

Î

Î

Î

ns

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

ÎÎ

Symbol

ООООООО

Parameter

ООООООО

Test Conditions

ÎÎ

V

CC

V

ÎÎ

– 55 to

25_C

ÎÎ

v

85_C

ÎÎ

v

125_C

Î

Unit

ÎÎ

Î

ÎÎ

Î

V

IH

ООООООО

Î

ООООООО

Î

Minimum High–Level Input
Voltage

ООООООО

Î

ООООООО

Î

V

out

= 0.1 V

|I

out

| v 20 µA

ÎÎ

Î

ÎÎ

Î

2.0

4.5

6.0

ÎÎ

ÎÎ

1.5

3.15

4.2

ÎÎ

Î

ÎÎ

Î

1.5

3.15

4.2

ÎÎ

Î

ÎÎ

Î

1.5

3.15

4.2

Î

Î

Î

Î

V

ÎÎ

Î

V

IL

ООООООО

Î

Maximum Low–Level Input
Voltage

ООООООО

Î

V

out

= VCC – 0.1 V

|I

out

| v 20 µA

ÎÎ

Î

2.0

4.5

6.0

ÎÎ

0.3

0.9

1.2

ÎÎ

Î

0.3

0.9

1.2

ÎÎ

Î

0.3

0.9

1.2

Î

Î

V

ÎÎ

Î

V

OH

ООООООО

Î

Minimum High–Level Output
Voltage

ООООООО

Î

Vin = V

IL

|I

out

| v 20 µA

ÎÎ

Î

2.0

4.5

6.0

ÎÎ

1.9

4.4

5.9

ÎÎ

Î

1.9

4.4

5.9

ÎÎ

Î

1.9

4.4

5.9

Î

Î

V

ÎÎÎОООООООÎООООООО

Î

Vin = V

IL

|I

out

| v 6.0 mA

|I

out

| v 7.8 mA

ÎÎ

Î

4.5

6.0

ÎÎ

3.98

5.48

ÎÎ

Î

3.84

5.34

ÎÎ

Î

3.70

5.20

Î

Î

ÎÎ

Î

ÎÎ

Î

V

OL

ООООООО

Î

ООООООО

Î

Maximum Low–Level Output
Voltage

ООООООО

Î

ООООООО

Î

Vin = V

IH

|I

out

| v 20 µA

ÎÎ

Î

ÎÎ

Î

2.0

4.5

6.0

ÎÎ

ÎÎ

0.1

0.1

0.1

ÎÎ

Î

ÎÎ

Î

0.1

0.1

0.1

ÎÎ

Î

ÎÎ

Î

0.1

0.1

0.1

Î

Î

Î

Î

V

Vin = V

IH

|I

out

| v 6.0 mA

|I

out

| v 7.8 mA

4.5

6.0

0.26

0.26

0.33

0.33

0.40

0.40

I

in

Maximum Input Leakage Current

Vin = VCC or GND

6.0

± 0.1

± 1.0

± 1.0

µA

This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir­cuit. For proper operation, Vin and
V

out

should be constrained to the

range GND v (Vin or V

out

) v VCC.

Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.