Motorola MC74HC27AN, MC74HC27AD, MC74HC27ADT Datasheet
SEMICONDUCTOR TECHNICAL DATA
1
REV 0.1
Motorola, Inc. 1998
1/98
High–Performance Silicon–Gate CMOS
The MC74HC27A is identical in pinout to the LS27. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 42 FETs or 10.5 Equivalent Gates
LOGIC DIAGRAM
PIN 14 = V
CC
PIN 7 = GND
Y = A + B + C
A1
13
2
1
B1
C1
Y1
12
A2
5
4
3
B2
C2
Y2
6
A3
11
10
9
B3
C3
Y3
8
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
B
L
X
H
X
FUNCTION TABLE
PIN ASSIGNMENT
A
L
X
X
H
11
12
13
14
8
9
105
4
3
2
1
7
6
B3
C3
Y1
C1
V
CC
Y3
A3
B2
A2
B1
A1
GND
Y2
C2
Inputs Output
C
L
H
X
X
Y
H
L
L
L
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ORDERING INFORMATION
MC74HCXXAN
MC74HCXXAD
MC74HCXXADT
Plastic
SOIC
TSSOP
1
14
1
14
1
14
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
MC74HC27A
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
V
in
DC Input Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
V
out
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
I
in
DC Input Current, per Pin
± 20
mA
I
out
DC Output Current, per Pin
± 25
mA
I
CC
DC Supply Current, VCC and GND Pins
± 50
mA
Î
Î
Î
P
D
ОООООООООООО
Î
ОООООООООООО
Power Dissipation in Still Air Plastic DIP†
SOIC Package†
TSSOP Package†
ÎÎÎÎ
Î
ÎÎÎÎ
750
500
450
Î
Î
Î
mW
Î
T
stg
ОООООООООООО
Storage Temperature
ÎÎÎÎ
– 65 to + 150
Î
_
C
Î
Î
T
L
ОООООООООООО
Î
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP, SOIC or TSSOP Package)
ÎÎÎÎ
Î
260
Î
Î
_
C
*Maximum Ratings are those values beyond which damage to the device may occur .
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: –7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
Vin, V
out
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
– 55
+ 125
_
C
ÎÎ
Î
ÎÎ
Î
tr, t
f
ОООООООООООО
Î
ОООООООООООО
Î
Input Rise and Fall Time VCC = 2.0 V
(Figure 1) VCC = 3.0 V
VCC = 4.5 V
VCC = 6.0 V
Î
Î
Î
Î
0
0
0
0
Î
Î
Î
Î
1000
600
500
400
Î
Î
Î
Î
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
ÎÎ
Î
Symbol
ООООООО
Î
Parameter
ООООООО
Î
Test Conditions
ÎÎ
Î
V
CC
V
ÎÎ
– 55 to
25_C
ÎÎ
Î
v
85_C
ÎÎ
Î
v
125_C
Î
Î
Unit
ÎÎ
Î
ÎÎ
Î
V
IH
ООООООО
Î
ООООООО
Î
Minimum High–Level Input
Voltage
ООООООО
Î
ООООООО
Î
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
ÎÎ
Î
ÎÎ
Î
2.0
3.0
4.5
6.0
ÎÎ
ÎÎ
1.5
2.1
3.15
4.2
ÎÎ
Î
ÎÎ
Î
1.5
2.1
3.15
4.2
ÎÎ
Î
ÎÎ
Î
1.5
2.1
3.15
4.2
Î
Î
Î
Î
V
ÎÎ
Î
ÎÎ
Î
V
IL
ООООООО
Î
ООООООО
Î
Maximum Low–Level Input
Voltage
ООООООО
Î
ООООООО
Î
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
ÎÎ
Î
ÎÎ
Î
2.0
3.0
4.5
6.0
ÎÎ
ÎÎ
0.5
0.9
1.35
1.8
ÎÎ
Î
ÎÎ
Î
0.5
0.9
1.35
1.8
ÎÎ
Î
ÎÎ
Î
0.5
0.9
1.35
1.8
Î
Î
Î
Î
V
ÎÎ
Î
V
OH
ООООООО
Î
Minimum High–Level Output
Voltage
ООООООО
Î
Vin = VIH or V
IL
|I
out
| v 20 µA
ÎÎ
Î
2.0
4.5
6.0
ÎÎ
1.9
4.4
5.9
ÎÎ
Î
1.9
4.4
5.9
ÎÎ
Î
1.9
4.4
5.9
Î
Î
V
ÎÎÎОООООООÎООООООО
Î
Vin = VIH or VIL|I
out
| v 2.4 mA
|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
ÎÎ
Î
3.0
4.5
6.0
ÎÎ
2.48
3.98
5.48
ÎÎ
Î
2.34
3.84
5.34
ÎÎ
Î
2.20
3.70
5.20
Î
Î
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
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