Motorola MC74HC175ADT, MC74HC175AD, MC74HC175AN Datasheet

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SEMICONDUCTOR TECHNICAL DATA

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High–Performance Silicon–Gate CMOS

The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This device consists of four D flip–flops with common Reset and Clock inputs, and separate D inputs. Reset (active–low) is asynchronous and occurs when a low level is applied to the Reset input. Information at a D input is transferred to the corresponding Q output on the next positive going edge of the Clock input.

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2 to 6 V

• Low Input Current: 1 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity 166 FETs or 41.5 Equivalent Gates

LOGIC DIAGRAM

CLOCK

DATA

INPUTS

D0 D1 D2

RESET

5 12 13

10 11 15

Q1 Q2

Q2 Q3 Q3

INVERTING

AND

NONINVERTING

OUTPUTS

ORDERING INFORMATION

MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT

PIN ASSIGNMENT

Q0 Q0 D0

D1 Q1 Q1

GND

1 2 3 4

6 7 8

RESET

N SUFFIX

PLASTIC PACKAGE

CASE 648–08

D SUFFIX

SOIC PACKAGE

CASE 751B–05

DT SUFFIX

TSSOP PACKAGE

CASE 948F–01

Plastic SOIC TSSOP

125

CLOCK

PIN 16 = V PIN 8 = GND

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.

2/98

 Motorola, Inc. 1998

FUNCTION TABLE

Inputs Outputs

Reset Clock D Q Q

LXXLH HHHL HLLH H L X No Change

REV 0.1

MC74HC175A

MAXIMUM RATINGS*

Symbol

I I

DC Supply Voltage (Referenced to GND)

DC Input Voltage (Referenced to GND)

DC Output Voltage (Referenced to GND)

out

DC Input Current, per Pin

DC Output Current, per Pin

out

DC Supply Current, VCC and GND Pins

Power Dissipation in Still Air, Plastic DIP†

ОООООООООООО

Storage Temperature

stg

ОООООООООООО

Lead Temperature, 1 mm from Case for 10 Seconds

ОООООООООООО

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C

SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

Parameter

SOIC Package†

TSSOP Package†

(Plastic DIP, SOIC or TSSOP Package)

Value

– 0.5 to + 7.0 – 1.5 to VCC + 1.5 – 0.5 to VCC + 0.5

± 20 ± 25 ± 50

750 500

ÎÎÎÎ

450

ÎÎÎÎ

– 65 to + 150

ÎÎÎÎ

260

Unit

V V

V mA mA mA

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V

should be constrained to the

out

range GND v (Vin or V

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

) v VCC.

out

RECOMMENDED OPERATING CONDITIONS

Symbol

Vin, V

tr, t

ÎÎ

DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND)

out

Operating Temperature, All Package Types Input Rise and Fall Time VCC = 2.0 V

(Figure 1) VCC = 3.0 V

ОООООООООООО

Parameter

VCC = 4.5 V VCC = 6.0 V

Min

2.0 0

– 55

0 0

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

ÎÎ

Symbol

ÎÎ

ООООООО

Parameter

Minimum High–Level Input Voltage

ООООООО

Maximum Low–Level Input Voltage

ООООООО

Minimum High–Level Output Voltage

ООООООО

Test Conditions

= 0.1 V or VCC – 0.1 V

out

| v 20 µA

ООООООО

out

ООООООО

= 0.1 V or VCC – 0.1 V

out

| v 20 µA

out

ООООООО

Vin = VIH or V |I

| v 20 µA

out

ООООООО

Vin = VIH or VIL|I

ООООООО

| v 2.4 mA

out

| v 4.0 mA

out

| v 5.2 mA

out

Max

6.0

+ 125

1000

600

500 400

Unit

V V

ÎÎ

2.0

3.0

ÎÎ

4.5

ÎÎ

6.0

2.0

3.0

ÎÎ

4.5

ÎÎ

6.0

2.0

4.5

ÎÎ

6.0

3.0

ÎÎ

4.5

6.0

ÎÎ

Guaranteed Limit

– 55 to

ÎÎ

25_C

ÎÎ

1.5

2.1

ÎÎ

3.15

4.2

ÎÎ

0.5

0.9

ÎÎ

1.35

1.80

ÎÎ

1.9

4.4

ÎÎ

5.9

ÎÎ

2.48

ÎÎ

3.98

5.48

ÎÎ

85_C

1.5

2.1

3.15

4.2

0.5

0.9

1.35

1.80

1.9

4.4

5.9

2.34

3.84

5.34

ÎÎ

125_C

1.5

2.1

ÎÎ

3.15

ÎÎ

4 2

0.5

0.9

ÎÎ

1.35

ÎÎ

1.80

1.9

4.4

ÎÎ

5.9

2.20

ÎÎ

3.70

5.20

ÎÎ

Unit

MOTOROLA ECLinPS and ECLinPS Lite

DL140 — Rev 3

MC74HC175A

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

Symbol

ÎÎ

Parameter

Maximum Low–Level Output Voltage

ООООООО

Maximum Input Leakage Current

ООООООО

Maximum Quiescent Supply

ООООООО

Current (per Package)

Test Conditions

Vin = VIH or V |I

| v 20 µA

out

ООООООО

Vin = VIH or VIL|I

ООООООО

Vin = VCC or GND

ООООООО

Vin = VCC or GND

ООООООО

= 0 µA

out

| v 2.4 mA

out

| v 4.0 mA

out

| v 5.2 mA

out

2.0

4.5

ÎÎ

6.0

3.0

4.5

ÎÎ

6.0

ÎÎ

6.0

ÎÎ

6.0

ÎÎ

NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

– 55 to

25_C

0.1

ÎÎ

0.1

ÎÎ

0.26

ÎÎ

± 0.1

ÎÎ

ÎÎ4ÎÎ

0.26

ÎÎ

± 1.0

ÎÎ

85_C

0.1

0.33

125_C

0.1

ÎÎ

0.1

0.40

ÎÎ

0.40

ÎÎ

± 1.0

ÎÎ

160

ÎÎ

Unit

µA µA

AC ELECTRICAL CHARACTERISTICS (C

= 50 pF, Input tr = tf = 6 ns)

Guaranteed Limit

Symbol

max

ÎÎ

PLH

ÎÎ

PHL

ÎÎ

PHL

ÎÎ

TLH

ÎÎ

THL

ÎÎ

Parameter

Maximum Clock Frequency (50% Duty Cycle)

ООООООООООООООО

(Figures 1 and 4)

ООООООООООООООО

Maximum Propagation Delay, Clock to Q or Q

ООООООООООООООО

(Figures 1 and 4)

ООООООООООООООО

Maximum Propagation Delay, Reset to Q or Q

(Figures 2 and 4)

ООООООООООООООО

Maximum Output Transition Time, Any Output

(Figures 1 and 4)

ООООООООООООООО

Maximum Input Capacitance

2.0

ÎÎ

3.0

4.5

ÎÎ

6.0

2.0

ÎÎ

3.0

4.5

ÎÎ

6.0

2.0

3.0

ÎÎ

4.5

ÎÎ

6.0

2.0

3.0

ÎÎ

4.5

ÎÎ

6.0 —

– 55 to

25_C

ÎÎ

10 30

ÎÎ

150

ÎÎ

75 30

ÎÎ

125

ÎÎ

21 75

ÎÎ

13 10

85_Cv 125_C

4.8

ÎÎ

8.0 24

ÎÎ

190

ÎÎ

90 38

ÎÎ

155

ÎÎ

26 95

ÎÎ

16 10

ÎÎ

225

ÎÎ

110

ÎÎ

190 110

ÎÎ

110

ÎÎ

NOTES:

1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

20 24

45 38

38 32

36 22 19

Unit

4 6

MHz

Power Dissipation Capacitance (Per Flip–Flop)*

*Used to determine the no–load dynamic power consumption: PD = CPD V

Motorola High–Speed CMOS Data Book (DL129/D).

ECLinPS and ECLinPS Lite DL140 — Rev 3

Typical @ 25°C, VCC = 5.0 V

f + ICC VCC. For load considerations, see Chapter 2 of the

3 MOTOROLA

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