Datasheet MC74ACT652DWR2, MC74ACT652N, MC74ACT652DW, MC74AC652N, MC74AC652DW Datasheet (Motorola)

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5-1
FACT DATA
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The MC74AC/ACT652 consists of registered bus transceiver circuits, with outputs, D-type flip-flops and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin (CAB or CBA). The four fundamental data handling functions available are illustrated in Figures 1 to 4.
Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data Transfers
Choice of True and Inverting Data Paths
3-State Outputs
300 mil Slim Dual-in-Line Package
Outputs Source/Sink 24 mA
• ′ACT652 Has TTL Compatible Inputs
TRANSFER
FROM REGISTER TO BUS
REG REG
A-BUS
B-BUS
REAL TIME TRANSFER
A-BUS TO B-BUS
REG REG
A-BUS
B-BUS
REAL TIME TRANSFER
B-BUS TO A-BUS
REG REG
A-BUS
B-BUS
Figure 1 Figure 2
STORAGE
FROM BUS TO REGISTER
REG REG
A-BUS
B-BUS
Figure 3 Figure 4
MAXIMUM RATINGS*
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) –0.5 to +7.0 V
V
in
DC Input Voltage (Referenced to GND) –0.5 to VCC + 0.5 V
V
out
DC Output Voltage (Referenced to GND) –0.5 to VCC + 0.5 V
I
in
DC Input Current, per Pin ± 20 mA
I
out
DC Output Sink/Source Current, per Pin ± 50 mA
I
CC
DC VCC or GND Current per Output Pin ± 50 mA
T
stg
Storage Temperature –65 to +150 °C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.


OCTAL TRANSCEIVER/
REGISTER WITH 3-STATE
OUTPUTS (NON-INVERTING)
N SUFFIX
CASE 724-03
PLASTIC PACKAGE
1
24
PIN NAMES
Data Register A Inputs Data Register A Outputs Data Register B Inputs Data Register B Outputs Clock Pulse Inputs Transmit/Receive Inputs Output Enable Inputs
A0 – A
7
B0 – B
7
CAB, CBA SAB, SBA GAB, GBA
1
24
DW SUFFIX
CASE 751E-04
SOIC PACKAGE
MC74AC652 MC74ACT652
5-2
FACT DATA
Pinout: 24-Lead Plastic Package (Top View)
2324 22 21 20 19 18
21 3 4 5 6 7
V
CC
17
8
16
9
15
10
CBA SBA GBA
B0B1B2B3B4B
5
CAB SAB GAB A0A1A2A3A4A5A
6
14
11
13
12
B6B
7
A7GND
B0B1B2B3B4B
5
A0A1A2A3A4A5A
6
B6B
7
A
7
CAB SAB GAB CBA SBA GBA
D
0
C
0
D
0
C
0
CAB
SBA
CBA
SAB
GABGBA
B
0
A
0
1 OF 8 CHANNELS
TO 7 OTHER CHANNELS
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
LOGIC SYMBOL
LOGIC DIAGRAM
MC74AC652 MC74ACT652
5-3
FACT DATA
FUNCTION TABLE
Inputs Data I/O*
GAB GBA CAB CBA SAB SBA A0 – A
7
B0 – B
7
Operation or Function
L H H or L H or L X X
Isolation
L H X X
Input
Input
Store A and B Data
X H H or L X X Input Unspecified* Store A, Hold B H H X** X Input Output Store A in Both Registers
L X H or L X X Unspecified* Input Hold A, Store B L L X X** Output Input Store B in Both Registers
L L X X X L
Real-Time B Data to A Bus
L L X H or L X H
Output
Input
Stored B Data to A Bus
H H X X L X
Real-Time A Data to B Bus
H H H or L X H X
Input
Output
Stored A Data to B Bus
Stored A Data to B Bus and
HLH or L
H or LHH
Output
Output
Stored A Data to B Bus and Stored B Data to A Bus
* The data output functions may be enabled or disabled by various signals at the GBA and GAB inputs. Data input functions are always enabled; i.e., data at the
bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
** Select control = L: clocks can occur simultaneously.
H = HIGH Voltage Level; L = LOW Voltage Level; X = Immaterial; ⇑ = LOW-to-HIGH Transition
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Typ Min Unit
AC 2.0 5.0 6.0
VCCSupply Voltage
ACT 4.5 5.0 5.5
V
Vin, V
out
DC Input Voltage, Output Voltage (Ref. to GND) 0 V
CC
V
VCC @ 3.0 V 150
Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs
VCC @ 4.5 V 40 ns/V
r
, t
f
AC Devices except Schmitt Inputs
VCC @ 5.5 V 25 VCC @ 4.5 V 10
tr, t
f
Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs
VCC @ 5.5 V 8.0
ns/V
T
J
Junction Temperature (PDIP) 140 °C
T
A
Operating Ambient Temperature Range –40 25 85 °C
I
OH
Output Current — HIGH –24 mA
I
OL
Output Current — LOW 24 mA
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
tr, t
f
Input Rise and Fall Time (Note 2)
MC74AC652 MC74ACT652
5-4
FACT DATA
DC CHARACTERISTICS
74AC 74AC
Symbol
Parameter
V
CC
(V)
TA = +25°C
TA =
–40°C to +85°C
Unit
Conditions
Typ Guaranteed Limits
V
IH
3.0 1.5 2.1 2.1 V
OUT
= 0.1 V
4.5 2.25 3.15 3.15 V or VCC – 0.1 V
5.5 2.75 3.85 3.85
V
IL
3.0 1.5 0.9 0.9 V
OUT
= 0.1 V
4.5 2.25 1.35 1.35 V or VCC – 0.1 V
5.5 2.75 1.65 1.65
V
OH
3.0 2.99 2.9 2.9 I
OUT
= – 50 µA
4.5 4.49 4.4 4.4 V
5.5 5.49 5.4 5.4 *VIN = VIL or V
IH
3.0 2.56 2.46
– 12 mA
4.5 3.86 3.76
V
I
OH
– 24 mA
5.5 4.86 4.76 – 24 mA
V
OL
3.0 0.002 0.1 0.1 I
OUT
= 50 µA
4.5 0.001 0.1 0.1 V
5.5 0.001 0.1 0.1 *VIN = VIL or V
IH
3.0 0.36 0.44
12 mA
4.5 0.36 0.44
V
I
OL
24 mA
5.5 0.36 0.44 24 mA
I
IN
5.5
±0.1
±1.0
µA
I
= VCC, GND
I
OZT
VI (OE) = VIL, V
IH
5.5 ±0.6 ±6.0 µA VI = VCC, GND
Current VO= VCC, GND
I
OLD
5.5 75 mA V
OLD
= 1.65 V Max
I
OHD
Output Current
5.5 –75 mA V
OHD
= 3.85 V Min
I
CC
5.5
8.080µA
IN
= VCC or GND
* All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one input loaded at a time. Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V.
Minimum High Level Input Voltage
Maximum Low Level Input Voltage
Minimum High Level Output Voltage
Minimum Low Level Output Voltage
Maximum Input Leakage Current
VI = VCC, GND
Maximum 3-State
†Minimum Dynamic
Maximum Quiescent Supply Current
VIN = VCC or GND
MC74AC652 MC74ACT652
5-5
FACT DATA
AC CHARACTERISTICS
74AC 74AC
Symbol
Parameter
VCC*
(V)
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Unit
Min Max Min Max
3.0 4.0 17.0 3.0 19.0
t
PLH
5.0 2.5 12.0 2.0 14.0
ns
3.0 3.0 14.5 2.5 16.5
t
PHL
5.0 2.0 10.5 1.5 12.0
ns
3.0 3.0 14.0 2.5 16.0
t
PLH
5.0 2.0 9.5 1.5 11.0
ns
3.0 2.5 13.0 2.0 15.0
t
PHL
5.0 1.5 9.0 1.0 10.5
ns
3.0 3.0 14.0 2.5 16.0
t
PLH
5.0 2.5 10.0 2.0 11.5
ns
3.0 2.5 13.5 2.0 15.5
t
PHL
5.0 2.0 10.0 1.5 11.5
ns
3.0 2.5 12.0 2.0 13.5
t
PZH
to A
n
5.0 1.5 9.0 1.0 10.0
ns
3.0 2.5 12.0 2.0 14.0
t
PZL
to A
n
5.0 1.5 9.0 1.0 10.5
ns
3.0 3.0 13.0 2.5 14.0
t
PHZ
to A
n
5.0 2.0 11.0 1.5 12.0
ns
3.0 2.5 12.5 2.0 14.0
t
PLZ
to A
n
5.0 2.0 10.5 1.5 12.0
ns
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
Propagation Delay CPBA or CPAB to An or B
Propagation Delay CPBA or CPAB to An or B
Propagation Delay A or B to Bn or A
Propagation Delay A or B to Bn or A
Propagation Delay SBA or SAB to An or B
Propagation Delay SBA or SAB to An or B
Output Enable Time OEBA
Output Enable Time OEBA
Output Disable Time OEBA
Output Disable Time OEBA
n
n
n
n
n
n
MC74AC652 MC74ACT652
5-6
FACT DATA
DC CHARACTERISTICS
74ACT 74ACT
Symbol
Parameter
V
CC
(V)
TA = +25°C
TA =
–40°C to +85°C
Unit
Conditions
Typ Guaranteed Limits
V
IH
4.5 1.5 2.0 2.0
V
OUT
= 0.1 V
5.5 1.5 2.0 2.0
V
or VCC – 0.1 V
V
IL
4.5 1.5 0.8 0.8
V
OUT
= 0.1 V
5.5 1.5 0.8 0.8
V
or VCC – 0.1 V
V
OH
4.5 4.49 4.4 4.4
I
OUT
= – 50 µA
5.5 5.49 5.4 5.4
V
*VIN = VIL or V
IH
4.5 3.86 3.76 V
– 24 mA
5.5 4.86 4.76
I
OH
– 24 mA
V
OL
4.5 0.001 0.1 0.1
I
OUT
= – 50 µA
5.5 0.001 0.1 0.1
V
*VIN = VIL or V
IH
4.5 0.36 0.44 V
– 24 mA
5.5 0.36 0.44
I
OH
– 24 mA
I
IN
5.5
±0.1
±1.0
µA
I
= VCC, GND
I
CCT
Additional Max. ICC/Input 5.5 0.6 1.5 mA VI = VCC – 2.1 V
I
OZT
VI (OE) = VIL, V
IH
5.5 ±0.6 ±6.0
VI = VCC, GND
Current VO = VCC, GND
I
OLD
5.5 75 mA V
OLD
= 1.65 V Max
I
OHD
Output Current
5.5 –75 mA V
OHD
= 3.85 V Min
I
CC
5.5
8.080µA
IN
= VCC or GND
* All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one input loaded at a time.
Minimum High Level Input Voltage
Maximum Low Level Input Voltage
Minimum High Level Output Voltage
Minimum Low Level Output Voltage
Maximum Input Leakage Current
VI = VCC, GND
Maximum 3-State
†Minimum Dynamic
Maximum Quiescent Supply Current
µA
VIN = VCC or GND
MC74AC652 MC74ACT652
5-7
FACT DATA
AC CHARACTERISTICS
74ACT 74ACT
Symbol
Parameter
VCC*
(V)
TA = +25°C CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Unit
Min Max Min Max
t
PLH
5.0
4.0
14.5
3.5
16.5
ns
t
PHL
5.0
3.5
14.5
3.0
16.5
ns
t
PLH
5.0
2.5
11.5
2.0
13.0
ns
t
PHL
5.0
2.5
11.5
2.0
13.0
ns
t
PLH
5.0
2.5
12.0
2.0
13.5
ns
t
PHL
5.0
3.0
12.0
2.5
13.5
ns
t
PZH
to A
n
5.0
2.0
11.5
1.5
13.0
ns
t
PZL
to A
n
5.0
2.5
11.5
2.0
13.0
ns
t
PHZ
to A
n
5.0
3.0
13.0
2.5
14.0
ns
t
PLZ
to A
n
5.0
2.5
12.5
2.0
14.0
ns
t
PZH
5.0
2.5
12.0
2.0
13.5
ns
t
PZL
5.0
2.5
12.0
2.0
13.5
ns
t
PHZ
5.0
3.5
13.5
3.0
14.5
ns
t
PLZ
5.0
3.0
13.5
2.5
15.0
ns
t
s
5.0
7.0
8.0
ns
t
h
5.0
2.5
2.5
ns
t
w
5.0
6.0
7.0
ns
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol Parameter
74ACT
Typ
Unit Test Conditions
C
IN
Input Capacitance 4.5 pF VCC = 5.0 V
C
I/O
Input/Output Capacitance 15 pF VCC = 5.0 V
C
PD
Power Dissipation Capacitance 60.0 pF VCC = 5.0 V
Propagation Delay CPBA or CPAB to An or B
Propagation Delay CPBA or CPAB to An or B
Propagation Delay A or B to Bn or A
Propagation Delay A or B to Bn or A
Propagation Delay SBA or SAB to An or B
Propagation Delay SBA or SAB to An or B
Output Enable Time OEBA
Output Enable Time OEBA
Output Disable Time OEBA
Output Disable Time OEBA
Output Enable time OEAB to B
Output Enable Time OEAB to B
Output Enable Time OEAB to B
Output Enable Time OEAB to B
Setup Time, HIGH or LOW An or Bn to CPBA or CPAB
Hold Time, HIGH or LOW An or Bn to CPBA or CPAB
CPAB, CPBA Pulse Width HIGH or LOW
n
n
n
n
n
n
n
n
n
n
MC74AC652 MC74ACT652
5-8
FACT DATA
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC DIP PACKAGE
CASE 724–03
ISSUE D
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751E–04
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION.
–A–
–B– P12X
D24X
12
1324
1
M
0.010 (0.25) B
M
S
A
M
0.010 (0.25) B
S
T
–T–
G
22X
SEATING PLANE
K
C
R
X 45
_
M
F
J
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 15.25 15.54 0.601 0.612 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.41 0.90 0.016 0.035 G 1.27 BSC 0.050 BSC J 0.23 0.32 0.009 0.013 K 0.13 0.29 0.005 0.011 M 0 8 0 8 P 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029
____
NOTES:
1. CHAMFERED CONTOUR OPTIONAL.
2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.
3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
4. CONTROLLING DIMENSION: INCH.
–A–
–B–
24 13
12
1
–T–
SEATING PLANE
24 PL
K
E
F
N
C
D
G
M
A
M
0.25 (0.010) T
24 PLJ
M
B
M
0.25 (0.010) T
L
M
NOTE 1
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 1.230 1.265 31.25 32.13 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.020 0.38 0.51
E 0.050 BSC 1.27 BSC F 0.040 0.060 1.02 1.52
G 0.100 BSC 2.54 BSC
J 0.007 0.012 0.18 0.30
K 0.110 0.140 2.80 3.55
L 0.300 BSC 7.62 BSC M 0 15 0 15 N 0.020 0.040 0.51 1.01
_ _ _ _
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MC74AC652/D
*MC74AC652/D*
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