MOTOROLA MC74AC194, MC74ACT194 Technical data

MC74AC194

4 Bit Bidirectional

Universal Shift Register

The MC74AC194/74ACT194 is a high-speed 4-bit bidirectional universal shift register. As a high-speed multifunctional, sequential building block, it is useful in a wide variety of applications. It may be used in serial-serial, shift left, shift right, serial-parallel, parallel-serial, and parallel-parallel data register transfers. The ′AC/ACT194 is similar in operation to the ′AS195 universal shift register, with added features of shift left without external connections and hold (do nothing) modes of operation.

•Typical Shift Frequency of 150 MHz

•Asynchronous Master Reset

•Hold (Do Nothing) Mode

•Fully Synchronous Serial or Parallel Data Transfers

FUNCTIONAL DESCRIPTION

The MC74AC/74ACT194 contains four edge-triggered D flip-flops and the necessary interstage logic to synchronously perform shift right, shift left, parallel load and hold operations. Signals applied to the Select (S0, S1) inputs determine the type of operation, as shown in the Mode Select Table. Signals on the Select, Parallel data (P0±P3) and Serial data (DSR, DSL) inputs can change when the clock is in either state, provided only that the recommended setup and hold times, with respect to the clock rising edge, are observed. A LOW signal on Master Reset (MR) overrides all other inputs and forces the outputs LOW.

MODE SELECT TABLE

Operating

Inputs

Outputs

Mode

MR

S1

S0

DSR

DSL

Pn

Q0

Q1

Q2

Q3

Reset

L

X

X

X

X

X

L

L

L

L

Hold

H

l

l

X

X

X

q0

q1

q2

q3

Shift Left

H

h

l

X

l

X

q1

q2

q3

L

H

h

l

X

h

X

q1

q2

q3

H

Shift Right

H

l

h

l

X

X

L

q0

q1

q2

H

l

h

h

X

X

H

q0

q1

q2

Parallel Load

H

h

h

X

X

pn

p0

p1

p2

p3

l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition. h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition.

Pn (qn) = Lower case letters indicate the state of the referenced input (or output) one setup time prior to the LOW-to-HIGH clock transition.

H = HIGH Voltage Level

L = LOW Voltage Level X = Immaterial

MC74AC194

MC74ACT194

4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER

N SUFFIX

CASE 648-08

PLASTIC

D SUFFIX

CASE 751B-05

PLASTIC

																				VCC
MR						1												16
DSR						2												15		Q0
		P0				3												14		Q1
		P				4												13		Q	2
1
		P2				5												12		Q3
		P				6												11		CP
3
DSL						7												10		S1
GND						8												9		S0
				2					3		4		5		6		7
						DSR P0 P1 P2 P3 DSL
9						S0

10S1

11CP MR Q0 Q1 Q2 Q3

1 15 14 13 12

FACT DATA

5-1

	MC74AC194 MC74ACT194
	LOGIC DIAGRAM
P0	P1	P2	P3
S1
S0
D			DSR
SR
S Q0	S Q1	S Q2	S Q3
CP	CP	CP	CP
R	R	R	R
CLEAR	CLEAR	CLEAR	CLEAR
CP
MR
Q0	Q1	Q2	Q3

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

MAXIMUM RATINGS*

Symbol	Parameter	Value	Unit
VCC	DC Supply Voltage (Referenced to GND)	±0.5 to +7.0	V
Vin	DC Input Voltage (Referenced to GND)	±0.5 to VCC +0.5	V
Vout	DC Output Voltage (Referenced to GND)	±0.5 to VCC +0.5	V
Iin	DC Input Current, per Pin	±20	mA
Iout	DC Output Sink/Source Current, per Pin	±50	mA
ICC	DC VCC or GND Current per Output Pin	±50	mA
Tstg	Storage Temperature	±65 to +150	°C

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

FACT DATA

5-2

MC74AC194 MC74ACT194

RECOMMENDED OPERATING CONDITIONS

	Symbol	Parameter		Min	Typ	Max	Unit
	VCC	Supply Voltage	′AC	2.0	5.0	6.0	V
			′ACT	4.5	5.0	5.5
	Vin, Vout	DC Input Voltage, Output Voltage (Ref. to GND)		0		VCC	V
		Input Rise and Fall Time (Note 1)	VCC @ 3.0 V		150
	tr, tf		VCC @ 4.5 V		40		ns/V
		′AC Devices except Schmitt Inputs
			VCC @ 5.5 V		25
	tr, tf	Input Rise and Fall Time (Note 2)	VCC @ 4.5 V		10		ns/V
		′ACT Devices except Schmitt Inputs	VCC @ 5.5 V		8.0
	TJ	Junction Temperature (PDIP)				140	°C
	TA	Operating Ambient Temperature Range		±40	25	85	°C
	IOH	Output Current Ð High				±24	mA
	IOL	Output Current Ð Low				24	mA

1.Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.

2.Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.

DC CHARACTERISTICS

			74AC		74AC
Symbol	Parameter	VCC	TA = +25°C		TA =	Unit		Conditions
		(V)			±40°C to +85°C
			Typ	Guaranteed Limits
VIH	Minimum High Level	3.0	1.5	2.1	2.1		VOUT = 0.1 V
	Input Voltage	4.5	2.25	3.15	3.15	V	or VCC ± 0.1 V
		5.5	2.75	3.85	3.85
VIL	Maximum Low Level	3.0	1.5	0.9	0.9		VOUT = 0.1 V
	Input Voltage	4.5	2.25	1.35	1.35	V	or VCC ± 0.1 V
		5.5	2.75	1.65	1.65
VOH	Minimum High Level	3.0	2.99	2.9	2.9		IOUT = ±50 mA
	Output Voltage	4.5	4.49	4.4	4.4	V
		5.5	5.49	5.4	5.4
							*VIN = VIL or VIH
		3.0		2.56	2.46	V		±12 mA
		4.5		3.86	3.76		IOH	±24 mA
		5.5		4.86	4.76			±24 mA
VOL	Maximum Low Level	3.0	0.002	0.1	0.1		IOUT = 50 mA
	Output Voltage	4.5	0.001	0.1	0.1	V
		5.5	0.001	0.1	0.1
							*VIN = VIL or VIH
		3.0		0.36	0.44	V		12 mA
		4.5		0.36	0.44		IOL	24 mA
		5.5		0.36	0.44			24 mA
IIN	Maximum Input			±	±	μ
	Leakage Current	5.5		0.1	1.0	A	VI = VCC, GND
IOLD	²Minimum Dynamic	5.5			75	mA	VOLD = 1.65 V Max
	Output Current
IOHD		5.5			±75	mA	VOHD = 3.85 V Min
ICC	Maximum Quiescent					μ
	Supply Current	5.5		8.0	80	A	VIN = VCC or GND

* All outputs loaded; thresholds on input associated with output under test. ² Maximum test duration 2.0 ms, one output loaded at a time.

Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.

FACT DATA

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