Datasheet MC74HC157ADT, MC74HC157AN, MC54HC157AJ Datasheet (Motorola)



SEMICONDUCTOR TECHNICAL DATA

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High–Performance Silicon–Gate CMOS

The MC54/74HC157A is identical in pinout to the LS157. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the outputs in noninverted form. A high level on the Output Enable input sets all four Y outputs to a low level.

The HC157A is similar in function to the HC257 which has 3–state outputs.

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 82 FETs or 20.5 Equivalent Gates

LOGIC DIAGRAM



J SUFFIX

16

1

16

1

16

1

16

1

ORDERING INFORMATION

MC54HCXXXAJ MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT

CERAMIC PACKAGE

CASE 620–10

N SUFFIX

PLASTIC PACKAGE

CASE 648–08

D SUFFIX

SOIC PACKAGE

CASE 751B–05

DT SUFFIX

TSSOP PACKAGE

CASE 948F–01

Ceramic Plastic SOIC TSSOP

NIBBLE

A INPUTS

NIBBLE

B INPUTS

A0 A1 A2 A3

B0 B1 B2 B3

SELECT OUTPUT

ENABLE

2 5

11 14

3

6 10 13

1

15

PIN 16 = V PIN 8 = GND

CC

12

PIN ASSIGNMENT

16 15

14 13 125 11 10

9

V

CC

OUTPUT ENABLE

A3 B3 Y3 A2 B2 Y2

A0 B0 Y0 A1 B1

Y1

GND

1 2

3 4

6 7 8

SELECT

4

Y0

7

Y1 Y2 Y3

DATA OUTPUTS

9

FUNCTION TABLE

Inputs

Output Outputs Enable Select Y0 – Y3

H

L L

X = don’t care A0 – A3, B0 – B3 = the levels of the respective Data–Word Inputs.

X L H

L A0–A3 B0–B3

2/97

 Motorola, Inc. 1997

1

REV 7

MC54/74HC157A

Î

MAXIMUM RATINGS*

Symbol

V

I I

Î

T

Î

DC Supply Voltage (Referenced to GND)

CC

V

DC Input Voltage (Referenced to GND)

in

DC Output Voltage (Referenced to GND)

out

I

DC Input Current, per Pin

in

DC Output Current, per Pin

out

DC Supply Current, VCC and GND Pins

CC

P

Power Dissipation in Still Air,Plastic or Ceramic DIP†

D

ОООООООООООО

Storage Temperature

stg

ОООООООООООО

T

Lead Temperature, 1 mm from Case for 10 Seconds

L

ОООООООООООО

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C

Ceramic DIP: – 10 mW/_C from 100_ to 125_C SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

Parameter

SOIC Package†

TSSOP Package†

(Plastic DIP, SOIC or TSSOP Package)

(Ceramic DIP)

Value

– 0.5 to + 7.0 – 0.5 to VCC + 0.5 – 0.5 to VCC + 0.5

± 20 ± 25 ± 50

750 500

ÎÎÎÎ

450

ÎÎÎÎ

– 65 to + 150

ÎÎÎÎ

260 300

ÎÎÎÎ

Unit

V V

V mA mA mA

mW

Î

_

C

Î

_

C

Î

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V

should be constrained to the

out

range GND v (Vin or V

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

) v VCC.

out

RECOMMENDED OPERATING CONDITIONS

Symbol

V

CC

Vin, V

ÎÎ

T

A

tr, t

ÎÎ

DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage

out

(Referenced to GND)

ОООООООООООО

Operating Temperature, All Package Types Input Rise and Fall Time VCC = 2.0 V

f

(Figure 1) VCC = 4.5 V

ОООООООООООО

Parameter

VCC = 6.0 V

Min

2.0 0

Î

– 55

0 0

Î

0

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Symbol

V

ÎÎ

V

ÎÎ

V

OH

ÎÎ

ÎÎÎОООООООÎООООООО

Minimum High–Level Input

IH

Voltage

ООООООО

Maximum Low–Level Input

IL

Voltage

ООООООО

Minimum High–Level Output Voltage

ООООООО

Parameter

Test Conditions

V

= VCC – 0.1 V

out

|I

| v 20 µA

ООООООО

out

ООООООО

V

= 0.1 V

out

|I

| v 20 µA

out

ООООООО

Vin = V

IH

|I

| v 20 µA

out

ООООООО

Vin = V

IH

|I

| v 2.4 mA

out

|I

| v 6.0 mA

out

|I

| v 7.8 mA

out

Max

6.0

V

CC

Î

+ 125

1000

500

Î

400

Unit

V V

Î

_

C

ns

Î

V

CC

V

2.0

3.0

ÎÎ

4.5

ÎÎ

6.0

2.0

3.0

ÎÎ

4.5

ÎÎ

6.0

2.0

4.5

ÎÎ

6.0

3.0

4.5

ÎÎ

6.0

Guaranteed Limit

– 55 to

25_C

1.5

2.1

ÎÎ

3.15

ÎÎ

4.2

0.5

0.9

ÎÎ

1.35

ÎÎ

1.8

1.9

4.4

ÎÎ

5.9

2.48

3.98

ÎÎ

5.48

v

85_Cv 125_C

1.5

2.1

ÎÎ

3.15

ÎÎ

4.2

0.5

0.9

ÎÎ

1.35

ÎÎ

1.8

1.9

4.4

ÎÎ

5.9

2.34

3.84

ÎÎ

5.34

1.5

2.1

ÎÎ

3.15

ÎÎ

4.2

0.5

0.9

ÎÎ

1.35

ÎÎ

1.8

1.9

4.4

ÎÎ

5.9

2.2

3.7

ÎÎ

5.2

Unit

V

Î

V

Î

V

Î

MOTOROLA High–Speed CMOS Logic Data

2

DL129 — Rev 6

MC54/74HC157A

Î

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

V

Symbol

V

OL

ÎÎ

ÎÎÎОООООООÎООООООО

I

in

I

OZ

ÎÎ

I

CC

ÎÎ

Maximum Low–Level Output Voltage

ООООООО

Maximum Input Leakage Current Maximum Three–State Leakage

Current

ООООООО

Maximum Quiescent Supply Current (per Package)

ООООООО

Parameter

Test Conditions

Vin = V

IL

|I

| v 20 µA

out

ООООООО

Vin = V

IL

|I

| v 2.4 mA

out

|I

| v 6.0 mA

out

|I

| v 7.8 mA

out

Vin = VCC or GND Output in High–Impedance State

Vin = VIL or V

ООООООО

V

= VCC or GND

out

IH

Vin = VCC or GND I

= 0 µA

out

ООООООО

CC

2.0

4.5

6.0

ÎÎ

3.0

4.5

ÎÎ

6.0

ÎÎ

6.0

ÎÎ

NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

– 55 to

V

25_C

0.1

ÎÎ

0.26

ÎÎ

0.26

± 0.1 ± 0.5

ÎÎ

4.0

ÎÎ

v

85_C

0.1

ÎÎ

0.33

ÎÎ

0.33

± 1.0 ± 5.0

ÎÎ

40

ÎÎ

v

125_C

0.1

ÎÎ

0.4

ÎÎ

0.4

± 1.0

± 10

ÎÎ

160

ÎÎ

Unit

V

Î

µA µA

Î

µA

Î

AC ELECTRICAL CHARACTERISTICS (C

= 50 pF, Input tr = tf = 6.0 ns)

L

Guaranteed Limit

Symbol

ÎÎ

t

,

PLH

t

PHL

ÎÎ

t

,

PLH

t

PHL

ÎÎ

t

,

PLH

t

PHL

ÎÎ

t

,

TLH

t

THL

ÎÎ

C

in

ÎÎ

ООООООООООООООО

Parameter

Maximum Propagation Delay, Input A or B to Output Y

(Figures 1 and 4)

ООООООООООООООО

Maximum Propagation Delay, Select to Output Y

(Figures 2 and 4)

ООООООООООООООО

Maximum Propagation Delay, Output Enable to Output Y

(Figures 3 and 4)

ООООООООООООООО

Maximum Output Transition Time, Any Output

(Figures 1 and 4)

ООООООООООООООО

Maximum Input Capacitance

ООООООООООООООО

V

CC

ÎÎ

2.0

3.0

ÎÎ

4.5

6.0

ÎÎ

2.0

3.0

ÎÎ

4.5

6.0

ÎÎ

2.0

3.0

ÎÎ

4.5

6.0

ÎÎ

2.0

3.0

ÎÎ

4.5

6.0

ÎÎ

—

ÎÎ

– 55 to

V

25_C

ÎÎ

105

65

ÎÎ

21 18

ÎÎ

110

70

ÎÎ

22 19

ÎÎ

100

60

ÎÎ

20 17

ÎÎ

75 27

ÎÎ

15 13

ÎÎ

ÎÎ10ÎÎ

v

85_C

ÎÎ

130

85

ÎÎ

26 22

ÎÎ

140

90

ÎÎ

28 24

ÎÎ

125

80

ÎÎ

25 21

ÎÎ

95 32

ÎÎ

19 16

ÎÎ

10

v

125_C

ÎÎ

160 115

ÎÎ

32 27

ÎÎ

165 115

ÎÎ

33 28

ÎÎ

150 110

ÎÎ

30 26

ÎÎ

110

36

ÎÎ

22 19

ÎÎ

10

ÎÎ

Unit

Î

pF

Î

ns

NOTE:For propagation delays with loads other than 50 pF , and information on typical parametric values, see Chapter 2 of the Motorola High–

Speed CMOS Data Book (DL129/D).

Typical @ 25°C, VCC = 5.0 V

C

PD

*Used to determine the no–load dynamic power consumption: PD = CPD V

Motorola High–Speed CMOS Data Book (DL129/D).

Power Dissipation Capacitance (Per Package)*

33

2

f + ICC VCC. For load considerations, see Chapter 2 of the

CC

pF

High–Speed CMOS Logic Data DL129 — Rev 6

3 MOTOROLA

MC54/74HC157A

PIN DESCRIPTIONS

INPUTS A0, A1, A2, A3 (Pins 2, 5, 11, 14)

Nibble A inputs. The data present on these pins is transferred to the outputs when the Select input is at a low level and the Output Enable input is at a low level. The data is presented to the outputs in noninverted form.

B0, B1, B2, B3 (Pins 3, 6, 10, 13)

Nibble B inputs. The data present on these pins is transferred to the outputs when the Select input is at a high level and the Output Enable input is at a low level. The data is presented to the outputs in noninverted form.

OUTPUTS Y0, Y1, Y2, Y3 (Pins 4, 7, 9, 12)

Data outputs. The selected input Nibble is presented at

SWITCHING WAVEFORMS

INPUT A OR B

t

OUTPUT Y

t

r

PLH

t

TLH

10%

50%

10%

90%

50%

90%

t

f

t

PHL

t

THL

V

CC

GND

these outputs when the Output Enable input is at a low level. The data present on these pins is in its noninverted form. For the Output Enable input at a high level, the outputs are at a low level.

CONTROL INPUTS

Select (Pin 1)

Nibble select. This input determines the data word to be transferred to the outputs. A low level on this input selects the A inputs and a high level selects the B inputs.

Output Enable (Pin 15)

Output Enable input. A low level on this input allows the selected input data to be presented at the outputs. A high level on this input sets all outputs to a low level.

t

SELECT

t

PLH

OUTPUT Y

r

90%

50%

10%

90%

50%

10%

t

TLH

t

f

t

PHL

t

THL

V

CC

GND

Figure 1. HC157A Figure 2. Y versus Select, Noninverted

OUTPUT

ENABLE

OUTPUT Y

t

PHL

t

THL

90%

50%

10%

t

r

90%

50%

10%

t

f

V

CC

GND

t

PLH

t

TLH

Figure 3. HC157A

TEST POINT

OUTPUT

DEVICE

UNDER

TEST

*Includes all probe and jig capacitance

CL*

Figure 4. T est Circuit

MOTOROLA High–Speed CMOS Logic Data

4

DL129 — Rev 6

NIBBLE

OUTPUTS

OUTPUT ENABLE

SELECT

EXPANDED LOGIC DIAGRAM

2

A0

3

B0

5

A1

6

B1

11

A2

10

B2

14

A3

13

B3

15

1

4

7

9

12

MC54/74HC157A

Y0

Y1

DATA OUTPUTS

Y2

Y3

High–Speed CMOS Logic Data DL129 — Rev 6

5 MOTOROLA

MC54/74HC157A

18

–T

SEATING

–

PLANE

F

–A

–

18

H

G

–A

–

E

G

D 16 PL

0.25 (0.010) T A

916

F

D

16 PL

B

S

916

–B

–

N

M

C

–T

–

K

M M

TA0.25 (0.010)

OUTLINE DIMENSIONS

J SUFFIX

CERAMIC PACKAGE

CASE 620–10

ISSUE V

C

K

S

SEATING PLANE

L

M

J 16 PL

0.25 (0.010) T B

N SUFFIX

PLASTIC PACKAGE

CASE 648–08

ISSUE R

L

J

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.

4. DIM F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY.

INCHES MILLIMETERS

MIN MINMAX MAX

DIM

0.750

A B

0.240

C

—

D

0.015

0.050 BSC

E F

0.055

0.100 BSC

G J

0.008

K

0.125

0.300 BSC

M

S

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

M

L M

0.020

N

Y14.5M, 1982.

FORMED PARALLEL.

INCHES MILLIMETERS

MIN MINMAX MAX

DIM

A

0.740

0.250

0.145

0.015

0.040

0.008

0.110

0.295 0

0.020

°

0.770

0.270

0.175

0.021

0.070

0.100 BSC

0.050 BSC

0.015

0.130

0.305

0.040

B C D F G H

J K L M S

°

0

10

°

0.785

0.295

0.200

0.020

0.065

0.015

0.170 15

0.040

18.80

6.35

3.69

0.39

1.02

0.21

2.80

7.50

0

0.51

°

2.54 BSC

1.27 BSC

°

19.05

6.10 —

0.39

1.27 BSC

1.40

2.54 BSC

0.21

3.18

7.62 BSC

°

0

0.51

19.55

6.85

4.44

0.53

1.77

0.38

3.30

7.74 10

°

1.01

19.93

7.49

5.08

0.50

1.65

0.38

4.31 15

1.01

°

D SUFFIX

PLASTIC SOIC PACKAGE

–A

–

916

–B

P 8 PL

1

–

8

G

K

C

–T

SEATING

–

PLANE

D 16 PL

0.25 (0.010) T B A

M

S S

MOTOROLA High–Speed CMOS Logic Data

CASE 751B–05

ISSUE J

0.25 (0.010) B

M M

R X 45°

M

6

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

MILLIMETERS INCHES

MIN MINMAX MAX

DIM

A

F

J

9.80

B

3.80

C

1.35

D

0.35

F

0.40

1.27 BSC 0.050 BSC

G J

0.19

K

0.10

M

0

°

P

5.80

R

0.25

10.00

4.00

1.75

0.49

1.25

0.25

0.25 7

6.20

0.50

0.386

0.393

0.150

0.157

0.054

0.068

0.014

0.019

0.016

0.049

0.008

0.009

0.004

0.009

0

7

°

0.229

0.010

0.244

0.019

DL129 — Rev 6

ÇÇ

0.10 (0.004)

SEATING

–T–

PLANE

L

U0.15 (0.006) T

PIN 1 IDENT.

U0.15 (0.006) T

D

S

2X L/2

S

MC54/74HC157A

OUTLINE DIMENSIONS

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948F–01

ISSUE O

16X REFK

T

U

B

–U–

S

H

N

S

J

N

DETAIL E

J1

0.25 (0.010)

F

K

K1

SECTION N–N

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED

0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–.

INCHESMILLIMETERS

–W–

DIM MIN MAX MIN MAX

A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C ––– 1.20 ––– 0.047 D 0.05 0.15 0.002 0.006

F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.18 0.28 0.007 0.011

J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC M 0 8 0 8

____

0.10 (0.004) V

16

1

M

9

8

A

–V–

C

G

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

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High–Speed CMOS Logic Data

◊

7 MOTOROLA

MC74HC157A/D

DL129 — Rev 6

Datasheet MC74HC157ADT, MC74HC157AN, MC54HC157AJ Datasheet (Motorola)

Specifications and Main Features

Frequently Asked Questions

User Manual