MOTOROLA MC54HC138A, MC74HC138A Technical data

MC54/74HC138A

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

1-of-8 Decoder/Demultiplexer

High±Performance Silicon±Gate CMOS

The MC54/74HC138A is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

The HC138A decodes a three±bit Address to one±of±eight active±low outputs. This device features three Chip Select inputs, two active±low and one active±high to facilitate the demultiplexing, cascading, and chip±selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.

•Output Drive Capability: 10 LSTTL Loads

•Outputs Directly Interface to CMOS, NMOS and TTL

•Operating Voltage Range: 2.0 to 6.0 V

•Low Input Current: 1.0 μA

•High Noise Immunity Characteristic of CMOS Devices

•In Compliance with the Requirements Defined by JEDEC Standard No. 7A

•Chip Complexity: 100 FETs or 29 Equivalent Gates

LOGIC DIAGRAM

	A0	1	15	Y0
ADDRESS			14
	A1	2		Y1
INPUTS			13	Y2
		3	12
	A2			Y3	ACTIVE±LOW
			11
				Y4	OUTPUTS
			10	Y5
			9
				Y6
			7	Y7
	CS1	6
CHIP±			PIN 16 = VCC
	CS2	4
SELECT			PIN 8 = GND
INPUTS	CS3	5

FUNCTION TABLE

Inputs					Outputs
CS1CS2 CS3	A2 A1 A0	Y0	Y1	Y2 Y3 Y4 Y5 Y6 Y7
X X H	X X X	H H H H H H H H
X H X	X X X	H H H H H H H H
L X X	X X X	H	H H H H H H H
H L L	L L L	L H		H H H H H H
H L L	L L H	H L H			H H H H H
H L L	L H L	H H L H H H H H
H L L	L H H	H H H L H H H H
H L L	H L L	H H H H L H H H
H L L	H L H	H H H H H L H H
H L L	H H L	H H H H H H L H
H L L	H H H	H H H H H H H L

MC54/74HC138A

			J SUFFIX
16		CERAMIC PACKAGE
			CASE 620±10
		1
			N SUFFIX
16		PLASTIC PACKAGE
			CASE 648±08
	1
			D SUFFIX
	16		SOIC PACKAGE
		1	CASE 751B±05
	16		DT SUFFIX
		TSSOP PACKAGE
		1	CASE 948F±01
		ORDERING INFORMATION
		MC54HCXXXAJ	Ceramic
		MC74HCXXXAN	Plastic
		MC74HCXXXAD	SOIC
		MC74HCXXXADT	TSSOP

PIN ASSIGNMENT

A0		1	16	VCC
A1		2	15	Y0
		3	14	Y1
A2
CS2		4	13	Y2
CS3		5	12	Y3
		6	11	Y4
CS1
		7	10	Y5
Y7
				Y6
GND		8	9

H = high level (steady state); L = low level (steady state);

X = don't care

10/95

Motorola, Inc. 1995

REV 6

MC54/74HC138A

MAXIMUM RATINGS*

	Symbol	Parameter	Value	Unit
	VCC	DC Supply Voltage (Referenced to GND)	± 0.5 to + 7.0	V
	Vin	DC Input Voltage (Referenced to GND)	± 0.5 to VCC + 0.5	V
	Vout	DC Output Voltage (Referenced to GND)	± 0.5 to VCC + 0.5	V
	Iin	DC Input Current, per Pin	± 20	mA
	Iout	DC Output Current, per Pin	± 25	mA
	ICC	DC Supply Current, VCC and GND Pins	± 50	mA
	PD	Power Dissipation in Still Air, Plastic or Ceramic DIP²	750	mW
		SOIC Package²	500
		TSSOP Package²	450
	Tstg	Storage Temperature	± 65 to + 150	_C
	TL	Lead Temperature, 1 mm from Case for 10 Seconds		_C
		(Plastic DIP, SOIC or TSSOP Package)	260
		(Ceramic DIP)	300

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high±impedance circuit. For proper operation, Vin and

Vout should be constrained to the

range GND v (Vin or Vout) v VCC. Unused inputs must always be

tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

²Derating Ð Plastic DIP: ± 10 mW/ _C from 65_ to 125_C

Ceramic DIP: ± 10 mW/_C from 100_ to 125_C

SOIC Package: ± 7 mW/_C from 65_ to 125_C

TSSOP Package: ± 6.1 .W/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol	Parameter		Min	Max	Unit
VCC	DC Supply Voltage (Referenced to GND)		2.0	6.0	V
Vin, Vout	DC Input Voltage, Output Voltage (Referenced to GND)		0	VCC	V
TA	Operating Temperature, All Package Types		± 55	+ 125	_C
tr, tf	Input Rise and Fall Time	VCC = 2.0 V	0	1000	ns
	(Figure 2)	VCC = 4.5 V	0	500
		VCC = 6.0 V	0	400

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

				Guaranteed Limit
			VCC
				±55_C to	v _	v	_
Symbol	Parameter	Test Conditions	V	_				Unit
				25 C	85 C		125 C
VIH	Minimum High±Level Input	Vout = 0.1 V or VCC ± 0.1 V	2.0	1.5	1.5		1.5	V
	Voltage	|Iout| v 20 μA	3.0	2.1	2.1		2.1
			4.5	3.15	3.15		3.15
			6.0	4.2	4.2		4.2
VIL	Maximum Low±Level Input	Vout = 0.1 V or VCC ± 0.1 V	2.0	0.5	0.5		0.5	V
	Voltage	|Iout| v 20 μA	3.0	0.9	0.9		0.9
			4.5	1.35	1.35		1.35
			6.0	1.8	1.8		1.8
VOH	Minimum High±Level Output	Vin = VIH or VIL	2.0	1.9	1.9		1.9	V
	Voltage	|Iout| v 20 μA	4.5	4.4	4.4		4.4
			6.0	5.9	5.9		5.9
		Vin = VIH or VIL |Iout| v 2.4 mA	3.0	2.48	2.34		2.20
		|Iout| v 4.0 mA	4.5	3.98	3.84		3.70
		|Iout| v 5.2 mA	6.0	5.48	5.34		5.20

MOTOROLA

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MC54/74HC138A

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

				Guaranteed Limit
			VCC
				±55_C to
Symbol	Parameter	Test Conditions	V	25_C	v 85_C	v 125_C	Unit
VOL	Maximum Low±Level Output	Vin = VIH or VIL	2.0	0.1	0.1	0.1	V
	Voltage	|Iout| v 20 μA	4.5	0.1	0.1	0.1
			6.0	0.1	0.1	0.1
		Vin = VIH or VIL |Iout| v 2.4 mA	3.0	0.26	0.33	0.40
		|Iout| v 4.0 mA	4.5	0.26	0.33	0.40
		|Iout| v 5.2 mA	6.0	0.26	0.33	0.40
Iin	Maximum Input Leakage Current	Vin = VCC or GND	6.0	± 0.1	± 1.0	± 1.0	μA
ICC	Maximum Quiescent Supply	Vin = VCC or GND	6.0	4	40	160	μA
	Current (per Package)	Iout = 0 μA

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)

			Guaranteed Limit
		VCC
			±55_C to
Symbol	Parameter	V	25_C	v 85_C	v 125_C	Unit
tPLH,	Maximum Propagation Delay, Input A to Output Y	2.0	135	170	205	ns
tPHL	(Figures 1 and 4)	3.0	90	125	165
		4.5	27	34	41
		6.0	23	29	35
tPLH,	Maximum Propagation Delay, CS1 to Output Y	2.0	110	140	165	ns
tPHL	(Figures 2 and 4)	3.0	85	100	125
		4.5	22	28	33
		6.0	19	24	28
tPLH,	Maximum Propagation Delay, CS2 or CS3 to Output Y	2.0	120	150	180	ns
tPHL	(Figures 3 and 4)	3.0	90	120	150
		4.5	24	30	36
		6.0	20	26	31
tTLH,	Maximum Output Transition Time, Any Output	2.0	75	95	110	ns
tTHL	(Figures 2 and 4)	3.0	30	40	55
		4.5	15	19	22
		6.0	13	16	19
Cin	Maximum Input Capacitance	Ð	10	10	10	pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High± Speed CMOS Data Book (DL129/D).

		Typical @ 25°C, VCC = 5.0 V
CPD	Power Dissipation Capacitance (Per Package)*	55	pF

*Used to determine the no±load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the Motorola High±Speed CMOS Data Book (DL129/D).

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MOTOROLA