Motorola MC74HC132AN, MC74HC132AD, MC54HC132AJ Datasheet

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SEMICONDUCTOR TECHNICAL DATA

1

REV 6

 Motorola, Inc. 1995

10/95

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High–Performance Silicon–Gate CMOS

The MC54/74HC132A is identical in pinout to the LS132. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.

The HC132A can be used to enhance noise immunity or to square up
slowly changing waveforms.

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 72 FETs or 18 Equivalent Gates

LOGIC DIAGRAM

A1

B1

Y1

3

2

1

PIN 14 = V

CC

PIN 7 = GND

Y = AB

A2

B2

Y2

6

5

4

A3

B3

Y3

8

10

9

A4

B4

Y4

11

13

12

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FUNCTION TABLE

PIN ASSIGNMENT

Inputs Output

A B Y

L L H

L H H
H L H
H H L

11

12

13

14

8

9

105

4

3

2

1

7

6

B3

Y4

A4

B4

V

CC

Y3

A3

A2

Y1

B1

A1

GND

Y2

B2

D SUFFIX

SOIC PACKAGE

CASE 751A–03

N SUFFIX

PLASTIC PACKAGE

CASE 646–06

MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD

Ceramic
Plastic
SOIC

1

14

1

14

J SUFFIX

CERAMIC PACKAGE

CASE 632–08

1

14

ORDERING INFORMATION

MC54/74HC132A

MOTOROLA High–Speed CMOS Logic Data

DL129 — Rev 6

2

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

V

CC

DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

V

in

DC Input Voltage (Referenced to GND)

– 1.5 to VCC + 1.5

V

V

out

DC Output Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

I

in

DC Input Current, per Pin

± 20

mA

I

out

DC Output Current, per Pin

± 25

mA

I

CC

DC Supply Current, VCC and GND Pins

± 50

mA

P

D

Power Dissipation in Still Air,Plastic or Ceramic DIP†

SOIC Package†

750
500

mW

T

stg

Storage Temperature

– 65 to + 150

_

C

T

L

Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP or SOIC Package)

(Ceramic DIP)

260
300

_

C

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C

Ceramic DIP: – 10 mW/_C from 100_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

V

CC

DC Supply Voltage (Referenced to GND)

2.0

6.0

V

Vin, V

out

DC Input Voltage, Output Voltage
(Referenced to GND)

0

V

CC

V

T

A

Operating Temperature, All Package Types

– 55

+ 125

_

C

tr, t

f

Input Rise and Fall Time (Figure 1)

—

no

limit*

ns

*When Vin X 0.5 VCC, ICC >> quiescent current.

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

Symbol

Parameter

Test Conditions

V

CC
V

25_C

– 40_C to

+ 85_C

– 55_C to

+ 125_C

Unit

VT+ max

Maximum Positive–Going
Input Threshold Voltage

(Figure 3)

V

out

= 0.1 V

|I

out

| v 20 µA

2.0

4.5

6.0

1.5

3.15

4.2

1.5

3.15

4.2

1.5

3.15

4.2

V

VT+ min

Minimum Positive–Going
Input Threshold Voltage

(Figure 3)

V

out

= 0.1 V

|I

out

| v 20 µA

2.0

4.5

6.0

1.0

2.3

3.0

0.95

2.25

2.95

0.95

2.25

2.95

V

VT– max

Maximum Negative–Going
Input Threshold Voltage

(Figure 3)

V

out

= VCC – 0.1 V

|I

out

| v 20 µA

2.0

4.5

6.0

0.9

2.0

2.6

0.95

2.05

2.65

0.95

2.05

2.65

V

VT– min

Minimum Negative–Going
Input Threshold Voltage

(Figure 3)

V

out

= VCC – 0.1 V

|I

out

| v 20 µA

2.0

4.5

6.0

0.3

0.9

1.2

0.3

0.9

1.2

0.3

0.9

1.2

V

VHmax

Note 2

Maximum Hysteresis Voltage

(Figure 3)

V

out

= 0.1 V or VCC – 0.1 V

|I

out

| v 20 µA

2.0

4.5

6.0

1.2

2.25

3.0

1.2

2.25

3.0

1.2

2.25

3.0

V

VHmin
Note 2

Minimum Hysteresis Voltage

(Figure 3)

V

out

= 0.1 V or VCC – 0.1 V

|I

out

| v 20 µA

2.0

4.5

6.0

0.2

0.4

0.5

0.2

0.4

0.5

0.2

0.4

0.5

V

NOTE: 1. VHmin > (VT+ min) – (VT– max); VHmax = (VT+ max) + (VT– min).
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir­cuit. For proper operation, Vin and
V

out

should be constrained to the

range GND v (Vin or V

out

) v VCC.

Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.