Motorola MC74F534DW, MC74F534N, MC54F534J Datasheet

4-200

FAST AND LS TTL DATA

OCTAL D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS

The MC54/74F534 is a high-speed, low-power octal D-type flip-flop
featuring separate D-type inputs for each flip-flop and 3-state outputs for bus
oriented applications. A buffered Clock (CP) and Output Enable (OE

) are
common to all flip-flops. The F534 is the same as the F374 except that the
outputs are inverted.

• Edge-Triggered D-Type Inputs

• Buffered Positive Edge-Triggered Clock

• 3-State Outputs for Bus Oriented Applications

CONNECTION DIAGRAM

VCC = PIN 20
GND = PIN 10

3 4 7 8 13 14 17 18

11

1

2 5 6 9 12 15 16 19

CP
OE

18 17 16 15 14 13

1 2 3 4 5 6

7

20 19

8

V

CC

OE

O

7D7D6O6

D

5

O

5

D

4

O

0D0D1O1O2D2D3

9 10

O

3

GND

12 11

O

4

CP

LOGIC SYMBOL

D0D1D2D3D4D5D6D

7

O0O1O2O3O4O5O6O

7

GUARANTEED OPERATING RANGES

Symbol Parameter Min Typ Max Unit

V

CC

Supply Voltage 54, 74 4.5 5.0 5.5 V

54 –55 25 125

TAOperating Ambient Temperature Range

74 0 25 70

°C

I

OH

Output Current — High 54, 74 –3.0 mA

I

OL

Output Current — Low 54, 74 24 mA

MC54/74F534

OCTAL D-TYPE FLIP-FLOP

WITH 3-STATE OUTPUTS

FAST SCHOTTKY TTL

ORDERING INFORMATION

MC54FXXXJ Ceramic
MC74FXXXN Plastic
MC74FXXXDW SOIC

20

1

J SUFFIX

CERAMIC

CASE 732-03

20

1

N SUFFIX

PLASTIC

CASE 738-03

20

1

DW SUFFIX

SOIC

CASE 751D-03

4-201

FAST AND LS TTL DATA

MC54/74F534

LOGIC DIAGRAM

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

CP

OE

D

0

D

1

D

2

D

3

D

4

D

5

D

6

D

7

CP D

Q

O

0

O

1

O

2

O

3

O

4

O

5

O

6

O

7

CP D

Q

CP D

Q

CP D

Q

CP D

Q

CP D

Q

CP D

Q

CP D

Q

FUNCTIONAL DESCRIPTION

The F534 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-state true outputs. The buffered
clock and buffered Output Enable are common to all flip-flops.
The eight flip-flops will store the state of their individual D
inputs that meet the setup and hold times requirements on the

LOW-to-HIGH Clock (CP) transition. With the Output Enable
(OE

) LOW, the contents of the eight flip-flops are available at

the outputs. When the OE

is HIGH, the outputs go to the high

impedance state. Operation of the OE

input does not affect the

state of the flip-flops.

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Limits

Symbol

Parameter

Min Typ Max

Unit

Test Conditions

V

IH

Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage

V

IL

Input LOW Voltage 0.8 V Guaranteed Input LOW Voltage

V

IK

Input Clamp Diode Voltage –1.2 V IIN = –18 mA VCC = MIN

54, 74 2.4 3.3 V

IOH = –3.0 mA VCC = 4.5 V

VOHOutput HIGH Voltage

74 2.7 3.3 V

IOH = –3.0 mA VCC = 4.75 V

V

OL

Output LOW Voltage 0.35 0.5 V IOL = 24 mA VCC = MIN

I

OZH

Output OFF Current — HIGH 50 µA V

OUT

= 2.7 V VCC = MAX

I

OZL

Output OFF Current — LOW –50 µA V

OUT

= 0.5 V VCC = MAX

20

VIN = 2.7 V

IIHInput HIGH Current

100

µA

VIN = 7.0 V

VCC = MAX

I

IL

Input LOW Current –0.6 mA VIN = 0.5 V VCC = MAX

I

OS

Output Short Circuit Current (Note 2) –60 –150 mA V

OUT

= 0 V VCC = MAX

I

CCZ

Power Supply Current 55 86 mA

Dn = Gnd
OE

= 4.5 V

VCC = MAX

NOTES:

1. For conditions such as MIN or MAX, use the appropriate value specified under guaranteed operating ranges.

2. Not more than one output should be shorted at a time, nor for more than 1 second.