The MC33178/9 series is a family of high quality monolithic amplifiers
employing Bipolar technology with innovative high performance concepts for
quality audio and data signal processing applications. This device family
incorporates the use of high frequency PNP input transistors to produce
amplifiers exhibiting low input offset voltage, noise and distortion. In addition,
the amplifier provides high output current drive capability while consuming
only 420 µA of drain current per amplifier. The NPN output stage used,
exhibits no deadband crossover distortion, large output voltage swing,
excellent phase and gain margins, low open–loop high frequency output
impedance, symmetrical source and sink AC frequency performance.
The MC33178/9 family offers both dual and quad amplifier versions,
tested over the vehicular temperature range, and are available in DIP and
SOIC packages.
Supply Voltage (VCC to V
Input Differential Voltage RangeV
Input Voltage RangeV
Output Short Circuit Duration (Note 2)t
Maximum Junction TemperatureT
Storage Temperature RangeT
Maximum Power DissipationP
NOTES: 1.Either or both input voltages should not exceed VCC or VEE.
2.Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded. (See power dissipation performance characteristic, Figure 1.)
EE)
V
IDR
IR
SC
stg
S
Indefinitesec
J
–60 to +150°C
D
+36V
(Note 1)V
(Note 1)V
+150°C
(Note 2)mW
DC ELECTRICAL CHARACTERISTICS (V
CharacteristicsFigureSymbolMinTypMaxUnit
Input Offset Voltage (RS = 50 Ω, VCM = 0 V, VO = 0 V)
(VCC = +2.5 V, VEE = –2.5 V to VCC = +15 V, VEE = –15 V)
TA = +25°C
TA = –40° to +85°C
Average Temperature Coefficient of Input Of fset Voltage
(RS = 50 Ω, VCM = 0 V, VO = 0 V)
TA = –40° to +85°C
Input Bias Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
Input Offset Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
Common Mode Input Voltage Range
(∆VIO = 5.0 mV, VO = 0 V)
Large Signal Voltage Gain (VO = –10 V to +10 V, RL = 600 Ω)
= +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
CC
16, 31SR1.22.0—V/µs
VO
U
m
m
p
25THD
26|ZO|—150—Ω
in
in
27e
28i
n
n
—50—dB
—3.0—MHz
—15—dB
—60—Degree
—32—kHz
—
0.0024
—
—
—200—kΩ
—10—pF
—
—
—
—
0.014
0.024
8.0
7.5
0.33
0.15
—
—
—
nV/ Hz√
—
—
pA/ Hz√
—
—
s
%
Figure 1. Maximum Power Dissipation
versus T emperature
2400
2000
MC33178P/9P
1600
MC33179D
1200
800
MC33178D
400
D
0
P (MAX), MAXIMUM POWER DISSIPATION (mW)
–60 –40 –20020406080 100 120180160140
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
Figure 2. Input Offset Voltage versus
T emperature for 3 Typical Units
4.0
3.0
2.0
1.0
0
–1.0
–2.0
–3.0
IO
V , INPUT OFFSET VOLTAGE (mV)
–4.0
–55–250255075100125
Unit 1
Unit 2
Unit 3
TA, AMBIENT TEMPERATURE (°C)
VCC = +15 V
VEE = –15 V
RS = 10
VCM = 0 V
Ω
3
MC33178 MC33179
Figure 3. Input Bias Current
versus Common Mode V oltage
160
140
120
100
80
VCC = +15 V
60
VEE = –15 V
40
IB
I , INPUT BIAS CURRENT (nA)
20
0
–15–10–5.005.01015
TA = 25
°
C
VCM, COMMON MODE VOLTAGE (V)
Figure 5. Input Common Mode V oltage
Range versus T emperature
V
CC
VCC –0.5 V
VCC –1.0 V
VCC –1.5 V
VCC –2.0 V
VEE +1.0 V
VEE +0.5 V
, INPUT COMMON MODE VOL TAGE RANGE (V)
V
EE
ICR
V
–55–250255075100125
TA, AMBIENT TEMPERATURE (°C)
VCC = +5.0 V to +18 V
VEE = –5.0 V to –18 V
∆
VIO = 5.0 mV
Figure 4. Input Bias Current
versus T emperature
120
VCC = +15 V
110
VEE = –15 V
VCM = 0 V
100
90
80
IB
70
I , INPUT BIAS CURRENT (nA)
60
–55–250255075100125
TA, AMBIENT TEMPERATURE (
°
C)
Figure 6. Open Loop Voltage Gain
versus T emperature
250
200
150
VCC = +15 V
100
VEE = –15 V
f = 10 Hz
∆
VO = 10 V to +10 V
50
, OPEN LOOP VOL TAGE GAIN (kV/V)
VOL
A
0
–55–250255075100125
RL = 600
Ω
TA, AMBIENT TEMPERATURE (
°
C)
Figure 7. V oltage Gain and Phase
versus Frequency
50
40
30
20
10
0
–10
–20
1A) Phase (RL = 600 Ω)
–30
2A) Phase (RL = 600
VOL
1B) Gain (RL = 600
–40
A , OPEN LOOP VOL TAGE GAIN (dB)
2B) Gain (RL = 600
–50
234567 8 9 1020
Ω,
CL = 300 pF)
Ω
)
Ω
, CL = 300 pF)
f, FREQUENCY (Hz)
VCC = +15 V
VEE = –15 V
VO = 0 V
TA = 25
2A
4
1B
2B
1A
Figure 8. Output Voltage Swing
versus Supply V oltage
80
100
120
140
°
C
160
180
200
220
, EXCESS PHASE (DEGREES)
φ
240
260
280
40
35
pp
30
25
20
15
10
, OUTPUT VOLTAGE (V )
O
V
5.0
0
05.0101520
TA = 25°C
VCC, |V
RL = 10 k
SUPPLY VOLTAGE (V)
EE|,
Ω
RL = 600
Ω
MOTOROLA ANALOG IC DEVICE DATA
MC33178 MC33179
Figure 9. Output Saturation Voltage
versus Load Current
V
CC
TA = +125°C
Source
VCC –1.0 V
TA = –55°C
VCC –2.0 V
VEE +2.0 V
Sink
TA = –55°C
VEE +1.0 V
, OUTPUT SA TURATION VOLTAGE (V)
sat
V
TA = +125°C
V
EE
05.0101520
VCC = +5.0 V to +18 V
VEE = –5.0 V to –18 V
IL, LOAD CURRENT (±mA)
Figure 11. Common Mode Rejection
versus Frequency Over T emperature
120
O
VCC = +15 V
VEE = –15 V
VCM = 0 V
∆
VCM = ±1.5 V
°
to +125°C
TA = –55
100
80
60
–
A
∆
V
40
CM
20
CMR = 20 Log
CMR, COMMON MODE REJECTION (dB)
0
DM
+
∆
∆
V
V
CM
x A
DM
∆
V
O
101001.0 k10 k100 k1.0 M
f, FREQUENCY (Hz)
Figure 10. Output Voltage
versus Frequency
28
24
pp
20
16
VCC = +15 V
12
VEE = –15 V
Ω
8.0
, OUTPUT VOLTAGE (V )
O
4.0
V
RL = 600
AV = +1.0 V
≤
1.0%
THD =
°
C
TA = 25
0
1.0 k10 k100 k1.0 M
f, FREQUENCY (Hz)
Figure 12. Power Supply Rejection
versus Frequency Over T emperature
120
∆
VO/A
∆
V
V
+PSR
–PSR
O
DM
CC
100
80
V
60
40
20
PSR, POWER SUPPLY REJECTION (dB)
0
–
A
DM
+
V
PSR = 20 Log
CC
EE
∆
101001.0 k10 k100 k1.0 M
f, FREQUENCY (Hz)
TA = –55° to +125°C
VCC = +15 V
VEE = –15 V
∆
VCC = ±1.5 V
Figure 13. Output Short Circuit Current
versus Output Voltage
100
Source
80
Sink
60
40
VCC = +15 V
VEE = –15 V
±
1.0 V
20
0
SC
I, OUTPUT SHORT CIRCUIT CURRENT (mA)
–15–9.0–3.003.09.015
VID =
VO, OUTPUT VOLTAGE (V)
MOTOROLA ANALOG IC DEVICE DATA
Figure 14. Output Short Circuit Current
versus T emperature
100
90
Sink
80
Source
70
60
50
SC
I, OUTPUT SHORT CIRCUIT CURRENT (mA)
–55–250255075100125
TA, AMBIENT TEMPERATURE (°C)
VCC = +15 V
VEE = –15 V
±
1.0 V
VID =
Ω
RL < 10
5
MC33178 MC33179
Figure 15. Supply Current versus Supply
V oltage with No Load
625
µ
500
375
250
125
CC
I , SUPPLY CURRENT/AMPLIFIER ( A)
0
02.04.06.08.01012141618
TA = +125°C
TA = +25
°
C
TA = –55
°
C
V
|VEE| , SUPPLY VOLTAGE (V)
CC,
Figure 17. Gain Bandwidth Product
versus T emperature
10
8.0
6.0
4.0
2.0
GBW, GAIN BANDWIDTH PRODUCT (MHz)
0
–55–250255075100125
VCC = +15 V
VEE = –15 V
f = 100 kHz
Ω
RL = 600
CL = 0 pF
TA, AMBIENT TEMPERATURE (
°
C)
Figure 16. Normalized Slew Rate
versus T emperature
1.15
1.10
VCC = +15 V
VEE = –15 V
1.05
∆
Vin = 20 V
1.00
0.95
0.90
0.85
SR, SLEW RATE (NORMALIZED)
0.80
0.75
–55–250255075100125
pp
–
+
∆
V
in
TA, AMBIENT TEMPERATURE (°C)
600
Ω
Figure 18. V oltage Gain and Phase
versus Frequency
50
40
30
20
10
0
–10
–20
V
A , VOLTAGE GAIN (dB)
–30
–40
–50
100 k
VCC = +15 V
VEE = –15 V
RL = 600
TA = 25°C
CL = 0 pF
Phase
Gain
Ω
1.0 M10 M100 M
f, FREQUENCY (Hz)
V
O
100 pF
80
100
120
140
160
180
200
220
240
, EXCESS PHASE (DEGREES)
φ
260
280
Figure 19. V oltage Gain and Phase
versus Frequency
50
40
30
20
10
0
–10
–20
1A) Phase VCC =18 V, VEE = –18 V
V
A , VOLTAGE GAIN (dB)
2A) Phase VCC 1.5 V, VEE = –1.5 V
–30
1B) Gain VCC = 18 V, VEE = –18 V
–40
2B) Gain VCC = 1.5 V, VEE = –1.5 V
–50
100 k
1.0 M10 M100 M
6
1B
2B
f, FREQUENCY (Hz)
1A
2A
°
C
TA = 25
∞
RL =
CL = 0 pF
80
100
120
140
160
180
200
, PHASE (DEGREES)
220
φ
240
260
280
Figure 20. Open Loop Gain Margin
versus T emperature
15
CL = 10 pF
12
CL = 100 pF
9.0
CL = 300 pF
6.0
VCC = +15 V
VEE = –15 V
3.0
m
A , OPEN LOOP GAIN MARGIN (dB)
0
–55–250255075100125
RL = 600
Ω
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
MC33178 MC33179
Figure 21. Phase Margin
versus T emperature
60
50
40
30
20
, PHASE MARGIN (DEGREES)
m
10
φ
0
–55–250255075100125
VCC = +15 V
VEE = –15 V
Ω
RL = 600
TA, AMBIENT TEMPERATURE (
CL = 10 pF
CL = 100 pF
CL = 300 pF
°
C)
Figure 23. Open Loop Gain Margin and Phase
Margin versus Output Load Capacitance
18
Ω
Phase Margin
Gain Margin
V
O
C
L
15
12
9.0
6.0
3.0
m
A , OPEN LOOP GAIN MARGIN (dB)
0
101001.0 k
–
V
in
+
600
CL, OUTPUT LOAD CAPACITANCE (pF)
VCC = +15 V
VEE = –15 V
VO = 0 V
Figure 22. Phase Margin and Gain Margin
12
10
VCC = +15 V
VEE = –15 V
8.0
RT = R1+R
VO = 0 V
6.0
TA = 25
4.0
m
A , GAIN MARGIN (dB)
V
2.0
in
0
1001.0 k10 k100 k
60
50
40
30
20
, PHASE MARGIN (DEGREES)
m
10
φ
0
150
140
130
120
110
CS, CHANNEL SEPARATION (dB)
100
1001.0 k10 k100 k1.0 M
versus Differential Source Resistance
Gain Margin
2
°
C
R
1
–
+
R
2
RT, DIFFERENTIAL SOURCE RESISTANCE (Ω)
V
O
Phase Margin
Figure 24. Channel Separation
versus Frequency
Drive Channel
VCC = +15 V
CEE = –15 V
RL = 600
TA = 25°C
f, FREQUENCY (Hz)
60
50
40
30
20
, PHASE MARGIN (DEGREES)
m
10
φ
0
Ω
Figure 25. T otal Harmonic Distortion
versus Frequency
10
VCC = +15 V VO = 2.0 V
VEE = –15 V TA = 25
Ω
RL = 600
1.0
0.1
THD, TOT AL HARMONIC DISTORTION (%)
0.01
101001.0 k10 k100 k
pp
°
C
f, FREQUENCY (Hz)
AV = 1000
AV = 100
AV = 10
AV = 1.0
MOTOROLA ANALOG IC DEVICE DATA
Figure 26. Output Impedance
versus Frequency
500
Ω
|Z |, OUTPUT IMPEDANCE ()
O
400
300
200
100
1. AV = 1.0
2. AV = 10
3. AV = 100
4. AV = 1000
3
0
1.0 k10 k100 k1.0 M10 M
4
f, FREQUENCY (Hz)
21
VCC = +15 V
VEE = –15 V
VO = 0 V
°
C
TA = 25
7
MC33178 MC33179
Figure 27. Input Referred Noise V oltage
versus Frequency
20
18
nV/ Hz√
16
14
12
10
8.0
6.0
4.0
2.0
n
e , INPUT REFERRED NOISE VOL TAGE ()
VCC = +15 V
VEE = –15 V
°
C
TA = 25
0
101001.0 k10 k10 k
f, FREQUENCY (Hz)
Input Noise Voltage Test Circuit
+
–
Figure 29. Percent Overshoot versus
Load Capacitance
100
90
VCC = +15 V
VEE = –15 V
80
70
60
50
40
30
20
PERCENT OVERSHOOT (%)
10
0
101001.0 k10 k
TA = 25
°
C
RL = 600
CL, LOAD CAPACITANCE (pF)
Ω
RL = 2.0 k
Figure 28. Input Referred Noise Current
versus Frequency
0.5
pA/ Hz√
V
O
0.4
0.3
0.2
VCC = +15 V
0.1
VEE = –15 V
°
C
TA = 25
0
101001.0 k10 k100 k
n
i , INPUT REFERRED NOISE CURRENT ()
f, FREQUENCY (Hz)
Input Noise Current Test Circuit
+
R
S
–
(RS = 10 k
Ω
)
V
O
Figure 30. Noninverting Amplifier Slew Rate
VCC = +15 V
VEE = –15 V
AV = +1.0
Ω
RL = 600
CL = 100 pF
°
C
TA = 25
Ω
, OUTPUT VOLTAGE (5.0 V/DIV)
O
t, TIME (2.0 µs/DIV)
Figure 31. Small Signal Transient ResponseFigure 32. Large Signal Transient Response
µ
s/DIV)
VCC = +15 V
VEE = –15 V
AV = +1.0
RL = 600
CL = 100 pF
TA = 25
, OUTPUT VOLTAGE (50 mV/DIV)
O
V
8
VCC = +15 V
VEE = –15 V
AV = +1.0
RL = 600
CL = 100 pF
TA = 25
t, TIME (2.0 ns/DIV)
Ω
°
C
, OUTPUT VOLTAGE (5.0 V/DIV)V
O
V
t, TIME (5.0
MOTOROLA ANALOG IC DEVICE DATA
Ω
°
C
MC33178 MC33179
Figure 33. T elephone Line Interface Circuit
10 k
To
Receiver
From
Microphone
120 k
2.0 kA2
–
+
V
R
A1
–
+
10 k
1.0
200 k
820
10 k
–
+
0.05
A3
10 k
300
V
R
10 k
µ
F
µ
F
Tip
1N4678
Phone Line
Ring
APPLICATION INFORMA TION
This unique device uses a boosted output stage to
combine a high output current with a drain current lower than
similar bipolar input op amps. Its 60° phase margin and 15 dB
gain margin ensure stability with up to 1000 pF of load
capacitance (see Figure 23). The ability to drive a minimum
600 Ω load makes it particularly suitable for telecom
applications. Note that in the sample circuit in Figure 33 both
A2 and A3 are driving equivalent loads of approximately
600 Ω.
The low input offset voltage and moderately high slew rate
and gain bandwidth product make it attractive for a variety of
other applications. For example, although it is not single
supply (the common mode input range does not include
ground), it is specified at +5.0 V with a typical common mode
rejection of 1 10 dB. This makes it an excellent choice for use
with digital circuits. The high common mode rejection, which
is stable over temperature, coupled with a low noise figure
and low distortion, is an ideal op amp for audio circuits.
The output stage of the op amp is current limited and
therefore has a certain amount of protection in the event of a
short circuit. However, because of its high current output, it is
especially important not to allow the device to exceed the
maximum junction temperature, particularly with the
MC33179 (quad op amp). Shorting more than one amplifier
could easily exceed the junction temperature to the extent of
causing permanent damage.
Stability
As usual with most high frequency amplifiers, proper lead
dress, component placement, and PC board layout should be
exercised for optimum frequency performance. For example,
long unshielded input or output leads may result in unwanted
input/output coupling. In order to preserve the relatively
low input capacitance associated with these amplifiers,
resistors connected to the inputs should be immediately
adjacent to the input pin to minimize additional stray input
capacitance. This not only minimizes the input pole
frequency for optimum frequency response, but also
minimizes extraneous “pick up” at this node. Supplying
decoupling with adequate capacitance immediately adjacent
to the supply pin is also important, particularly over
temperature, since many types of decoupling capacitors
exhibit great impedance changes over temperature.
Additional stability problems can be caused by high load
capacitances and/or a high source resistance. Simple
compensation schemes can be used to alleviate these
effects.
MOTOROLA ANALOG IC DEVICE DATA
9
MC33178 MC33179
If a high source of resistance is used (R1 > 1.0 kΩ), a
compensation capacitor equal to or greater than the input
capacitance of the op amp (10 pF) placed across the
feedback resistor (see Figure 34) can be used to neutralize
that pole and prevent outer loop oscillation. Since the closed
loop transient response will be a function of that capacitance,
it is important to choose the optimum value for that capacitor.
This can be determined by the following Equation:
CC = (1 +[R1/R2])2 CL (ZO/R2)
(1)
where: ZO is the output impedance of the op amp.
Figure 34. Compensation for
High Source Impedance
R2
C
C
For moderately high capacitive loads (500 pF < C
< 1500 pF) the addition of a compensation resistor on the
order of 20 Ω between the output and the feedback loop will
help to decrease miller loop oscillation (see Figure 35). For
high capacitive loads (CL > 1500 pF), a combined
compensation scheme should be used (see Figure 36). Both
the compensation resistor and the compensation capacitor
affect the transient response and can be calculated for
optimum performance. The value of CC can be calculated
using Equation (1). The Equation to calculate RC is as
follows:
RC = ZO R1/R2
(2)
Figure 35. Compensation Circuit for
Moderate Capacitive Loads
R2
L
R1
–
–
R1
+
Z
L
+
R
C
C
L
Figure 36. Compensation Circuit for
High Capacitive Loads
R2
C
C
R1
–
+
R
C
C
L
10
MOTOROLA ANALOG IC DEVICE DATA
NOTE 2
–T–
SEATING
PLANE
H
MC33178 MC33179
OUTLINE DIMENSIONS
58
–B–
14
F
–A–
C
N
D
G
0.13 (0.005)B
K
M
T
P SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
L
J
M
M
A
M
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
L7.62 BSC0.300 BSC
M––– 10 ––– 10
N 0.761.010.0300.040
INCHESMILLIMETERS
__
C
A
B
A1
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
D
58
0.25MB
E
1
H
4
e
M
h
X 45
_
q
C
A
SEATING
PLANE
0.10
L
B
SS
A0.25MCB
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
MILLIMETERS
DIMMINMAX
A1.351.75
A10.100.25
B0.350.49
C0.180.25
D4.805.00
E
3.804.00
1.27 BSCe
H5.806.20
h
0.250.50
L0.401.25
0 7
q
__
MOTOROLA ANALOG IC DEVICE DATA
11
–T–
SEATING
PLANE
MC33178 MC33179
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
148
B
17
A
F
N
SEATING
HGD
PLANE
–A–
148
–B–
P 7 PL
71
G
C
D 14 PL
0.25 (0.010)A
K
M
S
B
T
C
K
0.25 (0.010)B
S
L
J
M
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
(SO–14)
ISSUE F
M
X 45
R
_
M
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/ Locations Not Listed: Motorola Literature Distribution;JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–54543–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: RMF AX0@email.sps.mot.com – TOUCHT ONE 602–244–6609ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
INTERNET: http://Design–NET.com51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
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MOTOROLA ANALOG IC DEVICE DATA
MC33178/D
*MC33178/D*
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