MOTOROLA MC33157DW Datasheet

MC33157

Half Bridge Controller and Driver for Industrial Linear Tubes

The MC33157 includes the oscillator circuit and two output

channels to control a half–bridge power stage.

One of the channels is ground–referenced. The second one is

floating to provide a bootstrap operation for the high side switch.

Dedicated Driver for Industrial Linear T ubes

• Main oscillator is current controlled, making it easy to set up by a

single external resistor . On top of that, such a feature is useful to implement a dimming function by frequency shift.

• Filament pre–heating time control built–in.

• The strike sequence is controllable by external passive components,

the resonnant frequency being independently adjustable. This frequency can be made different from the pre–heating and the steady state values. A frequency sweep between two defined values makes this IC suitable for any series resonnant topologies.

• Dedicated internal comparator provides an easy lamp strike detection

implementation.

• Digital RESET pin provides a fast reset of the system (less than 10µs).

Both output MOSFET are set to “OFF” state when RESET is zero.

• Adjustable dead time makes the product suitable for any snubber

capacitor and size of MOSFET used as power switches.

• Designed to be used with standard setting capacitors ≤ 470nF.

• A voltage reference, derived from the internal bandgap, is provided

for external usage. This voltage is 100% trimmed at probe level yielding a 2% tolerance over the temperature range.

SWEEP

Iph

Ifstrike

ENABLE Dead Time

CONTROL LOGIC Strike Detection Clear

INHIBIT

+Vref

SHIFTER

Iop

LEVEL

+Vref

ICO

COMPARATOR

HIGH SIDE BUFFER

LOW SIDE BUFFER

+Vref

VHS

VHO

VOUT

VLO

GND

DT adjust

Strike

Detection

RESET

ENDSWP

VLO

+Vref

(+7 V)

+Vref

PREHEAT & STRIKE CONTROL

Latch

145367

15 V

BAND GAP

REFERENCE

Vth

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SO–16L DW SUFFIX CASE 751G

PIN CONNECTIONS AND

MARKING DIAGRAM

116

ref

SWEEP

512

MC33157DW

ICO

DTA SD

AWL = Manufacturing Code

YYWW = Date Code

(Top View)

15 14

AWLYYWW

11 10

OUT

LO GND RESET

ORDERING INFORMATION

Device Package Shipping

MC33157DW Plastic SO–16L 47 Units / Rail

 Semiconductor Components Industries, LLC, 1999

November, 1999 – Rev. 1

1 Publication Order Number:

MC33157/D

MC33157

MAXIMUM RATINGS

Rating Symbol Value Unit

High Side Max Voltage Differential Max Voltage VHS – V High Side Output Voltage Range Low Side Output Voltage Range Max VHS Allowable Slew Rate Max VHO/VLO Allowable Slew Rate Supply Voltage

Maximum Power Dissipation @ TA = 50°C

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Thermal Resistance Junction–to–Air Operating Junction Temperature

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(Note 1)

Storage Temperature Range Electrostatic Discharge [HBMI]

OUT

dVHS/dt

dVHO/dt, dVLO/dt

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θJA T

stg

ESD

600

–0.3 to VHS+0.3

OUT

–0.3 to +16

±10 ±10

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600 140

–40 to +150 –65 to +150

2.0

V/ns V/ns

°C/W

V V V V

°C °C

ELECTRICAL CHARACTERISTICS (V

= 14V . All parameters are specified for –20 °C to 85°C ambient temperature

unless otherwise noted.)

Characteristic

SUPPLY VOLTAGE

Input Threshold Voltage

Turn–On

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Turn–Off Clamp Voltage @ I Supply Current

(Note 2)

Standby Current at No Load @ VDD < UV Quiescent Current at No Load @ VDD > UV

CLAMP

= 10 mA

OFF

OUTPUT DRIVERS (VLO, VHO)

High Side VDSON @ Source current = 250 mA Low Side VDSON @ Sink current = 300 mA High Side / Low Side rise time @ C High Side / Low Side fall time @ C

OUT

= 2 nF

OSCILLATOR

Output Max Frequency Internal Master Clock Duty Cycle System operation programming recommended values

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High threshold

COP

Low threshold

COP

discharging current

COP

over I

current ratio

ROP

Symbol Min Typ Max Unit

ÁÁÁ

OFF

CLAMP

STDBY

VDS(P)

VDS(N)

OSC

ÁÁÁ

ENDSWEEP

ÁÁÁ

DTA

ÁÁÁ

ÁÁ

8.0 15

– –

–

ÁÁ

68 68

ÁÁ

100

– – – –

ÁÁ

8.5 16 12

1.5

2.5

880 880

40 35

ÁÁ

4.2

2.8

400

2.0

12.8

ÁÁ

9.0

16.5

1500 1500

250

–

560

ÁÁ

560

2200

ÁÁ

250

ÁÁ

560

– – – –

mA mA mA

mV mV

ns ns

kHz

k k

µA

V V

W W W W

V V

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MC33157

ELECTRICAL CHARACTERISTICS (continued) (V

unless otherwise noted.)

Characteristic UnitMaxTypMinSymbol

TIMING

Preheat timing capacitor pulsed charging current

(Duty Cycle=1/16) Filament preheat time with CPH = 0.47 µF Strike sequence recycling time with CPH = 0.47 µF CPH charging current ratio Strike sequence restart blanking time with CPH = 470nF Dead time: externally adjustable by Rdt Dead time adjust resistance (Recommended range) Dead time tolerance

VOLTAGE REFERENCE

Voltage reference @ I Line regulation @ I Load regulation @ I Maximum load current Total V

REF

INPUT

Strike detect high voltage threshold Strike detect low voltage threshold Maximum current on strike detect input @ Regulation level ISDHI – – 10 nA Maximum voltage on strike detect @ Regulation level VSDHI – – 7.0 V Maximum current on strike detect input @ Low level ISDLO – – 10 nA Maximum strike detect voltage negative input VSDNEG – – –0.3 V Strike detect minimum pulse width RESET high voltage RESET low voltage RESET input current @ high voltage RESET input current @ low voltage RESET maximum voltage RESET maximum negative voltage

NOTES: (1) Since this device has a built–in zener, one cannot use a low impedance supply to drive this pin. Having a current limit mode by external

means is mandatory.

(2) Test Conditions: C

LOAD

variation over Line, Temperature, Load

OUT

= 500 µA, TJ = 25°C

LOAD

= 500 µA, TJ = 25°C

= 500 µA to 5 mA

LOAD

= 2.2 nF, f = 100 kHz, VDD = 15V.

= 14V . All parameters are specified for –20 °C to 85°C ambient temperature

∂

bk dt

Rdt

Tol

REF

REFMAX

REF

VTHSDHI

VTHSDLO

SDPW RSTHI

RSTLO

– – – –

0.3 10

– – – –

6.85

– –

–

1.6

– – – –

2.0

125

1/16

– –

±10

7.0 10 10

–

7.0

4.0

3.75

100

1.8

–20 –20

– –

– – – –

2.5

220

– – –

7.15

– –

–

2.2 – – –

7.0

–0.3

µA

µs

V mV mV mA

µA µA

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MC33157

PIN FUNCTION DESCRIPTION

Pin Symbol Function Description

ÁÁ

SWEEP

ÁÁ

ICO

ÁÁ

DTA

ÁÁ

RESET

ÁÁ

ref

Supply voltage

input

ÁÁÁ

Voltage

reference

ÁÁÁ

output

Preheat timing

ÁÁÁ

capacitor

ÁÁÁ

Preheat and

ÁÁÁ

Strike

frequencies

ÁÁÁ

adjustment

resistors

ÁÁÁ

Frequency

sweep timing

ÁÁÁ

capacitor

ÁÁÁ

Oscillator capacitor

ÁÁÁ

Steady state

operating

ÁÁÁ

frequency

adjustment

ÁÁÁ

current input

Dead Time

ÁÁÁ

Adjust

Strike detection

input

ÁÁÁ

Master reset

input

ÁÁÁ

This pin provides the DC supply to the circuit. The voltage is internally clamped by a zener connected to the ground. It is NOT allowed to use a DC low impedance power supply to feed this

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pin, but limiting the current by an external resistor is mandatory. It is recommended to damp this pin

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to ground by an electrolytic capacitor connected close to pin 1. This pin provides a +7V voltage reference derived from the internal bandgap. The +Vref can supply

up to 25 mA and shall be decoupled to ground by a 220nF ceramic capacitor

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This capacitor sets two timings: filaments preheat time (tPH) and strike sequence recycle time (tSK).

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It is charged with a constant current and cares must be observed to minimize the leakage current at this pin to get the expected timing. Typically, a 0.47 µF capacitor will give a 2 seconds

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pre–heating time and a 125 ms strike sequence recycle time. (See details given by figure 9) The RPH resistor together with R

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filaments (fPH = f1). R timing, the frequency will sweep from the high pre–heating f1 to the low strike f2 values. Normally,

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f1 is far from the LC resonance but f2 is close enough to generate the high voltage across the fluorescent tube. (See details given by figure 9)

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ENDSWEEP

defines the strike frequency (f

This timing define the sweep time from f1 to f2. Since the timing capacitor is charged with a low constant current, cares must be observed to minimize the leakage current at this pin to get the

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expected timing. Since this capacitor is charged through resistor RPH, the voltage rises according to an exponential and the frequency shifts with the same law.

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This pin defines the steady state operation frequency (f3 = fOP) of the controller. Since this timing capacitor is charged with a low constant current, cares must be observed to minimize the leakage

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current at this pin to get the expected frequency. Film type capacitor are recommended (polycarbonate).

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Since the circuit uses a Current Controlled Oscillator (ICO), the current forced into this pin will control the operating frequency. The allowable current range is from 1 µA to 500 µA. The +Vref

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output can be used to provide the voltage across ROP. An auxiliary voltage source can be used to implement a dimming function.

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This pin provides an access to the internal timing system to adjust the dead time between the gate

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drive of the High and Low power switches connected, respectively, to pin VHO and VLO. This pin drives a comparator, with an internal fixed reference, and acknowledges the tube strike.

When a negative going slope (across the internal reference) is detected, the system considers the

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lamp has struck and the oscillator jumps from the present frequency value, which is within the

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window defined by RPH and R going slope is detected on this pin, the system will repeat the sweep and strike sequence four

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times, then stops. The circuit will re–start from either a RESET, or by pulling +VDD to ground. The

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input signal can be either a logic level or an analog voltage ramping up from zero to +Vref followed by a negative going slope to zero. In any case, the positive pulse width must be 1 µs minimum. The

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pcb layout must be designed to minimize the noise at this pin. (See details given by figures 8, 9, &

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10)

ENDSWEEP

Forcing a logic zero to this pin (HCMOS low level) will reset the circuit, initializing a frequency sweep and lamp strike sequence. The master reset does not include the pre–heating timing. The minimum

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pulse width requested is 10µs to guarantee a reset state. However, this pin has no built in filtering

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and a shorter pulse may initialize a reset sequence: it is the responsibility of the designer to make sure that no noise or parasitic pulse are developed at the RESET input. A full re–start of the

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sequence, including the pre–heating time, can be initialized by pulling the +VDD pin to ground. In this case, +VDD and RESET

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low (active) both outputs MOS are biased in the off condition. An internal 20µA pull up current forces

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the pin to logic one, allowing the designer to left this pin open if the RESET function is not used. In order to avoid any uncontrolled state of the output drivers, it is recommended to set up a 10ms low

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level at pin 10. The reset is activated in less than 10 microsecond, but releasing this pin while the Vcc

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supply is high (above 300V) can generate a random operation, depending upon the dv/dt coming from the power supply.

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must be simultaneously released to a high state. When RESET is asserted

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and COP defines the frequency used to preheat the

ENDSWEEP

= f2). During the sweep

to the steady state value defined by ROP. If no negative

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MOTOROLA MC33157DW Datasheet

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