The MC34023 series are high speed, fixed frequency , single–ended pulse
width modulator controllers optimized for high frequency operation. They are
specifically designed for Off–Line and DC–to–DC converter applications
offering the designer a cost–effective solution with minimal external
components. These integrated circuits feature an oscillator, a temperature
compensated reference, a wide bandwidth error amplifier, a high speed
current sensing comparator, and a high current totem pole output ideally
suited for driving a power MOSFET.
Also included are protective features consisting of input and reference
undervoltage lockouts each with hysteresis, cycle–by–cycle current limiting,
and a latch for single pulse metering.
The flexibility of this series allows it to be easily configured for either
current mode or voltage mode control.
• 50 ns Propagation Delay to Output
• High Current Totem Pole Output
• Wide Bandwidth Error Amplifier
• Fully–Latched Logic with Double Pulse Suppression
• Latching PWM for Cycle–By–Cycle Current Limiting
• Soft–Start Control with Latched Overcurrent Reset
• Input Undervoltage Lockout with Hysteresis
• Low Start–Up Current (500 µA Typ)
• Internally Trimmed Reference with Undervoltage Lockout
• 90% Maximum Duty Cycle (Externally Adjustable)
• Precision Trimmed Oscillator
• Voltage or Current Mode Operation to 1.0 MHz
• Functionally Similar to the UC3823
Order this document by MC34023/D
16
1
P SUFFIX
PLASTIC PACKAGE
CASE 648
16
1
DW SUFFIX
PLASTIC PACKAGE
CASE 751G
(SO–16L)
PIN CONNECTIONS
Simplified Application
16
V
ref
4
Clock
5
R
T
C
T
Ramp
Error Amp
Output
Noninverting
Input
Inverting
Input
Soft–Start
Oscillator
6
7
3
2
1
8
Error
Amp
Soft–Start
This device contains 176 active transistors.
MOTOROLA ANALOG IC DEVICE DATA
5.1V
Reference
UVLO
Latching
PWM
Ground
10
15
V
CC
13
V
C
14
Output
12
Power
Ground
11
Current
Limit Ref
9
Current
Limit/
Shutdown
Error Amp
Inverting Input
Error Amp
Noninverting Input
Error Amp Output
Clock
R
T
C
T
Ramp
Soft–Start
1
2
3
4
5
6
7
8
(Top View)
16
V
ref
15
V
CC
14
Output
13
V
C
12
Power Ground
Current Limit
11
Reference
Ground
10
Current Limit/
9
Shutdown
ORDERING INFORMATION
Operating
Device
MC33023PPlastic DIP
MC33023DWSO–16L
MC34023PTA = 0° to +70°CPlastic DIP
Motorola, Inc. 1996Rev 2
Temperature Range
TA = –40° to +105°C
Package
1
MC34023 MC33023
DIP Pack
648)
MAXIMUM RATINGS
RatingSymbolValueUnit
Power Supply VoltageV
Output Driver Supply VoltageV
Output Current, Source or Sink (Note 1)
DC
Pulsed (0.5 µs)
Current Sense, Soft–Start, Ramp, and Error Amp InputsV
Error Amp Output and Soft–Start Sink CurrentI
Clock and RT Output CurrentI
Power Dissipation and Thermal Characteristics
SO–16L Package (Case 751G)
Maximum Power Dissipation @ TA = +25°C
Thermal Resistance, Junction–to–Air
age (Case
Maximum Power Dissipation @ TA = +25°C
Thermal Resistance, Junction–to–Air
Operating Junction TemperatureT
Operating Ambient Temperature (Note 2)
MC34023
MC33023
Storage Temperature RangeT
R
R
CC
I
O
O
CO
P
θJA
P
θJA
T
stg
C
–0.3 to +7.0V
in
D
D
J
A
0 to +70
–40 to +105
–55 to +150°C
30V
20V
0.5
2.0
10mA
5.0mA
862
145
1.25
100
mW
°C/W
W
°C/W
+150°C
°C
A
ELECTRICAL CHARACTERISTICS (V
= 15 V , RT = 3.65 kΩ, CT = 1.0 nF, for typical values TA = +25°C, for min/max values TA is
CC
the operating ambient temperature range that applies [Note 2], unless otherwise noted.)
Characteristic
SymbolMinTypMaxUnit
REFERENCE SECTION
Reference Output Voltage (IO = 1.0 mA, TJ = +25°C)V
Line Regulation (VCC = 10 V to 30 V)Reg
Load Regulation (IO = 1.0 mA to 10 mA)Reg
T emperature StabilityT
Total Output V ariation over Line, Load, and TemperatureV
Output Noise Voltage (f = 10 Hz to 10 kHz, TJ = +25°C)V
ref
line
load
S
ref
n
5.055.15.15V
–2.015mV
–2.015mV
–0.2–mV/°C
4.95–5.25V
–50–µV
Long Term Stability (TA = +125°C for 1000 Hours)S–5.0–mV
Output Short Circuit CurrentI
SC
– 30–65–100mA
OSCILLATOR SECTION
Frequency
TJ = +25°C
Line (VCC = 10 V to 30 V) and Temperature (TA = T
low
to T
high
)
Frequency Change with Voltage (VCC = 10 V to 30 V)∆f
Frequency Change with Temperature (TA = T
low
to T
)∆f
high
Sawtooth Peak VoltageV
Sawtooth Valley VoltageV
f
osc
/∆V–0.21.0%
osc
/∆T–2.0–%
osc
OSC(P)
OSC(V)
380
370
400
400
420
430
2.62.83.0V
0.71.01.25V
Clock Output Voltage
High State
Low State
NOTES: 1. Maximum package power dissipation limits must be observed.
2.Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
T
=0°C for MC34023T
low
T
= –40°C for MC33023T
low
= +70°C for MC34023
high
= +105°C for MC33023
high
V
OH
V
OL
3.9
–
2.3
4.5
–
2.9
kHz
V
2
MOTOROLA ANALOG IC DEVICE DATA
MC34023 MC33023
ELECTRICAL CHARACTERISTICS (V
= 15 V , RT = 3.65 kΩ, CT = 1.0 nF, for typical values TA = +25°C, for min/max values TA is
CC
the operating ambient temperature range that applies [Note 2], unless otherwise noted.)
Characteristic
SymbolMinTypMaxUnit
ERROR AMPLIFIER SECTION
Input Offset VoltageV
Input Bias CurrentI
Input Offset CurrentI
Open–Loop Voltage Gain (VO = 1.0 V to 4.0 V)A
IO
IB
IO
VOL
––15mV
–0.63.0µA
–0.11.0µA
6095–dB
Gain Bandwidth Product (TJ = +25°C)GBW4.08.3–MHz
Common Mode Rejection Ratio (VCM = 1.5 V to 5.5 V)CMRR7595–dB
Power Supply Rejection Ratio (VCC = 10 V to 30 V)PSRR85110–dB
Output Current, Source (VO = 4.0 V)
Output Current, Sink (VO = 1.0 V)
Output Voltage Swing, High State (IO = –0.5 mA)
Output Voltage Swing, Low State (IO = 1 mA)
I
Source
I
Sink
V
OH
V
OL
0.5
1.0
4.5
0
3.0
3.6
4.75
0.4
–
–
5.0
1.0
Slew RateSR6.012–V/µs
PWM COMPARATOR SECTION
Ramp Input Bias CurrentI
Duty Cycle, Maximum
Duty Cycle, Minimum
DC
DC
Zero Duty Cycle Threshold Voltage Pin 3(4) (Pin 7(9) = 0 V)V
Propagation Delay (Ramp Input to Output, TJ =+25°C)t
PLH(in/out)
IB
(max)
(min)
th
––0.5–5.0µA
80
–
90
–
0
–
1.11.251.4V
–60100ns
SOFT–START SECTION
Charge Current (V
Soft–Start
Discharge Current (V
= 0.5 V)I
Soft–Start
= 1.5 V)I
chg
dischg
3.09.020µA
1.04.0–mA
CURRENT SENSE SECTION
Input Bias Current (Pin 9(12) = 0 V to 4.0 V)I
Current Limit Comparator Input Offset Voltage (Pin 11(14) = 1.1 V)V
Current Limit Reference Input Common Mode Range (Pin 11(14))V
Shutdown Comparator ThresholdV
Propagation Delay (Current Limit/Shutdown to Output, TJ =+25°C)t
PLH(in/out)
IB
IO
CMR
th
––15µA
––45mV
1.0–1.25V
1.251.401.55V
–5080ns
OUTPUT SECTION
Output Voltage
Low State (I
High State (I
Sink
(I
Sink
Source
(I
Source
= 20 mA)
= 200 mA)
= 20 mA)
= 200 mA)
Output Voltage with UVLO Activated (VCC = 6.0 V, I
= 0.5 mA)V
Sink
V
V
OL(UVLO)
Output Leakage Current (VC = 20 V)I
Output Voltage Rise T ime (CL = 1.0 nF, TJ = +25°C)t
Output Voltage Fall T ime (CL = 1.0 nF, TJ = +25°C)t
OL
OH
L
r
f
–
–
13
12
0.25
1.2
13.5
13
0.4
2.2
–
–
–0.251.0V
–100500µA
–3060ns
–3060ns
UNDERVOLTAGE LOCKOUT SECTION
Start–Up Threshold (VCC Increasing)V
UVLO Hysteresis Voltage (VCC Decreasing After Turn–On)V
th(on)
H
8.89.29.6V
0.40.81.2V
TOTAL DEVICE
Power Supply Current
Start–Up (VCC = 8.0 V)
Operating
NOTES: 1. Maximum package power dissipation limits must be observed.
2.Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
T
=0°C for MC34023T
low
T
= –40°C for MC33023T
low
= +70°C for MC34023
high
= +105°C for MC33023
high
I
CC
–
–
0.5
20
1.2
30
mA
V
%
V
mA
MOTOROLA ANALOG IC DEVICE DATA
3
100 k
1357
Ω
CT =
1. 100 nF
10 k
2. 47 nF
3. 22 nF
4. 10 nF
5. 4.7 nF
, TIMING RESISTOR ( )
6. 2.2 nF
T
R
7. 1.0 nF
1.0 k
8. 470 pF
9. 220 pF
470
1001000
Figure 1. Timing Resistor versus
Oscillator Frequency
9
2468
4
10
f
, OSCILLAT OR FREQUENCY (Hz)
osc
10
5
VCC = 15 V
TA = +25
10
MC34023 MC33023
Figure 2. Oscillator Frequency versus T emperature
1200
°
C
6
10
7
1000
800
600
400
, OSCILLAT OR FREQUENCY (kHz)f
200
osc
0
– 55– 250255075
VCC = 15 V
1.0 MHz
400 kHz
50 kHz
TA, AMBIENT TEMPERATURE (°C)
RT = 1.2 k
CT = 1.0 nF
RT = 3.6 k
CT = 1.0 nF
RT = 36 k
CT = 1.0 nF
100125
Figure 3. Error Amp Open Loop Gain and
Phase versus Frequency
120
100
80
60
40
20
, OPEN LOOP VOL TAGE GAIN (dB)
0
VOL
A
–20
101001.0 k10 k100 k1.0 M10 M
Phase
Gain
f, FREQUENCY (Hz)
Figure 5. Error Amp Small Signal
Transient Response
2.55 V
0
45
90
θ
135
1.30
1.28
C)
°
1.26
1.24
, ZERO DUTY CYCLE (V)
, EXCESS PHASE (
TH
1.22
V
1.20
– 55– 250255075100
3.0 V
Figure 4. PWM Comparator Zero Duty Cycle
Threshold V oltage versus Temperature
VCC = 15 V
Pin 7(9) = 0 V
°
TA, AMBIENT TEMPERATURE (
C)
Figure 6. Error Amp Large Signal
Transient Response
125
2.5 V
2.45 V
4
2.5 V
2.0 V
0.1 µs/DIV0.1 µs/DIV
MOTOROLA ANALOG IC DEVICE DATA
MC34023 MC33023
Figure 7. Reference V oltage Change
0
– 5.0
VCC = 15 V
–10
–15
–20
–25
, REFERENCE VOLTAGE CHANGE (mV)
ref
V
–30
0
1020304050
Figure 9. Reference Line RegulationFigure 10. Reference Load Regulation
versus Source Current
TA = – 55°C
TA = +125°C
I
, SOURCE CURRENT (mA)
Source
TA = +25°C
65.6
65.2
64.8
64.4
, REFERENCE SHORT CIRCUIT CURRENT (mA)
SC
I
Figure 8. Reference Short Circuit Current
versus T emperature
66
VCC = 15 V
64
–55
– 250255075100125
TA, AMBIENT TEMPERATURE (
°
C)
– 100
, CURRENT LIMIT INPUT OFFSET VOLTAGE (mV)V
IO
100
60
20
–20
–60
2.0 mV/DIV
V
LINE REGULA TION 10 V to 24 V
ref
(2.0 ms/DIV)
Figure 11. Current Limit Comparator Input
Offset Voltage versus Temperature
VCC = 15 V
Pin 11(14) = 1.1 V
TA, AMBIENT TEMPERATURE (°C)
2.0 mV/DIV
V
LOAD REGULATION 1.0 mA to 10 mA
ref
Figure 12. Shutdown Comparator Threshold
V oltage versus Temperature
1.50
VCC = 15 V
1.46
1.42
1.38
, THRESHOLD VOLTAGE (V)V
1.34
th
1.30
1000
– 55– 25255075100125– 55– 250255075125
TA, AMBIENT TEMPERATURE (
(2.0 ms/DIV)
°
C)
MOTOROLA ANALOG IC DEVICE DATA
5
MC34023 MC33023
Figure 13. Soft–Start Charge Current
versus T emperature
A)
10
µ
, SOFT-ST ART CHARGE CURRENT (
I
chg
9.5
9.0
8.5
8.0
7.5
7.0
VCC = 15 V
– 55– 250255075100125
TA, AMBIENT TEMPERATURE (°C)
Figure 15. Drive Output Rise and Fall TimeFigure 16. Drive Output Rise and Fall Time
Figure 14. Output Saturation Voltage
versus Load Current
0
– 1.0
VCC = 15 V
µ
s Pulsed Load
80
120 Hz Rate
– 2.0
, OUTPUT SA TURATION VOLTAGE (V)
sat
V
2.0
1.0
0
°
C
TA = 25
00.20.40.60.81.0
V
IO, OUTPUT LOAD CURRENT (A)
CC
Ground
Source Saturation
(Load to Ground)
Sink Saturation
(Load to VCC)
OUTPUT RISE & FALL TIME 1.0 nF LOAD
50 ns/DIV
Figure 17. Supply V oltage versus Supply Current
30
25
20
15
10
, SUPPLY CURRENT (mA)
CC
5.0
I
RT = 3.65 k
CT = 1.0 nF
VCC Decreasing
0
04.08.0121620
OUTPUT RISE & FALL TIME 10 nF LOAD
50 ns/DIV
Ω
VCC Increasing
VCC, SUPPLY VOLTAGE (V)
6
MOTOROLA ANALOG IC DEVICE DATA
MC34023 MC33023
Clock
R
T
C
T
Ramp
Error Amp Output
Noninverting Input
Inverting Input
Soft–Start
C
SS
Figure 18. Representative Block Diagram
V
CC
16
V
ref
4
5
Oscillator
6
1.25 V
7
3
2
1
8
Error
Amp
4.2 V
PWM
Comparator
+
µ
A
9.0
R
Q
S
Reference
Regulator
V
ref
UVLO
0.5 V
Soft–Start Latch
Ground10
VCC
UVLO
9.2 V
R
Q
S
PWM Latch
Current
Limit
Shutdown
15
V
CC
13
V
C
14
Output
12
Power Ground
11
Current Limit Reference
9
Current Limit/Shutdown
1.4 V
V
in
C
T
Clock
Soft–Start
Error Amp Output
Ramp
PWM
Comparator
Output
Figure 19. Current Limit Operating Waveforms
MOTOROLA ANALOG IC DEVICE DATA
7
MC34023 MC33023
OPERA TING DESCRIPTION
The MC33023 and MC34023 series are high speed, fixed
frequency, single–ended pulse width modulator controllers
optimized for high frequency operation. They are specifically
designed for Off–Line and DC–to–DC converter applications
offering the designer a cost effective solution with minimal
external components. A representative block diagram is
shown in Figure 18.
Oscillator
The oscillator frequency is programmed by the values
selected for the timing components RT and CT. The RT pin is
set to a temperature compensated 3.0 V. By selecting the
value of RT, the charge current is set through a current mirror
for the timing capacitor CT. This charge current runs
continuously through CT. The discharge current is ratioed to
be 10 times the charge current, which yields the maximum
duty cycle of 90%. CT is charged to 2.8 V and discharged to
1.0 V . During the discharge of CT, the oscillator generates an
internal blanking pulse that resets the PWM Latch and,
inhibits the outputs. The threshold voltage on the oscillator
comparator is trimmed to guarantee an oscillator accuracy of
5.0% at 25°C.
Additional dead time can be added by externally
increasing the charge current to CT as shown in Figure 23.
This changes the charge to discharge ratio of CT which is set
internally to I
ratio will be:
% Deadtime
A bidirectional clock pin is provided for synchronization or
for master/slave operation. As a master, the clock pin
provides a positive output pulse during the discharge of CT.
As a slave, the clock pin is an input that resets the PWM latch
and blanks the drive output, but does not discharge CT.
Therefore, the oscillator is not synchronized by driving the
clock pin alone. Figures 27, 28 and 29 provide suggested
synchronization.
Error Amplifier
A fully compensated Error Amplifier is provided. It features
a typical DC voltage gain of 95 dB and a gain bandwidth
product of 8.3 MHz with 75 degrees of phase margin
(Figure 3). Typical application circuits will have the
noninverting input tied to the reference. The inverting input
will typically be connected to a feedback voltage generated
from the output of the switching power supply. Both inputs
have a common mode voltage (VCM) input range of 1.5 V to
5.5 V . The Error Amplifier Output is provided for external loop
compensation.
Soft–Start Latch
Soft–Start is accomplished in conjunction with an external
capacitor. The Soft–Start capacitor is charged by an internal
9.0 µA current source. This capacitor clamps the output of
the error amplifier to less than its normal output voltage, thus
charge
/10 I
charge
I
+
. The new charge to discharge
)
I
10 (I
l
charge
charge
)
additiona
limiting the duty cycle. The time it takes for a capacitor to
reach full charge is given by:
t[(4.5 • 105)C
A Soft–Start latch is incorporated to prevent erratic
operation of this circuitry. Two conditions can cause the
Soft–Start circuit to latch so that the Soft–Start capacitor
stays discharged. The first condition is activation of an
undervoltage lockout of either VCC or V
condition is when current sense input exceeds 1.4 V. Since
this latch is “set dominant”, it cannot be reset until either of
these signals is removed and, the voltage at C
than 0.5 V.
PWM Comparator and Latch
A PWM circuit typically compares an error voltage with a
ramp signal. The outcome of this comparison determines the
state of the output. In voltage mode operation the ramp signal
is the voltage ramp of the timing capacitor. In current mode
operation the ramp signal is the voltage ramp induced in a
current sensing element. The ramp input of the PWM
comparator is pinned out so that the user can decide which
mode of operation best suits the application requirements.
The ramp input has a 1.25 V offset such that whenever the
voltage at this pin exceeds the error amplifier output voltage
minus 1.25 V , the PWM comparator will cause the PWM latch
to set, disabling the outputs. Once the PWM latch is set, only
a blanking pulse by the oscillator can reset it, thus initiating
the next cycle.
Current Limiting and Shutdown
A pin is provided to perform current limiting and shutdown
operations. Two comparators are connected to the input of
this pin. The reference voltage for the current limit
comparator is not set internally . A pin is provided so the user
can set the voltage. When the voltage at the current limit
input pin exceeds the externally set voltage, the PWM latch is
set, disabling the output. In this way cycle–by–cycle current
limiting is accomplished. If a current limit resistor is used in
series with the power devices, the value of the resistor is
found by:
I
R
Sense
If the voltage at this pin exceeds 1.4 V, the second
comparator is activated. This comparator sets a latch which,
in turn, causes the soft start capacitor to be discharged. In
this way a “hiccup” mode of recovery is possible in the case
of output short circuits. If a current limit resistor is used in
series with the output devices, the peak current at which the
controller will enter a “hiccup” mode is given by:
Limit Reference Voltage
+
I
shutdown
Soft-Start
I
pk (s witch)
1.4 V
+
R
Sense
. The second
ref
Soft–Start
is less
8
MOTOROLA ANALOG IC DEVICE DATA
MC34023 MC33023
Undervoltage Lockout
There are two undervoltage lockout circuits within the IC.
The first senses VCC and the second V
VCC must exceed 9.2 V and V
the outputs can be enabled and the Soft–Start latch released.
If VCC falls below 8.4 V or V
are disabled and the Soft–Start latch is activated. When the
UVLO is active, the part is in a low current standby mode
allowing the IC to have an off–line bootstrap start–up circuit.
Typical start–up current is 500 µA.
Output
The MC34023 has a high current totem pole output
specifically designed for direct drive of power MOSFETs. It is
capable of up to ± 2.0 A peak drive current with a typical rise
and fall time of 30 ns driving a 1.0 nF load.
Separate pins for VC and Power Ground are provided.
With proper implementation, a significant reduction of
switching transient noise imposed on the control circuitry is
possible. The separate VC supply input also allows the
designer added flexibility in tailoring the drive voltage
independent of VCC.
Reference
A 5.1 V bandgap reference is pinned out and is trimmed to
an initial accuracy of ±1.0% at 25°C. This reference has short
circuit protection and can source in excess of 10 mA for
powering additional control system circuitry.
Design Considerations
Do not attempt to construct the converter on
wire–wrap or plug–in prototype boards. With high
frequency, high power, switching power supplies it is
imperative to have separate current loops for the signal paths
and for the power paths. The printed circuit layout should
contain a ground plane with low current signal and high
current switch and output grounds returning on separate
paths back to the input filter capacitor. Shown in Figure 35 is
a printed circuit layout of the application circuit. Note how the
power and ground traces are run. All bypass capacitors and
snubbers should be connected as close as possible to the
specific part in question. The PC board lead lengths must be
less than 0.5 inches for effective bypassing for snubbing.
Instabilities
In current mode control, an instability can be encountered
at any given duty cycle. The instability is caused by the
must exceed 4.2 V before
ref
falls below 3.6 V, the outputs
ref
. During power–up,
ref
current feedback loop. It has been shown that the instability is
caused by a double pole at half the switching frequency . If an
external ramp (Se) is added to the on–time ramp (Sn) of the
current–sense waveform, stability can be achieved.
One must be careful not to add too much ramp
compensation. If too much is added the system will start to
perform like a voltage mode regulator. All benefits of current
mode control will be lost. Figure 25 is an example of one way
in which external ramp compensation can be implemented.
Figure 20. Ramp Compensation
Ramp Compensation
Ramp Input
Ramp
Compensation S
A simple equation can be used to calculate the amount of
external ramp slope necessary to add that will achieve
stability in the current loop. For the following equations, the
calculated values for the application circuit in Figure 34 are
also shown.
where:= DC output voltage
For the application circuit:
NP, N
e
Current
Signal S
n
V
N
O
S
ǒ
Ǔ
N
P
Se+
= 0.1 15 V/ms
V
O
S
A
R
S
Se+
i
L
L
= number of power transformer primary
= or secondary turns
= gain of the current sense network
= (see Figures 23 and 24)
= output inductor
= current sense resistance
(RS)A
5
1.8 µ
1.25 V
i
2
ǒ
Ǔ
8
(
0.3)(0.55
)
MOTOROLA ANALOG IC DEVICE DATA
9
MC34023 MC33023
PIN FUNCTION DESCRIPTION
Pin
DIP/SOIC
1Error Amp
2Error Amp
3Error Amp
4ClockThis is a bidirectional pin used for synchronization.
5R
6C
7Ramp InputFor voltage mode operation this pin is connected to CT. For current mode operation this pin is
8Soft–StartA capacitor at this pin sets the Soft–Start time.
9Current Limit/
10GroundThis pin is the ground for the control circuitry.
11Current Limit
12Power GroundThis is a separate power ground return that is connected back to the power source. It is used to reduce
13V
14OutputThis is a high current totem pole output.
15V
16V
FunctionDescription
Inverting
Input
Noninverting
Input
Output
T
T
Shutdown
Reference
Input
C
CC
ref
This pin is usually used for feedback from the output of the power supply.
This pin is used to provide a reference in which an error signal can be produced on the output of the
error amp. Usually this is connected to V
This pin is provided for compensating the error amp for poles and zeros encountered in the power
supply system, mostly the output LC filter.
The value of RT sets the charge current through timing Capacitor, CT.
In conjunction with RT, the timing Capacitor sets the switching frequency.
connected through a filter to the current sensing element.
This pin has two functions. First, it provides cycle–by–cycle current limiting. Second, if the current is
excessive, this pin will reinitiate a Soft–Start cycle.
This pin voltage sets the threshold for cycle–by–cycle current limiting.
the effects of switching transient noise on the control circuitry .
This is a separate power source connection for the outputs that is connected back to the power source
input. With a separate power source connection, it can reduce the effects of switching transient noise
on the control circuitry.
This pin is the positive supply of the control IC.
This is a 5.1 V reference. It is usually connected to the noninverting input of the error amplifier.
, however an external reference can also be used.
ref
Figure 21. V oltage Mode Operation
4
5
Oscillator
C
T
Output Voltage
Feedback Input
In voltage mode operation, the control range on the output of the Error
Amplifier from 0% to 90% duty cycle is from 2.25 V to 4.05 V.
6
7
3
1
V
ref
1.25 V
2
10
Figure 22. Current Mode Operation
4
5
Oscillator
C
From Current
Sense Element
Output Voltage
Feedback Input
In current mode control, an RC filter should be placed at the ramp input
to filter the leading edge spike caused by turn–on of a power MOSFET .
6
T
1.25 V
7
3
1
2
V
ref
MOTOROLA ANALOG IC DEVICE DATA
MC34023 MC33023
Figure 23. Resistive Current Sensing
9
The addition of an RC filter will eliminate instability caused by the
leading edge spike on the current waveform. This sense signal can also
be used at the ramp input pin for current mode control. For ramp
compensation it is necessary to know the gain of the current feedback
loop. If a transformer is used, the gain can be calculated by:
R
+
i
Sense
turns ratio
A
I
Sense
Figure 25A. Slope Compensation (Noise Sensitive)
C
T
Figure 24. Primary Side Current Sensing
9
The addition of an RC filter will eliminate instability caused by the
leading edge spike on the current waveform. This sense signal can also
be used at the ramp input pin for current mode control. For ramp
compensation it is necessary to know the gain of the current feedback
loop. The gain can be calculated by:
+
i
R
turns ratio
A
4
5
6
C
1
Oscillator
R
w
w
I
Sense
R
Current Sense
Information
This method of slope compensation is easy to implement, however, it
is noise sensitive. Capacitor C1 provides AC coupling. The oscillator
signal is added to the current signal by a voltage divider consisting of
resistors R1 and R2.
1
7
R
2
3
1.25 V
Figure 25B. Slope Compensation (Noise Immune)
R
Output
C
M
f
Ramp
Input
R
M
1.25 V
7
3
C
f
Current Sense
Transformer
R
w
Ramp
Figure 25.
Input
R
Output
R
M
C
When only one output is used, this method of slope compensation can be used and it is relatively noise immune. Resistor RM and capacitor CM provide the added
slope necessary. By choosing RM and CM with a larger time constant than the switching frequency, you can assume that its charge is linear . First choose CM, then
RM can be adjusted to achieve the required slope. The diode provides a reset pulse at the ramp input at the end of every cycle. The charge current IM can be calculated
by IM = CMSe. Then RM can be calculated by RM = VCC/I
f
C
f
M
1.25 V
7
Current Sense
3
M.
Resistor
MOTOROLA ANALOG IC DEVICE DATA
11
MC34023 MC33023
Figure 26. Dead Time Addition
V
ref
R
DT
4
5
R
6
T
Additional dead time can be added by the addition of a dead time
resistor from V
information.
C
T
to CT. See text on Oscillator section for more
ref
Oscillator
Figure 28. Current Mode Master/Slave Operation Over Short Distances
Figure 27. External Clock Synchronization
5.0 V
0 V
R
T
The sync pulse fed into the clock pin must be at least 3.9 V . RT and C
need to be set 10% slower than the sync frequency. This circuit is also
used in Voltage Mode operation for master/slave operation. The clock
signal would be coming from the master which is set at the desired
operating frequency, while the slave is set 10% slower.
4
5
6
C
T
Oscillator
T
Reference
Master
Oscillator
Master
Oscillator
4
5
6
R
C
T
T
4
V
5
ref
6
Slave
Oscillator
Figure 29. Synchronization Over Long Distances
1.0 k
4.7 k
20
MMBT3906
MMBD0914
MMBT3904
C
1.15 R
T
NC
T
16
4
5
6
2200
C
T
R
430
T
4
5
6
Slave
Oscillator
12
MOTOROLA ANALOG IC DEVICE DATA
MC34023 MC33023
Figure 30. Buffered Maximum Clamp Level
1
2
V
ref
R
1
R
2
In voltage mode operation, the maximum duty cycle can be clamped. By the
addition of a PNP transistor to buffer the clamp voltage, the Soft–Start current
is not affected by R1.
The new equation for Soft–Start is t
In current mode operation, this circuit will limit the maximum voltage allowed
at the ramp input to end a cycle.
8
C
SS
V
[
clamp
9.0 µA
+
)
0.6
(CSS)
Figure 32. MOSFET Parasitic Oscillations
Figure 31. Bipolar Transistor Drive
I
B
+
V
0
–
Base Charge
Removal
C
15
V
in
14
12
T o Current
Sense Input
The totem pole output can furnish negative base current for enhanced
transistor turn–off, with the addition of the capacitor in series with the base.
Figure 33. Isolated MOSFET Drive
R
S
V
C
V
in
15
14
12
To Current
R
S
Sense Input
A series gate resistor may be needed to dampen high frequency parasitic
oscillation caused by the MOSFET’s input capacitance and any series wiring
inductance in the gate–source circuit. The series resistor will also decrease the
MOSFET switching speed. A Schottky diode can reduce the driver’s power
dissipation due to excessive ringing, by preventing the output pin from being
driven below ground. The Schottky diode also prevents substrate injection when
the output pin is driven below ground.
V
C
15
14
12
The totem pole output can easily drive pulse transformers. A Schottky diode
is recommended when driving inductive loads at high frequencies. The diode
can reduce the driver’s power dissipation due to excessive ringing, by preventing
the output pin from being driven below ground.
MOTOROLA ANALOG IC DEVICE DATA
13
MC34023 MC33023
V = 5.0 V
µ
10 F
1.8
1500 pF 22
1
T
1N5819
in
V = 40 V to 56 V
47 k
4.7
15
O
1
1
L
1500 pF
22
Figure 34.
±
±
10 mVp–p
54 mV = 1.0%
14 mV = 0.275%
69.8%
MBR2535 CTL
MUR410
3.9 k
1.0 k
1600 pF
100
47
10
50
IRF640
10
4.7
2
Ω
0.3
1N5819
100
100
220 pF
47
inO
inO
V = 40 V to 56 V, I = 7.5A
V = 48 V, I = 4.0 A to 7.5 A
inO
inO
V = 48 V, I = 7.5 A
V = 48 V, I = 7.5 A
TestConditionResult
13
14
12
11
9
Line Regulation
Load Regulation
Output Ripple
Efficiency
Figure 34. Application Circuit
Reference
16
ref
V
CC
V
UVLO
Regulator
4.2 V
5
4
1.2 k
1.0
9.2 V
ref
V
UVLO
Oscillator
6
1000 pF
R
PWM
0.01
Current
Q
S
PWM Latch
Comparator
1.25 V
7
3
22 k
2.0 k
Limit
+
1
2
ref
V
µ
0.015 F
Shutdown
0.5 V
µ
9.0 A
Error
Amp
8
47 k
1.4 V
Soft–Start Latch
R
S
Q
0.1
Soft–Start
10
µ
Primary: 8 turns #48 A WG (1300 strands litz wire)
Secondary: 2 turns 0.003’’ (2 layers) copper foil
Bootstrap: 1 turn added to secondary #36 A WG
Core: Philips 3F3, part #4312 020 4124
Bobbin: Philips part #4322 021 3525
Coilcraft P3269–A
2 turns #48 A WG (1300 strands litz wire)
Core: Philips 3F3, part #EP10–3F3
Bobbin: Philips part #EP10PCB1–8
L = 1.8 H
–
1
T
–
1
L
Coilcraft P3270–A
µ
Ω
Output Rectifiers: AA VID Heatsink #533402B02552 with clip
Power FET : AAVID Heatsink #533902B02552 with clip
All power devices are insulated with Berquist Sil–Pad 150
5(1.5 ) resistors in parallel
10(1.0 F) ceramic capacitors in parallel
–
–
1
2
Insulators –
Heatsinks –
14
MOTOROLA ANALOG IC DEVICE DATA
100 pF
1000 pF
0.01
100 pF
0.01
MC34023
+10
MC34023 MC33023
Figure 35. PC Board With Components
1N5819
1N5819
2535CTI
MBR
1N5819
0.01
1500 pF
4.0
″
100
2200 pF
6.5
″
(Top View)
2535CTI
MBR
1500 pF
MOTOROLA ANALOG IC DEVICE DATA
15
MC34023 MC33023
Figure 36. PC Board Without Components
(Top View)
4.0
″
16
6.5
″
(Bottom View)
MOTOROLA ANALOG IC DEVICE DATA
MC34023 MC33023
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
–A–
916
B
18
F
C
S
–T–
H
G
D
16 PL
K
MM
TA0.25 (0.010)
–A–
916
–B–
P 8 PL
18
0.25 (0.010)
G 14 PL
C
–T–
SEATING
K
16 PL
D
0.25 (0.010)T AB
M
PLANE
SS
SEATING
PLANE
J
DW SUFFIX
PLASTIC PACKAGE
CASE 751G–02
(SO–16L)
MM
B
J
F
M
R
L
X 45°
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHESMILLIMETERS
MINMINMAXMAX
DIM
A
0.740
B
0.250
C
0.145
D
0.015
F
0.040
G
0.100 BSC
H
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
DIM
A
B
C
D
F
G
J
K
M
P
R
0.050 BSC
J
0.008
K
0.110
L
0.295
M
0
S
0.020
INCHES
MINMAX
0.411
0.400
0.299
0.292
0.104
0.093
0.019
0.014
0.035
0.020
0.050 BSC
0.012
0.010
0.009
0.004
0
°
0.395
0.415
0.010
0.029
°
0.770
0.270
0.175
0.021
0.070
0.015
0.130
0.305
10
°
0.040
MILLIMETERS
MINMAX
10.15
7.40
2.35
0.35
0.50
1.27 BSC
0.25
0.10
7
0
°
10.05
0.25
°
18.80
6.35
3.69
0.39
1.02
2.54 BSC
1.27 BSC
0.21
2.80
7.50
0
°
0.51
10.45
7.60
2.65
0.49
0.90
0.32
0.25
10.55
0.75
19.55
6.85
4.44
0.53
1.77
0.38
3.30
7.74
10
°
1.01
7
°
MOTOROLA ANALOG IC DEVICE DATA
17
MC34023 MC33023
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PACKAGE
CASE 775–02
(PLCC)
–L–
20
C
0.010 (0.250)T L
–N–
Y BRK
B
0.007 (0.180)T L
D
U
0.007 (0.180)T L
–M
SNSM
SNSM
–M
–M–
W
1
D
V
Z
G1
X
0.010 (0.250)T L
–M
SNSS
VIEW D–D
A
0.007 (0.180)T L
–M
SNSM
Z
G1
R
0.007 (0.180)T L
E
0.004 (0.100)
G
J
–T–
SEATING
PLANE
VIEW S
SNSS
–M
–M
SNSM
0.007 (0.180)T L
H
–M
SNSM
K1
K
F
0.007 (0.180)T L
–M
SNSM
VIEW S
NOTES:
1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE
TOP OF LEAD SHOULDER EXITS PLASTIC BODY
AT MOLD PARTING LINE.
2. DIM G1, TRUE POSITION TO BE MEASURED AT
DATUM –T–, SEATING PLANE.
3. DIM R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER
SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).
INCHESMILLIMETERS
MINMINMAXMAX
DIM
A
0.385
0.385
0.165
0.090
0.013
0.026
0.020
0.025
0.350
0.350
0.042
0.042
0.042
2
0.310
0.040
0.395
0.395
0.180
0.110
0.019
0.032
–
–
0.356
0.356
0.048
0.048
0.056
–
0.020
°
10
0.330
–
G1
K1
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
9.78
10.03
9.78
10.03
4.20
4.57
2.29
2.79
0.33
0.48
1.27 BSC0.050 BSC
0.66
0.81
0.51
–
0.64
–
8.89
9.04
8.89
9.04
1.07
1.21
1.07
1.21
1.07
1.42
–
0.50
°
2
7.88
1.02
10
8.38
°
–
°
18
MOTOROLA ANALOG IC DEVICE DATA
MC34023 MC33023
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1,
P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488
Mfax: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609ASIA /PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
INTERNET: http://motorola.com/sps
MOTOROLA ANALOG IC DEVICE DATA
– US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, T ai Po, N.T., Hong Kong. 852–26629298
◊
Mfax is a trademark of Motorola, Inc.
19
MC34023/D
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