Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1 Publication Order Number:
MC14516B/D
MC14516B
Binary Up/Down Counter
The MC14516B synchronous up/down binary counter is
constructed with MOS P–channel and N–channel enhancement mode
devices in a monolithic structure.
This counter can be preset by applying the desired value, in binary,
to the Preset inputs (P0, P1, P2, P3) and then bringing the Preset
Enable (PE) high. The direction of counting is controlled by applying
a high (for up counting) or a low (for down counting) to the
UP/DOWN input. The state of the counter changes on the positive
transition of the clock input.
Cascading can be accomplished by connecting the Carry Out
to the
Carry In of the next stage while clocking each counter in parallel. The
outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high
to the reset (R) pin.
This CMOS counter finds primary use in up/down and difference
counting. Other applications include: (1) Frequency synthesizer
applications where low power dissipation and/or high noise immunity
is desired, (2) Analog–to–digital and digital–to–analog conversions,
and (3) Magnitude and sign generation.
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Internally Synchronous for High Speed
• Logic Edge–Clocked Design — Count Occurs on Positive Going
Edge of Clock
• Single Pin Reset
• Asynchronous Preset Enable Operation
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky Load Over the Rated Temperature Range
MAXIMUM RATINGS (Voltages Referenced to V
SS
) (Note 2.)
Symbol Parameter Value Unit
V
DD
DC Supply Voltage Range –0.5 to +18.0 V
Vin, V
out
Input or Output Voltage Range
(DC or Transient)
–0.5 to VDD + 0.5 V
Iin, I
out
Input or Output Current
(DC or Transient) per Pin
±10 mA
P
D
Power Dissipation,
per Package (Note 3.)
500 mW
T
A
Ambient Temperature Range –55 to +125 °C
T
stg
Storage Temperature Range –65 to +150 °C
T
L
Lead Temperature
(8–Second Soldering)
260 °C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C T o 125_C
http://onsemi.com
A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
Device Package Shipping
ORDERING INFORMATION
MC14516BCP PDIP–16 2000/Box
MC14516BD SOIC–16 48/Rail
MC14516BDR2 SOIC–16 2500/Tape & Reel
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
MARKING
DIAGRAMS
1
16
PDIP–16
P SUFFIX
CASE 648
MC14516BCP
AWLYYWW
SOIC–16
D SUFFIX
CASE 751B
1
16
14516B
AWLYWW
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14516B
AWLYWW
MC14516BF SOEIAJ–16 See Note 1.
MC14516BFEL SOEIAJ–16 See Note 1.
This device contains protection circuitry to guard
against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high–impedance circuit. For proper
operation, V
in
and V
out
should be constrained to the
range V
SS
v (Vin or V
out
) v VDD.
Unused inputs must always be tied to an appropriate
logic voltage level (e.g., either V
SS
or VDD). Unused out-
puts must be left open.