Datasheet MC145157P2, MC145156DW2, MC145156P2, MC145157DW2, MC145152P2 Datasheet (Motorola)



SEMICONDUCTOR TECHNICAL DATA

1

REV 0

 Motorola, Inc. 1995

11/95

 

  
   

The MC74LVQ02 is a high performance, quad 2–input NOR gate
operating from a 2.7 to 3.6V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance.

Current drive capability is 12mA at the outputs.

• Designed for 2.7 to 3.6V V

CC

Operation – Ideal for Low Power/Low

Noise Applications

• Guaranteed Simultaneous Switching Noise Level and Dynamic

Threshold Performance

• Guaranteed Skew Specifications

• Guaranteed Incident Wave Switching into 75Ω

• Low Static Supply Current (10µA) Substantially Reduces System Power

Requirements

• Latchup Performance Exceeds 500mA

• ESD Performance: Human Body Model >2000V

Pinout: 14–Lead (Top View)

1314 12 11 10 9 8

21 3 4 5 6 7

VCCO

2 B2 A2 O3 B3 A3

O

0 A0 B0 O1 A1 B1 GND

1

O

0

2

A0

LOGIC DIAGRAM

3

B0

4

O

1

5

A1

6

B1

13

O

2

11

A2

12

B2

10

O

3

8

A3

9

B3

This document contains information on a new product. Specifications and information herein are subject to
change without notice.



LOW–VOLTAGE CMOS

QUAD 2–INPUT NOR GATE

LVQ

DT SUFFIX

PLASTIC TSSOP

CASE 948G–01

14

1

SD SUFFIX

PLASTIC SSOP
CASE 940A–03

14

1

M SUFFIX

PLASTIC SOIC EIAJ

CASE 965–01

14

1

D SUFFIX

PLASTIC SOIC

CASE 751A–03

14

1

PIN NAMES

Function

Data Inputs
Outputs

Pins

An, Bn
O

n

L

L
H
H

L

H

L

H

INPUTS OUTPUTS

An Bn

H

L
L
L

On

FUNCTION TABLE

MC74LVQ02

MOTOROLA LVQ DATA

BR1478

2

ABSOLUTE MAXIMUM RATINGS*

Symbol Parameter Value Condition Unit

V

CC

DC Supply Voltage –0.5 to +7.0 V

V

I

DC Input Voltage –0.5 ≤ VI ≤ VCC + 0.5V V

V

O

DC Output Voltage –0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State V

I

IK

DC Input Diode Current –20 VI = –0.5V mA

+20 VI = VCC + 0.5V mA

I

OK

DC Output Diode Current –20 VO = –0.5V mA

+20 VI = VCC + 0.5V mA

I

O

DC Output Source/Sink Current ±50 mA

I

CC

DC Supply Current ±200 mA

I

GND

DC Ground Current ±200 mA

T

STG

Storage Temperature Range –65 to +150 °C

* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or

conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Typ Max Unit

V

CC

Supply Voltage 2.0 3.3 3.6 V

V

I

Input Voltage 0 V

CC

V

V

O

Output Voltage 0 V

CC

V

T

A

Operating Free–Air Temperature –40 +85 °C

∆V/∆t Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V 0 125 mV/ns

DC ELECTRICAL CHARACTERISTICS

TA = –40°C to +85°C

Symbol Characteristic Condition Min Max Unit

V

IH

HIGH Level Input Voltage (Note 1) 2.7V ≤ VCC ≤ 3.6V,

VO = 0.1V or VCC – 0.1V

2.0 V

V

IL

LOW Level Input Voltage (Note 1) 2.7V ≤ VCC ≤ 3.6V,

VO = 0.1V or VCC – 0.1V

0.8 V

V

OH

HIGH Level Output Voltage 2.7V ≤ VCC ≤ 3.6V; IOH = –50µA VCC– 0.1 V

VCC = 2.7V; IOH = –12mA 2.2
VCC = 3.0V; IOH = –12mA 2.48

V

OL

LOW Level Output Voltage 2.7V ≤ VCC ≤ 3.6V; IOL = 50µA 0.1 V

2.7V ≤ VCC ≤ 3.6V; IOL= 12mA 0.4

I

I

Input Leakage Current 2.7V ≤ VCC ≤3.6V; VI= VCC, GND ±1.0 µA

I

OLD

Minimum Dynamic Output Current (Note 2) VCC = 3.6V; V

OLD

= 0.8V Max 36 mA

I

OHD

VCC = 3.6V; V

OHD

= 2.0V Min –25 mA

I

CC

Quiescent Supply Current 2.7V ≤ VCC ≤3.6V; VI = VCC, GND 10 µA

1. These values of VI are used to test DC electrical characteristics only. Functional test should use VIH ≥ 2.4V, VIL ≤ 0.5V.

2. Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed. Maximum test
duration is 2ms, one output loaded at a time.

MC74LVQ02

LCX DATA
BR1478

3 MOTOROLA

DYNAMIC SWITCHING CHARACTERISTICS (VCC = 3.3V)

TA = +25°C

Symbol Characteristic Condition Min Typ Max Unit

V

OLP

Dynamic LOW Peak Voltage (Note 1) CL = 50pF, VIH = 3.3V, VIL = 0V 0.6 1.0 V

V

OLV

Dynamic LOW Valley Voltage (Note 1) CL = 50pF, VIH = 3.3V, VIL = 0V –0.5 –1.0 V

V

IHD

High Level Dynamic Input Voltage
(Note 2)

Input–Under–Test Switching 0V to Threshold,

f=1MHz

1.5 2.0 V

V

ILD

Low Level Dynamic Input Voltage
(Note 2)

Input–Under–Test Switching 3.3V to Threshold,

f=1MHz

1.5 0.8 V

1. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW. The remaining output is measured in the
LOW state.

2. Number of data inputs is defined as “n” switching, “n–1” inputs switching 0V to 3.3V.

AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω)

Limits

TA = +25°C TA = –40°C to +85°C

VCC = 3.0V to 3.6V VCC = 2.7V VCC = 3.0V to 3.6V VCC = 2.7V

Symbol Parameter Min Typ Max Min Typ Max Min Max Max Unit

t

PLH

t

PHL

Propagation Delay
Input to Output

2.0

1.5

7.0

5.0

9.5

8.0

2.0

1.5

7.5

5.5

11.0

9.0

2.0

1.0

10.0

8.5

11.5

9.5

ns

t

OSHL

t

OSLH

Output–to–Output Skew
(Note 1)

1.0

1.0

1.5

1.5

1.0

1.0

1.5

1.5

1.5

1.5

ns

1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t

OSHL

) or LOW–to–HIGH (t

OSLH

); parameter

guaranteed by design.

CAPACITIVE CHARACTERISTICS

Symbol Parameter Condition Typical Unit

C

PD

Power Dissipation Capacitance 10MHz, VCC = 3.3V, VI = 0V or V

CC

22 pF

C

IN

Input Capacitance VCC = Open, VI = 0V or V

CC

4.5 pF

MC74LVQ02

MOTOROLA LVQ DATA

BR1478

4

PROPAGATION DELAYS

tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns

V

CC

0V

V

OH

V

OL

An, Bn

O

n

t

PLH

t

PHL

50% V

CC

50% V

CC

50% V

CC

50% V

CC

Figure 1. AC Waveforms

PULSE

GENERATOR

R

T

DUT

V

CC

R

L

C

L

CL = 50pF or equivalent (Includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = Z

OUT

of pulse generator (typically 50Ω)

Figure 2. Test Circuit

MC74LVQ02

LCX DATA
BR1478

5 MOTOROLA

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

ISSUE F

MIN MINMAX MAX

MILLIMETERS INCHES

DIM

A
B
C
D

F

G

J
K
M

P
R

8.55

3.80

1.35

0.35

0.40

0.19

0.10
0

°

5.80

0.25

8.75

4.00

1.75

0.49

1.25

0.25

0.25
7

°

6.20

0.50

0.337

0.150

0.054

0.014

0.016

0.008

0.004
0

°

0.228

0.010

0.344

0.157

0.068

0.019

0.049

0.009

0.009
7°

0.244

0.019

1.27 BSC 0.050 BSC

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

–A

–

–B–P 7 PL

G

C

K

SEATING
PLANE

D 14 PL

M

J

R

X 45°

1

7

814

0.25 (0.010) T B A

M

S S

B0.25 (0.010)

M M

F

M SUFFIX

PLASTIC SOIC EIAJ PACKAGE

CASE 965–01

ISSUE O

Z

D

HEE

1

14 8

7

b

A

1

A

e

L

DIM MIN MAX MIN MAX

INCHES

--- 2.05 --- 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.18 0.27 0.007 0.011

9.90 10.50 0.390 0.413

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059
0

0.70 0.90 0.028 0.035

--- 1.42 --- 0.056

A

1

A

b
c

D

E
e

L

M

Z

H

E

Q

1

L

E

_

10

_

0

_

10

_

L

E

Q

1

c

M

_

VIEW P

DETAIL P

NOTES:

1 DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSIONS D AND E DO NOT INCLUDE MOLD

FLASH OR PROTRUSIONS AND ARE MEASURED

AT THE PARTING LINE. MOLD FLASH OR

PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)

PER SIDE.
4 TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.
5 THE LEAD WIDTH DIMENSION (b) DOES NOT

INCLUDE DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08 (0.003)

TOTAL IN EXCESS OF THE LEAD WIDTH

DIMENSION AT MAXIMUM MATERIAL CONDITION.

DAMBAR CANNOT BE LOCATED ON THE LOWER

RADIUS OR THE FOOT. MINIMUM SPACE

BETWEEN PROTRUSIONS AND ADJACENT LEAD

TO BE 0.46 ( 0.018).

0.13 (0.005)

M

0.10 (0.004)

MC74LVQ02

MOTOROLA LVQ DATA

BR1478

6

OUTLINE DIMENSIONS

DIMAMIN MAX MIN MAX

INCHES

6.07 6.33 0.238 0.249

MILLIMETERS

B 5.20 5.38 0.205 0.212
C 1.73 1.99 0.068 0.078
D 0.05 0.21 0.002 0.008
F 0.63 0.95 0.024 0.037
G 0.65 BSC 0.026 BSC
H 1.08 1.22 0.042 0.048
J 0.09 0.20 0.003 0.008

J1 0.09 0.16 0.003 0.006

K 0.25 0.38 0.010 0.015

K1 0.25 0.33 0.010 0.013

_ _ _ _

NOTES:

6 DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.
7 CONTROLLING DIMENSION: MILLIMETER.
8 DIMENSION A DOES NOT INCLUDE MOLD FLASH,

PROTRUSIONS OR GATE BURRS. MOLD FLASH

OR GATE BURRS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.
9 DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED 0.15 (0.006)

PER SIDE.

10 DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION/INTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN

EXCESS OF K DIMENSION AT MAXIMUM

MATERIAL CONDITION. DAMBAR INTRUSION

SHALL NOT REDUCE DIMENSION K BY MORE

THAN 0.07 (0.002) AT LEAST MATERIAL

CONDITION.

11 TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

12 DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE –W–.

H

A

B

14 8

71

F

M

K14X REF

S

U

M

0.12 (0.005) V

S

T

L

L/2

PIN 1
IDENT

S

U

M

0.20 (0.008) T

–V–

–U–

D

C

0.076 (0.003)

G

–T–

SEATING
PLANE

DETAIL E

DETAIL E

–W–

N

N

0.25 (0.010)

K

J

J1

K1

SECTION N–N

L 7.65 7.90 0.301 0.311
M 0 8 0 8

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948G–01

ISSUE O

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C ––– 1.20 ––– 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC
M 0 8 0 8

NOTES:

1 DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSION A DOES NOT INCLUDE MOLD FLASH,

PROTRUSIONS OR GATE BURRS. MOLD FLASH

OR GATE BURRS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.
4 DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED

0.25 (0.010) PER SIDE.

5 DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN

EXCESS OF THE K DIMENSION AT MAXIMUM

MATERIAL CONDITION.
6 TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.
7 DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE –W–.

_ _ _ _

S

U0.15 (0.006) T

2X L/2

S

U

M

0.10 (0.004) V

S

T

L

–U–

SEATING
PLANE

0.10 (0.004)

–T–

SECTION N–N

DETAIL E

J

J1

K

K1

DETAIL E

F

M

–W–

0.25 (0.010)

8

14

7

1

PIN 1
IDENT.

H

G

A

D

C

B

S

U0.15 (0.006) T

–V–

14X REFK

N

N

SD SUFFIX

PLASTIC SSOP PACKAGE

CASE 940A–03

ISSUE B

MC74LVQ02

LCX DATA
BR1478

7 MOTOROLA

How to reach us:
USA/EUROPE: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki,

P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315

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INTERNET: http://Design–NET.com 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters can and do vary in different
applications. All operating parameters, including “T ypicals” must be validated for each customer application by customer’s technical experts. Motorola does
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MC74LVQ02/D

*MC74LVQ02/D*

◊