MOTOROLA MC141531 Technical data

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
LCD Segment / Common Driver
CMOS
MC141531 is a CMOS LCD Driver which consists of 3 annunciator out­puts and 137 high voltage LCD driving signals (17 common and 120 seg­ment). It has parallel interface capability for operating with general MCU. Besides the general LCD driver features, it has on chip LCD bias voltage generator circuits such that limited external component is required during application.
Single Supply Operation, 2.4 V - 3.5 V
Operating Temperature Range : -30˚C to 85˚C
Low Current Stand-by Mode (<500nA)
On Chip Bias DC/DC Converter
8 bit Parallel Interface
Graphic Mode Operation
On Chip 120x17 Graphic Display Data RAM
Master clear RAM
120 Segment Drivers, 17 Common Drivers
1/16, 1/17 Multiplex Ratio
1:5 bias ratio
Re-mapping of Row and Column Drivers
Three Stand Alone Annunciator (Static Icon) Driver Circuits
Low Power Icon Mode Driven by Com16 in Special Driving Scheme
Selectable LCD Drive Voltage Temperature Coefficients
16 level Internal Contrast Control
External Contrast Control
Standard TAB (Tape Automated Bonding) Package, Gold Bump Die
MC141531
MC141531T
TAB
MCC141531Z Gold Bump Die
ORDERING INFORMATION
MC141531T TAB MCC141531Z Gold Bump Die
REV 4 3/97
This document contains information on a new product. Specifications and information herein are subject to change without notice.
MC141531MOTOROLA
3–139
BP
Annun0
to
Annun2
Com0 to
Com16
Block Diagram
Seg0~Seg119
OSC1
OSC2
Annunciator
Control
Circuit
Display
Timing
Generator
HV Buffer Cell Level Shifter
17 Bit Latch
120 Bit Latch
GDDRAM
17 x 120Bits
Command Decoder
Level
Selector
LCD Driving
DC/DC Converter
Tripler,
Doubler,
Voltage Regulator,
Voltage Divider,
Contrast Control,
Temperature
Compensation
VLL6
VLL2 VCC
VR VF C2P C2N C1P C1N
C+ C­AVDD AVSS
DVSS DVDD
MC141531
3–140
Parallel InterfaceCommand Interface
C
RES R/W D0~D7
D/
CS (CLK)
MOTOROLA
DUMMY
COM16
174
COM0
COM1
COM2
COM3
COM4.......COM13
172
171
.......
170
169
173
160
COM14
COM15
159
158
COM16
SEG0
157
156
SEG1
SEG2
SEG3
SEG4........................
.......................
155
154
153
152
SEG117
SEG118
SEG119
ANNUN0
.
39383736353433
ANNUN1
ANNUN2
BP
DUMMY
12345678910111213141516171819202122232425262728293031
C-
OSC2
DUMMY
VR
AVSS
VF
VCC
C+
VLL6
VLL5
VLL4
VLL3
OSC1
VLL2
C1N
C1P
D7D6D5D4D3D2D1
C2P
C2N
AVDD
D0
DVSS
CS (CLK)
MC141531T PIN ASSIGNMENT
(COPPER VIEW)
R/W
D/C
RES
32
DVDD
DUMMY
MC141531MOTOROLA
3–141
MC141531 Die Pin Assignment
COM5
COM4
SEG113
SEG114
COM7
COM6
SEG111
SEG112
COM8
M
SEG110
COM10
COM9
SEG108
SEG109
65
180
179
COM11 COM12 COM13 COM14 COM15 COM16 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 SEG81 SEG82 SEG83 SEG84 SEG85 SEG86 SEG87 SEG88 SEG89 SEG90 SEG91 SEG92 SEG93 SEG94 SEG95 SEG96 SEG97 SEG98 SEG99 SEG100 SEG101 SEG102 SEG103 SEG104 SEG105 SEG106 SEG107
66
COM16
COM3
COM2
COM1
COM0
191
1
OSC2
AVSS
VR
VF
VCC
C-
C+ VLL6 VLL5 VLL4 OSC1 VLL3 VLL2
C1N
C1P
C2N
C2P AVDD AVDD
DVSS DVSS DVSS
D7
DVSS
D6
DVSS
D5
DVSS
D4
DVSS
D3
DVSS
D2
DVSS
D1
DVSS
D0
DVSS
CS
DVSS
W
R/
DVSS
C
D/
RES
DVDD
BP
DVSS
Y
ANNUN2
DVSS
ANNUN1
DVSS
ANNUN0
DVSS
X
53
54
SEG115
SEG116
SEG117
SEG118
SEG119
MC141531
3–142
MOTOROLA
MAXIMUM RATINGS* (Voltages Referenced to V
, TA=25˚C)
SS
Symbol Parameter Value Unit
AV
,DV
DD
V
CC
V
in
I Current Drain Per Pin Excluding VDD and V
T
A
T
stg
Supply Voltage -0.3 to +4.0 V
DD
VSS-0.3 to VSS+10.5 V
Input Voltage VSS-0.3 to VDD+0.3 V
SS
25 mA Operating Temperature -30 to +85 ˚C Storage Temperature Range -65 to +150 ˚C
This device contains circuitry to protect the inputs against damage due to high static voltages or elec­tric fields; however, it is advised that normal precau­tions to be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation it is recom­mended that Vin and V range VSS < or = (Vin or V
be constrained to the
out
) < or = VDD. Reliability
out
of operation is enhanced if unused input are con­nected to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. This device may be light sensitive. Caution should be taken to avoid exposure of this device to
* Maximum Ratings are those values beyond which damage to the device may occur. Functional
operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descrip-
any light source during normal operation. This device is not radiation protected.
tion section. VSS = AVSS = DVSS (DVSS = VSS of Digital circuit, AVSS = VSS of Analogue Circuit) VDD = AVDD = DVDD (DVDD = VDD of Digital circuit, AVDD = VDD of Analogue Circuit)
ELECTRICAL CHARACTERISTICS (Voltage Referenced to VSS, VDD=2.4 to 3.5V, TA=25˚C)
Symbol Parameter Test Condition Min Typ Max Unit
DV AV
Logic Circuit Supply Voltage Range
DD
DC/DC Converter Circuit Supply Voltage Range
DD
I
Access Mode Supply Current Drain
AC
(AVDD + DVDD Pins)
I
Display Mode Supply Current Drain
DP
(AVDD + DVDD Pins)
I
Standby Mode Supply Current Drain
SB1
(AVDD + DVDD Pins)
(Absolute value referenced to VSS) 2.4
2.4
VDD=3.0V, Internal DC/DC Converter On, Tripler Enabled, Annunciator On/Off, R/W accessing, T
=1MHz, Osc. Freq.=38.4kHz, Display On, 1/7
cyc
Mux Ratio VDD=3.0V, Internal DC/DC Converter On, Tripler Enabled, Annunciator On/Off, R/W halt, Osc. Freq.=38.4kHz, Display On, 1/17Mux Ratio
VDD=3.0V, Display off, Oscillator Disabled, R/W halt.
3.0
-
0
0
0
200
75
300
3.5
3.5
300
165
500
V V
µA
µA
nA
V
V
V
I
Annunciator Mode Supply Current Drain
SB2
(AVDD + DVDD Pins)
I
Icon Mode Supply Current Drain
SB3
(AVDD + DVDD Pins)
LCD Driving DC/DC Converter Output
CC1
(VCC Pin)
LCD Driving DC/DC Converter Output
CC2
(VCC Pin)
LCD Driving Voltage Input (VCC Pin)
LCD
VDD=3.0V, Annunciator Mode, Internal Oscillator, Oscillator Enabled, Display Off, R/W halt, Int Osc. Freq.=38.4kHz.
VDD=3.0V, Icon Mode, Internal Oscillator, Oscillator Enabled, Display Off, R/W halt, Ext Osc. Freq.=38.4kHz.
Display On, Internal DC/DC Converter Enabled, Tripler Enabled, Osc. Freq.=38.4KHz, Regulator Enabled, Divider Enabled.
Display On, Internal DC/DC Converter Enabled, Doubler Enabled, Osc. Freq.=38.4KHz, Regulator Enabled, Divider Enabled.
Internal DC/DC Converter Disabled.
0
0
-
-
5
3*AV
2*AV
5
-
-
DD
DD
10
25
10.5
7
10.5
µA
µA
V
V
V
MC141531MOTOROLA
3–143
ELECTRICAL CHARACTERISTICS (Voltage Referenced to VSS, VDD=2.4 to 3.5V, TA=25˚C)
Symbol Parameter Test Condition Min Typ Max Unit
V
Input high voltage
IH1
0.8*V
DD
-
V
DD
(RES, OSC2, CS, D0-D7, R/W, D/C, OSC1)
V
Input Low voltage
IL1
0
-
0.2*V
DD
(RES, OSC2, CS, D0-D7, R/W, D/C, OSC1)
V
LCD Display Voltage Output
LL6
V
LL5
V
LL4
V
LL3
V
LL2
V
LL6
V
LL5
V
LL4
V
LL3
V
LL2
I
OH
(V
, V
LL5
, V
LL4
LL6
LCD Display Voltage Input
(V
, V
LL5
, V
LL4
LL6
Output High Current Source
(D0-D7, Annun0-2, BP, OSC2)
I
Output Low Current Drain
OL
(D0-D7, Annun0-2, BP, OSC2)
I
Output Tri-state Current Drain Source
OZ
(D0-D7, OSC2)
IIL/IIHInput Current
, V
, V
LL3
LL3
, V
, V
LL2
LL2
Pins)
Pins)
Voltage Divider Enabled
External DC/DC Converter, Voltage Divider Disable
V
V
out=VDD
=0.4V
out
-0.4V
-
-
-
-
-
5 0 0 0 0
50
-
-1
V
0.8*V
0.6*V
0.4*V
0.2*V
-
-
-
-
-
-
-
-
R
-
-
R
-
R
-
R
-
R
V
CC
V
LL6
V
LL5
V
LL4
V
LL3
-
-50
1
-1 - 1 µA
(RES, OSC2, CS, D0-D7, R/W, D/C , OSC1)
R
Channel resistance between LCD driving signal
on
pins (SEG and COM) and driving voltage input pins (V
V
Memory Retention Voltage (DVDD) Standby mode, retain all internal configuration and
SB
LL2
to V
LL6
)
During Display on, 0.1V apply between two termi­nals, VCC within operating voltage range
- - 10 k
2--V
RAM data
CINInput Capacitance
- 5 7.5 pF
(OSC1, OSC2, all logic pins)
Temperature Coefficient Compensation* PTC0 PTC1 PTC2 PTC3
V
CN
Flat Temperature Coefficient Temperature Coefficient 1* Temperature Coefficient 2*
Temperature Coefficient 3*
Internal Contrast Control
(VR Output Voltage)
TC1=0, TC2=0, Voltage Regulator Disabled TC1=0, TC2=1, Voltage Regulator Enabled TC1=1, TC2=0, Voltage Regulator Enabled TC1=1, TC2=1, Voltage Regulator Enabled
Regulator Enabled, Internal Contrast control Enabled. (16 Voltage Levels Controlled by Software.
-
-
-
-
0.0
-0.18
-0.22
-0.35
-
-
-
-
- ± 18 - %
Each level is typically 2.25% of the Regulator Output Voltage. )
*The formula for the temperature coefficient (TC) is:
V
V
V V V V V
V V V V V
µA
µA
µA
% % % %
TC(%)=
VR at 50˚C - VR at 0˚C
50˚C - 0˚C
MC141531
3–144
X
VR at 25˚C
1
X100%
MOTOROLA
AC ELECTRICAL CHARACTERISTICS (TA=25˚C, Voltage referenced to VSS, AVDD=DVDD=3V)
Symbol Parameter Test Condition Min Typ Max Unit
F
F
F
Oscillation Frequency of Display timing generator 60Hz Frame Frequency
OSC
Either External Clock Input or Internal Oscillator Enabled
Backplane Frequency of Annunciator
ANN
(Annun0-3, BP)
Frame Frequency Graphic Display Mode,
FRM
50% duty cycle Annunciator on, Fosc=38.4KHz
Timing generator freq. = 38.4kHz
- 38.4 - kHz
-30-Hz
-60
-Hz
OSC Internal Oscillation Frequency with different value
of feedback resistor
Note: F
F
FRM
ANN
= F
= F
OSC
OSC
/ 640
/ 1280
280k
260k
90k
70k
Oscillation Frequency (Hz)
50k
30k
10k
100k 500k 1.0M 1.5M 2.0M
Figure 1. Internal Oscillator Frequency Relationship with External Resistor Value
Icon Mode, Timing generator freq. = 38.4kHz Internal Oscillator Enabled, VDD within operation
range
Resistor Value between OSC1 and OSC2 ()
TBD
See Figure 1 for the relationship
MC141531MOTOROLA
3–145
TABLE 2a. Parallel Timing Characteristics (Write Cycle) (TA=-30 to 85˚C, DVDD=2.4 to 3.5V, VSS=0V)
Symbol Parameter Min Typ Max Unit
t
cycle
t
EH
t
AS
t
DS
t
DH
t
AH
Enable Cycle Time 600 - - ns Enable Pulse Width 290 - - ns Address Setup Time 5 - - ns Data Setup Time 290 - - ns Data Hold Time 20 - - ns Address Hold Time 20 - - ns
t
cycle
CS
t
EH
R/W
D/C
D0-D7
t
AS
t
DS
Valid Data
Figure 3. Timing Characteristics (Write Cycle)
t
AH
t
DH
MC141531
3–146
MOTOROLA
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