Motorola MC10165L, MC10165P Datasheet

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SEMICONDUCTOR TECHNICAL DATA
3–87
REV 6
Motorola, Inc. 1996
9/96
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The MC10165 is a device designed to encode eight inputs to a binary coded output. The output code is that of the highest order input. Any input of lower priority is ignored. Each output incorporates a latch allowing synchronous operation. When the clock is low the outputs follow the inputs and latch when the clock goes high. This device is very useful for a variety of applications in checking system status in control processors, peripheral controllers, and testing systems.
The input is active when high, (e.g., the three binary outputs are low when input D0 is high). The Q3 output is high when any input is high. This allows direct extension into another priority encoder when more than eight inputs are necessary. The MC10165 can also be used to develop binary codes from random logic inputs, for addressing ROMs, RAMs, or for multiplexing data.
PD= 545 mW typ/pkg (No Load) tpd= 4.5 ns typ (Data to Output)
tr, tf= 2.0 ns typ (20%–80%)
TRUTH TABLE
DATA INPUTS OUTPUTS
D0 D1 D2 D3 D4 D5 D6 D7 Q3 Q2 Q1 Q0
H X X X X X X X H L L L L H X X X X X X H L L H L L H X X X X X H L H L L L L H X X X X H L H H L L L L H X X X H H L L L L L L L H X X H H L H L L L L L L H X H H H L L L L L L L L H H H H H L L L L L L L L L L L L
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PIN ASSIGNMENT
V
CC1
Q1 Q0
CLOCK
D0 D7 D1
V
EE
V
CC2
Q2 Q3 D2 D5 D4 D3 D6
16 15 14 13 12 11 10
9
1 2 3 4 5 6 7 8
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
MC10165
MOTOROLA MECL Data
DL122 — Rev 6
3–88
C 4
D0 5
D1 7
D2 13
D3 10
D4 11
D5 12
D6 9
D7 6
3 Q0
2 Q1
15 Q2
14 Q3
LOGIC DIAGRAM
V
CC1
= PIN 1
V
CC2
= PIN 16
VEE= PIN 8
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