The MC100LVEL/100EL14 is a low skew 1:5 clock distribution chip
designed explicitly for low skew clock distribution applications. The
device can be driven by either a differential or single-ended ECL or, if
positive power supplies are used, PECL input signal. The LVEL14 is
functionally and pin compatible with the EL14 but is designed to operate
in ECL or PECL mode for a voltage supply range of –3.0V to –3.8V ( or
3.0V to 3.8V). If a single-ended input is to be used the VBB output should
be connected to the CLK
capacitor. The VBB output is designed to act as the switching reference
for the input of the LVEL14 under single-ended input conditions, as a
result this pin can only source/sink up to 0.5mA of current.
The LVEL14 features a multiplexed clock input to allow for the
distribution of a lower speed scan or test clock along with the high speed
system clock. When LOW (or left open and pulled LOW by the input
pulldown resistor) the SEL pin will select the differential clock input.
The common enable (EN
be enabled/disabled when they are already in the LOW state. This avoids
any chance of generating a runt clock pulse when the device is
enabled/disabled as can happen with an asynchronous control. The
internal flip flop is clocked on the falling edge of the input clock, therefore
all associated specification limits are referenced to the negative edge of
the clock input.
input and bypassed to ground via a 0.01µF
) is synchronous so that the outputs will only
20
1
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D-04
• 50ps Output-to-Output Skew
• Synchronous Enable/Disable
• Multiplexed Clock Input
• 75kΩ Internal Input Pulldown Resistors
• >2000V ESD Protection
• V
Range of –3.0V to –5.5V
EE
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
V
EN
V
CC
Q0
1920
21
Q0
NCSCLK
CC
17181615141312
D
Q
43
Q1Q2Q3Q4
CLKCLKVBBSELV
1 0
56789
Q2Q1
PIN DESCRIPTION
PINFUNCTION
CLKDiff Clock Inputs
SCLKScan Clock Input
EN
SELClock Select Input
V
BB
Q
0–4
EE
11
10
Q4Q3
FUNCTION TABLE
CLK
L
H
X
X
X
* On next negative transition of
CLK or SCLK
Sync Enable
Reference Output
Diff Clock Outputs
SCLK
X
X
L
H
X
SEL
L
L
H
H
X
EN
L
L
L
L
H
Q
L
H
L
H
L*
7/95
Motorola, Inc. 1996
4–1
REV 1
MC100LVEL14 MC100EL14
ABSOLUTE MAXIMUM RATINGS
Symbol
V
EE
V
I
I
out
T
A
V
EE
1. Absolute maximum rating, beyond which, device life may be impaired, unless otherwise specified on an individual data sheet.
2. Parametric values specified at:100EL Series:–4.20V to –5.50V
Power Supply (VCC = 0V)–8.0 to 0VDC
Input Voltage (VCC = 0V)0 to –6.0VDC
Output CurrentContinuous
Operating Temperature Range–40 to +85°C
Operating Range
1
CharacteristicRatingUnit
Surge
1,2
10EL Series:–4.94V to –5.50V
50
100
–5.7 to –4.2V
mA
DC CHARACTERISTICS (VEE = VEE(min) – VEE(max); VCC = GND1)
1. This table replaces the three tables traditionally seen in ECL 100K data books. The same DC parameter values at VEE = –4.5V now apply across
the full VEE range of –3.0V to –5.5V . Outputs are terminated through a 50Ω resistor to –2.0V except where otherwise specified on the individual
data sheets.
Output HIGH Voltage–1085–1005–880–1025–955–880mVVIN = VIH(max)
Output LOW Voltage–1830–1695–1555–1810–1705–1620mVor VIL(min)
Output HIGH Voltage–1095——–1035——mVVIN = VIH(max)
Output LOW Voltage——–1555——–1610mVor VIL(min)
Input HIGH Voltage–1165—–880–1165—–880mV
Input LOW Voltage–1810—–1475–1810—–1475mV
Input LOW CurrentCLK
1. Skews are specified for identical LOW-to-HIGH or HIGH-to-LOW transitions.
2. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within
the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The
numbers in the spec table assume a nominal VEE = –3.3V . Note for PECL operation, the V
1. Skews are specified for identical LOW-to-HIGH or HIGH-to-LOW transitions.
2. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within
the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The
numbers in the spec table assume a nominal VEE = –4.5V . Note for PECL operation, the V
Power Supply Current
Output Ref100LVEL
Voltage100EL
Input High Current150150150150µΑ
PropCLK to Q (Diff)
DelayCLK to Q (SE)
Part-to-Part Skew
Within-Device Skew
Setup Time EN0000ps
Hold Time EN0000ps
Minimum Input Swing CLK
Common Mode Range
Output Rise/Fall Times Q
(20% – 80%)
100L VEL
100EL
SCLK to Q
1
2
VPP < 500mV
VPP ≥ 500mV
–1.43
–1.38
520
470
470
150150150150mV
–3.2
–3.0
230500230500230500230500ps
323240
40
–1.30
–1.26
720
770
770
200
50
–0.4
–0.4
–1.38
–1.38
550
500
500
–3.3
–3.1
323240
40
–1.27
–1.26
750
800
800
200
50
–0.4
–0.4
–1.35
–1.38
580
530
530
–3.3
–3.1
323240
40
–1.25
–1.31
–1.26
–1.38
680
780
830
830
200
50
–0.4
–0.4
630
580
580
–3.3
–3.1
680
680
(min) will be fixed at 5.0V – |V
CMR
343442
–1.19
–1.26
42
830
880
880
20050ps
–0.4
–0.4
(min)|.
CMR
mA
ps
V
V
DL140 — Rev 3
4–3MOTOROLAECLinPS and ECLinPS Lite
MC100LVEL14 MC100EL14
-A-
1120
-B-
P 10 PL
110
D
20 PL
0.010 (0.25)TAB
M
G18 PL
SS
C
K
-T-
SEATING
PLANE
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D-04
ISSUE E
J
F
MM
B
M
0.010 (0.25)
R X 45°
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
MILLIMETERSINCHES
MINMINMAXMAX
DIM
12.65
A
7.40
B
2.35
C
0.35
D
0.50
F
1.27 BSC0.050 BSC
G
J
0.25
K
0.10
M
0
°
P
10.05
R
0.25
12.95
7.60
2.65
0.49
0.90
0.32
0.25
7
10.55
0.75
0.499
0.510
0.292
0.299
0.093
0.104
0.014
0.019
0.020
0.035
0.010
0.012
0.004
0.009
0
7
°
°
°
0.395
0.010
0.415
0.029
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–54543–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: RMF AX0@email.sps.mot.com – T OUCHTONE 602–244–6609ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
INTERNET: http://Design–NET .com51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
MOTOROLAECLinPS and ECLinPS Lite
4–4
*MC100LVEL14/D*
◊
MC100LVEL14/D
DL140 — Rev 3
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