MOTOROLA MC10E337, MC100E337 Technical data


SEMICONDUCTOR TECHNICAL DATA
2–1
REV 2
Motorola, Inc. 1996
12/93
    
The MC10E/100E337 is a 3-bit registered bus transceiver with scan. The bus outputs (BUS0–BUS2) are specified for driving a 25 bus; the receive outputs (Q0 – Q2) are specified for 50. The bus outputs feature a normal HIGH level (VOH) and a cutoff LOW level — when LOW, the outputs go to – 2.0V and the output emitter-follower is “off”, presenting a high impedance to the bus. The bus outputs also feature edge slow-down capacitors.
Scannable Version of E336
25 Cutoff Bus Outputs
50 Receiver Outputs
Scannable Registers
Sync. and Async. Bus Enables
Non-inverting Data Path
1500ps Max. Clock to Bus (Data Transmit)
1000ps Max. Clock to Q (Data Receive)
Bus Outputs Feature Internal Edge Slow-Down Capacitors
Additional Package Ground Pins
Extended 100E V
EE
Range of – 4.2V to – 5.46V
75k Input Pulldown Resistors
Both drive and receive sides feature the same logic, including a loopback path to hold data. The HOLD/LOAD
function is controlled by Transmit Enable (TEN) and Receive Enable (REN) on the transmit and receive sides respectively, with a HIGH selecting LOAD. Note that the implementation of the E337 Receive Enable differs from that of the E336.
A synchronous bus enable (SBUSEN) is provided for normal, non-scan operation. The asynchronous bus disable (ABUSDIS
)
disables the bus immediately for scan mode.
The SYNCEN
input is provided for flexibility when re-enabling the bus after disabling with ABUSDIS, allowing either
synchronous or asynchronous re-enabling. An alternative use is asynchronous-only operation with ABUSDIS
, in which case
SYNCEN
is tied LOW, or left open. SYNCEN is implemented as an overriding SET control (active-LOW) to the enable flip-flop.
Scan mode is selected by a HIGH at the SCAN input. Scan input data is shifted in through S_IN and output data appears at the
Q2 output.
All registers are clocked on the positive transition of CLK. Additional lead-frame grounding is provided through the Ground pins
(GND) which should be connected to 0V. The GND pins are not electrically connected to the chip.
PIN NAMES
Pin Function
A0– A
2
Data Inputs A
B0– B
2
Data Inputs B S-IN Serial (Scan) Data Input TEN, REN HOLD/LOAD Controls SCAN Scan Control ABUSDIS Asynchronous Bus Disable SBUSEN Synchronous Bus Enable SYNCEN Synchronous Enable Control CLK Clock BUS0 – BUS2 25 Cutoff Bus Outputs Q0– Q
2
Receive Data Outputs (Q2 serves as SCAN_OUT in scan mode)


3-BIT SCANNABLE
REGISTERED
BUS TRANSCEIVER
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
查询MC100E337供应商
MC10E337 MC100E337
MOTOROLA ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–2
LOGIC DIAGRAM
SCAN
S-IN
TEN
V
EE
REN
CLK
A
1
26
27
28
2
3
4
25 24 23 22 21 20 19
18
17
16
15
14
13
12
115 6 7 8 9 10
SBUSEN SYNCEN
B0A0ABUSDIS V
CCOQ0
GND
BUS0
V
CC
Q
1
V
CCO
BUS1
GND
B1A2B2V
CCO
BUS2 GND Q
2
A
2
B
2
A
1
B
1
A
0
B
0
S_IN
TEN
REN
SCAN
ABUSDIS
SYNCEN
SBUSEN
CLK
BUS2
Q2/ SCAN_OUT
BUS1
Q
1
BUS0
Q
0
D Q
D Q
D Q
D Q
D Q
D Q
D Q SET
1
Pinout: 28-Lead PLCC (Top View)
* All VCC and V
CCO
pins are tied together on the die.
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