MOTOROLA MC10E193FN, MC10E193FNR2, MC100E193FNR2 Datasheet
SEMICONDUCTOR TECHNICAL DATA
2–1
REV 3
Motorola, Inc. 1996
7/96
The MC10E/100E193 is an error detection and correction (EDAC)
circuit. Modified Hamming parity codes are generated on an 8-bit word
according to the pattern shown in the logic symbol. The P5 output gives
the parity of the whole word. The word parity is also provided at the PGEN
pin, after Odd/Even parity control and gating with the BPAR input. This
output also feeds to a 1-bit shiftable register, for use as part of a scan ring.
Used in conjunction with 12-bit parity generators such as the E160, a
SECDED (single error correction, double error detection) error system
can be designed for a multiple of an 8-bit word.
• Hamming Code Generation
• 8-Bit Word, Expandable
• Provides Parity of Whole Word
• Scannable Parity Register
• Extended 100E V
EE
Range of – 4.2V to – 5.46V
• 75kΩ Input Pulldown Resistors
Pinout: 28-Lead PLCC (Top View)
B4B5B
6
P
2
PGENCLKSHIFTS-INHOLDEN
LOGIC DIAGRAM
EV/OD
BPAR
B
0
V
EE
B
1
B
2
B
3
26
27
28
2
3
4
25 24 23 22 21 20 19
18
17
16
15
14
13
12
115 6 7 8 9 10
V
CCO
PARERR
PARERR
V
CC
P
5
V
CCO
P
4
P
3
V
CCOP1
B
7
B INPUTS
0 3 6 5 7 4 2 1
B2, B3, B6, B
7
B1, B3, B5, B
7
B4, B5, B6, B
7
B1, B2, B4, B
7
P
2
P
1
P
3
P
4
P
5
PGEN
BYTE (B0– B7)
PARERR
PARERR
BPAR
EV/OD
EN
HOLD
S-IN
SHIFT
CLK
0
1
0
1
D
1
* All VCC and V
CCO
pins are tied together on the die.
ERROR DETECTION/
CORRECTION CIRCUIT
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
MC10E193 MC100E193
MOTOROLA ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–2
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = V
CCO
= GND)
0°C 25°C 85°C
Symbol Characteristic min typ max min typ max min typ max Unit Condition
I
IH
Input HIGH Current 150 150 150 µA
I
EE
Power Supply Current mA
10E 112 134 112 134 112 134
100E 112 134 112 134 129 155
AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = V
CCO
= GND)
0°C 25°C 85°C
Symbol Characteristic min typ max min typ max min typ max Unit Condition
t
PLH
Propagation Delay to Output ps
t
PHL
B to P1, P2, P3, P4 350 700 1000 350 700 1000 350 700 1000
B to P5 400 775 1150 400 775 1150 400 775 1150
EV/OD, BPAR to PGEN 350 650 850 350 650 850 350 650 850
B to PGEN 600 1000 1450 600 1000 1450 600 1000 1450
CLK to PARERR 300 550 850 300 550 850 300 550 850
t
s
Setup Time ps
SHIFT 400 150 400 150 400 150
S-IN 300 50 300 50 300 50
HOLD 750 350 750 350 750 350
EN 500 250 500 250 500 250
EV/OD 1300 850 1300 850 1300 850
BPAR 1300 850 1300 850 1300 850
B 1700 1100 1700 1100 1700 1100
t
h
Hold Time ps
SHIFT 200 –150 200 –150 200 –150
S-IN 300 – 50 300 – 50 300 – 50
HOLD 100 – 350 100 – 350 100 – 350
EN 100 – 250 100 – 250 100 – 250
EV/OD – 200 – 850 – 200 – 850 – 200 – 850
BPAR – 200 – 850 – 200 – 850 – 200 – 850
B – 300 –1100 – 300 –1100 – 300 –1100
t
r
Rise/Fall Times ps
t
f
20 - 80% 300 700 1100 300 700 1100 300 700 1100
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