Motorola, Inc.
8000 West Sunrise Boulevard
Fort Lauderdale, Florida 33322
6881096C74-B
Page 4
Foreword
The information contained in this manual relates to all ASTRO® Digital XTL™ 5000 VHF/UHF Range 1/UHF Range 2/700–
800 MHz mobile radios equipped with W3, W4, W5, W7, or W9 control heads, unless otherwise specified. This manual
provides sufficient information to enable qualified service technicians to troubleshoot and repair XTL 5000 radios to the
component level.
For details on radio operation or basic troubleshooting, refer to the applicable manuals available separately. A list of related
publications is provided in the section, “Related Publications,” on page xxii.
Product Safety and RF Exposure Compliance
Before using this product, read the operating instructions
!
C a u t i o n
This radio is restricted to occupational use only to satisfy FCC RF energy exposure requirements.
Before using this product, read the RF energy awareness information and operating instructions in the
Product Safety and RF Exposure booklet enclosed with your radio (Motorola Publication part number
6881095C99) to ensure compliance with RF energy exposure limits.
For a list of Motorola-approved antennas, batteries, and other accessories, visit the following web site
which lists approved accessories: http://www.motorola.com/cgiss/index.shtml
for safe usage contained in the Product Safety and RF
Exposure booklet enclosed with your radio.
ATTENTION!
.
Manual Revisions
Changes which occur after this manual is printed are described in FMRs (Florida Manual Revisions). These FMRs provide
complete replacement pages for all added, changed, and deleted items, including pertinent parts list data, schematics, and
component layout diagrams. To obtain FMRs, contact the Radio Products and Services Division (refer to “Appendix B
Replacement Parts Ordering").
Computer Software Copyrights
The Motorola products described in this manual may include copyrighted Motorola computer programs stored in
semiconductor memories or other media. Laws in the United States and other countries preserve for Motorola certain
exclusive rights for copyrighted computer programs, including, but not limited to, the exclusive right to copy or reproduce in
any form the copyrighted computer program. Accordingly, any copyrighted Motorola computer programs contained in the
Motorola products described in this manual may not be copied, reproduced, modified, reverse-engineered, or distributed in
any manner without the express written permission of Motorola. Furthermore, the purchase of Motorola products shall not
be deemed to grant either directly or by implication, estoppel, or otherwise, any license under the copyrights, patents or
patent applications of Motorola, except for the normal non-exclusive license to use that arises by operation of law in the
sale of a product.
Document Copyrights
No duplication or distribution of this document or any portion thereof shall take place without the express written permission
of Motorola. No part of this manual may be reproduced, distributed, or transmitted in any form or by any means, electronic
or mechanical, for any purpose without the express written permission of Motorola.
Disclaimer
The information in this document is carefully examined, and is believed to be entirely reliable. However, no responsibility is
assumed for inaccuracies. Furthermore, Motorola reserves the right to make changes to any products herein to improve
readability, function, or design. Motorola does not assume any liability arising out of the applications or use of any product
or circuit described herein; nor does it cover any license under its patent rights nor the rights of others.
Trademarks
MOTOROLA, the Stylized M logo, and ASTRO are registered in the US Patent & Trademark Office. All other product or
service names are the property of their respective owners.
Figure 3-47. Patriot IC (U100) UART Configuration ................................................................................3-69
Figure 3-48. Serial Peripheral Interface (SPI) Block Diagram .................................................................3-72
Figure 3-49. XTL 5000 RX Signal Path ...................................................................................................3-73
Figure 3-50. XTL 5000 TX Signal Path ....................................................................................................3-75
Figure 3-51. Boot RX and Boot TX Data Lines ........................................................................................3-75
Figure 4-1. Frequency Generator Unit DC Power Supply Distribution (VHF) ..........................................4-8
Figure 4-2. Frequency Generation Unit Block Diagram (VHF) ................................................................4-9
Figure 4-3. Waveform Representation During Programming of the LV Frac-N IC (U3751) ................... 4-11
Figure 4-4. Frequency Generation Unit DC Power Supply Distribution (UHF Range 1)........................4-13
Figure 4-5. Frequency Generation Unit Block Diagram (UHF Range 1)................................................4-14
Figure 4-6. Waveform Representation During Programming of the LV Frac-N IC (U5752) ...................4-16
Figure 4-7. Frequency Generation Unit DC Power Supply Distribution (UHF Range 2)........................4-19
Figure 4-8. Frequency Generation Unit Block Diagram (UHF Range 2)................................................4-20
Figure 4-9. Waveform Representation During Programming of the LV Frac-N IC (U5752) ...................4-22
Figure 4-10. Frequency Generation Unit DC Power Supply Distribution (700–800 MHz) .......................4-25
Figure 4-11. Frequency Generation Unit Block Diagram (700–800 MHz) ...............................................4-26
Figure 4-12. Waveform Representation During Programming of the LV Frac-N IC (U6751)...................4-28
Figure 5-1. Main Board Test Points—Top Side (for Mid Power) ............................................................5-12
Figure 5-2. Main Board Test Points—Bottom Side (for Mid Power).......................................................5-12
Figure 5-3. Main Board Test Points—Top Side (for High Power) ...........................................................5-13
Figure 5-4. Main Board Test Points—Bottom Side (for High Power) .....................................................5-13
Figure 5-5. Poor RX Sensitivity or No RX Audio (136–174 MHz)—Part 1 of 2......................................5-15
Figure 5-6. Poor RX Sensitivity or No RX Audio (136–174 MHz)—Part 2 of 2......................................5-16
Figure 5-7. RX IF—Poor SINAD or No Audio (136–174 MHz) ..............................................................5-17
Figure 5-8. RX Back-End—Poor SINAD or No Audio (136–174 MHz)—Part 1 of 3..............................5-18
Figure 5-9. RX Back-End—Poor SINAD or No Audio (136–174 MHz)—Part 2 of 3..............................5-19
Figure 5-10. RX Back-End—Poor SINAD or No Audio (136–174 MHz)—Part 3 of 3..............................5-20
Figure 5-11. Low or No RX Injection Signal (136–174 MHz) ...................................................................5-21
Figure 5-12. Low or No TX Injection Signal (136–174 MHz) ...................................................................5-22
Figure 5-13. TX or RX VCO Unlock (Fail 001) (136–174 MHz)—Part 1 of 2...........................................5-23
Figure 5-14. TX or RX VCO Unlock (Fail 001) (136–174 MHz)—Part 2 of 2...........................................5-24
Figure 5-15. No Output Power at TX Mode (136–174 MHz) ...................................................................5-25
Figure 5-16. No Output Power and IDC < 2A at TX Mode (136–174 MHz).............................................5-26
Figure 5-17. No 16.8 MHz Reference Oscillator Frequency (380–470 MHz and 450–520 MHz)............5-27
Figure 5-18. Poor RX Sensitivity or No RX Audio (380–470 MHz and 450–520 MHz)—Part 1 of 2 .......5-28
Figure 5-19. Poor RX Sensitivity or No RX Audio (380–470 MHz and 450–520 MHz)—Part 2 of 2 .......5-29
Figure 5-20. RX IF—Poor SINAD or No Audio (380–470 MHz and 450–520 MHz)—Part 1 of 2............5-30
Figure 5-21. RX IF—Poor SINAD or No Audio (380–470 MHz and 450–520 MHz)—Part 2 of 2............5-31
Figure 5-22. RX Back-End—Poor SINAD or No Audio (380–470 MHz and 450–520 MHz)—
Part 1 of 3............................................................................................................................5-32
Figure 5-23. RX Back-End—Poor SINAD or No Audio (380–470 MHz and 450–520 MHz)—
Part 2 of 3............................................................................................................................5-33
Figure 5-24. RX Back-End—Poor SINAD or No Audio (380–470 MHz and 450–520 MHz)—
Part 3 of 3....................................................................................................................
........5-34
Figure 5-25. Low or No RX Injection Signal (380–470 MHz and 450–520 MHz) ....................................5-35
Figure 5-26. Low or No TX Injection Signal (380–470 MHz and 450–520 MHz) .....................................5-36
Figure 5-27. No TX Audio (380–470 MHz and 450–520 MHz) ................................................................5-37
Figure 5-28. TX or RX VCO Unlock (Fail 001) (380–470 MHz and 450–520 MHz)—Part 1 of 2 ............5-38
Figure 5-29. TX or RX VCO Unlock (Fail 001) (380–470 MHz and 450–520 MHz)—Part 2 of 2 ............5-39
Figure 5-30. RF Power Amplifier (RFPA)—No or Low TX Power Output
(380–470 MHz and 450–520 MHz)—Part 1 of 5 .................................................................5-40
May 25, 20056881096C74-B
Page 19
List of Figuresxvii
Figure 5-31. RF Power Amplifier (RFPA)—No or Low TX Power Output
(380–470 MHz and 450–520 MHz)—Part 2 of 5 .................................................................5-41
Figure 5-32. RF Power Amplifier (RFPA)—No or Low TX Power Output
(380–470 MHz and 450–520 MHz)—Part 3 of 5 .................................................................5-42
Figure 5-33. RFPA Power Control—No VGBIAS (380–470 MHz and 450–520 MHz).............................5-45
Figure 5-34. No 16.8 MHz Reference Oscillator Frequency (700–800 MHz) ..........................................5-46
Figure 5-35. Poor RX Sensitivity or No RX Audio (700–800 MHz)—Part 1 of 2......................................5-47
Figure 5-36. Poor RX Sensitivity or No RX Audio (700–800 MHz)—Part 2 of 2......................................5-48
Figure 5-37. RX IF—Poor SINAD or No Audio (700–800 MHz) ..............................................................5-49
Figure 5-38. RX Back-End—Poor SINAD or No Audio (700–800 MHz)—Part 1 of 3 ..............................5-50
Figure 5-39. RX Back-End—Poor SINAD or No Audio (700–800 MHz)—Part 2 of 3 ..............................5-51
Figure 5-40. RX Back-End—Poor SINAD or No Audio (700–800 MHz)—Part 3 of 3 ..............................5-52
Figure 5-41. Low or No RX Injection Signal (700–800 MHz) ...................................................................5-53
Figure 5-42. Low or No TX Injection Signal (700–800 MHz) ...................................................................5-54
Figure 5-43. No TX Audio (700–800 MHz) ..............................................................................................5-55
Figure 5-44. TX or RX VCO Unlock (Fail 001) (700–800 MHz)—Part 1 of 2...........................................5-56
Figure 5-45. TX or RX VCO Unlock (Fail 001) (700–800 MHz)—Part 2 of 2...........................................5-57
Figure 5-46. RF Power Amplifier (RFPA)—No or Low TX Power Output (700–800 MHz)—Part 1 of 5 ..5-58
Figure 5-47. RF Power Amplifier (RFPA)—No or Low TX Power Output (700–800 MHz)—Part 2 of 5 ..5-59
Figure 5-48. RF Power Amplifier (RFPA)—No or Low TX Power Output (700–800 MHz)—Part 3 of 5 ..5-60
Figure 5-49. RFPA Power Control—No K9.1V (700–800 MHz)...............................................................5-63
Figure 5-50. RFPA Power Control—No VGBIAS (700–800 MHz) ...........................................................5-64
Figure 5-51. RFPA Power Control—No or Low TX RFPA_CNTRL (700–800 MHz)—Part 1 of 2 ...........5-65
Figure 7-1. HUD4022A/HUD4025 Main Board Overall Block Diagram and Interconnections .................7-3
Figure 7-2. HUD4022A Controller Block Diagram and Interconnections (Sheet 1 of 2) ..........................7-4
Figure 7-3. HUD4022A Controller Block Diagram and Interconnections (Sheet 2 of 2) ..........................7-5
ASTRO Digital XTL 5000 Mobile Radio with W3 Control Head User’s Guide................................ 6881096C67
ASTRO Digital XTL 5000 Mobile Radio with W4, W5, W7, and W9 Control Heads User’s Guide. 6881096C68
ASTRO Digital XTL 5000 Mobile Radio Installation Manual........................................................... 6881096C72
ASTRO Digital XTL 5000 Mobile Radios Universal Crypto Module Field Installation Instructions . 6881097C53
ASTRO Digital XTL 5000 VHF/UHF Range 1/UHF Range 2/700-800 MHz Mobile Radio
Basic Service Manual................................................................................................................ 6881096C73
ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios W3/W4/W5/W7/W9
Control Head Models Service Manual ...................................................................................... 6881096C77
System 9000 Direct Entry Keyboard Instruction Manual ......................................................... 68P80101W22-B
May 25, 20056881096C74-B
Page 25
Commercial Warranty
Limited Warranty
MOTOROLA COMMUNICATION PRODUCTS
I. What This Warranty Covers And For How Long
MOTOROLA INC. (“MOTOROLA”) warrants the MOTOROLA manufactured Communication
Products listed below (“Product”) against defects in material and workmanship under normal use and
service for a period of time from the date of purchase as scheduled below:
Motorola, at its option, will at no charge either repair the Product (with new or reconditioned parts),
replace it (with a new or reconditioned Product), or refund the purchase price of the Product during
the warranty period provided it is returned in accordance with the terms of this warranty. Replaced
parts or boards are warranted for the balance of the original applicable warranty period. All replaced
parts of Product shall become the property of MOTOROLA.
This express limited warranty is extended by MOTOROLA to the original end user purchaser only
and is not assignable or transferable to any other party. This is the complete warranty for the Product
manufactured by MOTOROLA. MOTOROLA assumes no obligations or liability for additions or
modifications to this warranty unless made in writing and signed by an officer of MOTOROLA.
Unless made in a separate agreement between MOTOROLA and the original end user purchaser,
MOTOROLA does not warrant the installation, maintenance or service of the Product.
MOTOROLA cannot be responsible in any way for any ancillary equipment not furnished by
MOTOROLA which is attached to or used in connection with the Product, or for operation of the
Product with any ancillary equipment, and all such equipment is expressly excluded from this
warranty. Because each system which may use the Product is unique, MOTOROLA disclaims
liability for range, coverage, or operation of the system as a whole under this warranty.
II. General Provisions
ASTRO Digital XTL 5000 Mobile Radio
Units
Product AccessoriesOne (1) Year
One (1) Year
This warranty sets forth the full extent of MOTOROLA's responsibilities regarding the Product.
Repair, replacement or refund of the purchase price, at MOTOROLA's option, is the exclusive
remedy. THIS WARRANTY IS GIVEN IN LIEU OF ALL OTHER EXPRESS WARRANTIES. IMPLIED
WARRANTIES, INCLUDING WITHOUT LIMITATION, IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE LIMITED TO THE
DURATION OF THIS LIMITED WARRANTY. IN NO EVENT SHALL MOTOROLA BE LIABLE FOR
DAMAGES IN EXCESS OF THE PURCHASE PRICE OF THE PRODUCT, FOR ANY LOSS OF
USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, LOST PROFITS OR SAVINGS
OR OTHER INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
USE OR INABILITY TO USE SUCH PRODUCT, TO THE FULL EXTENT SUCH MAY BE
DISCLAIMED BY LAW.
Page 26
xxivCommercial Warranty
III. State Law Rights
SOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF INCIDENTAL OR
CONSEQUENTIAL DAMAGES OR LIMITATION ON HOW LONG AN IMPLIED WARRANTY
LASTS, SO THE ABOVE LIMITATION OR EXCLUSIONS MAY NOT APPLY.
This warranty gives specific legal rights, and there may be other rights which may vary from state to
state.
IV. How To Get Warranty Service
You must provide proof of purchase (bearing the date of purchase and Product item serial number)
in order to receive warranty service and, also, deliver or send the Product item, transportation and
insurance prepaid, to an authorized warranty service location. Warranty service will be provided by
Motorola through one of its authorized warranty service locations. If you first contact the company
which sold you the Product, it can facilitate your obtaining warranty service. You can also call
Motorola at 1-888-567-7347 US/Canada.
V. What This Warranty Does Not Cover
A. Defects or damage resulting from use of the Product in other than its normal and customary
manner.
B. Defects or damage from misuse, accident, water, or neglect.
C. Defects or damage from improper testing, operation, maintenance, installation, alteration,
modification, or adjustment.
D. Breakage or damage to antennas unless caused directly by defects in material workmanship.
E. A Product subjected to unauthorized Product modifications, disassemblies or repairs
(including, without limitation, the addition to the Product of non-Motorola supplied equipment)
which adversely affect performance of the Product or interfere with Motorola's normal
warranty inspection and testing of the Product to verify any warranty claim.
F. Product which has had the serial number removed or made illegible.
G. Rechargeable batteries if:
•any of the seals on the battery enclosure of cells are broken or show evidence of
tampering.
•the damage or defect is caused by charging or using the battery in equipment or service
other than the Product for which it is specified.
H. Freight costs to the repair depot.
I.A Product which, due to illegal or unauthorized alteration of the software/firmware in the
Product, does not function in accordance with MOTOROLA's published specifications or the
FCC type acceptance labeling in effect for the Product at the time the Product was initially
distributed from MOTOROLA.
J. Scratches or other cosmetic damage to Product surfaces that does not affect the operation of
the Product.
K. Normal and customary wear and tear.
May 25, 20056881096C74-B
Page 27
Commercial Warrantyxxv
VI. Patent And Software Provisions
MOTOROLA will defend, at its own expense, any suit brought against the end user purchaser to the
extent that it is based on a claim that the Product or parts infringe a United States patent, and
MOTOROLA will pay those costs and damages finally awarded against the end user purchaser in
any such suit which are attributable to any such claim, but such defense and payments are
conditioned on the following:
A. that MOTOROLA will be notified promptly in writing by such purchaser of any notice of such
claim;
B. that MOTOROLA will have sole control of the defense of such suit and all negotiations for its
settlement or compromise; and
C. should the Product or parts become, or in MOTOROLA's opinion be likely to become, the
subject of a claim of infringement of a United States patent, that such purchaser will permit
MOTOROLA, at its option and expense, either to procure for such purchaser the right to
continue using the Product or parts or to replace or modify the same so that it becomes
noninfringing or to grant such purchaser a credit for the Product or parts as depreciated and
accept its return. The depreciation will be an equal amount per year over the lifetime of the
Product or parts as established by MOTOROLA.
MOTOROLA will have no liability with respect to any claim of patent infringement which is based
upon the combination of the Product or parts furnished hereunder with software, apparatus or
devices not furnished by MOTOROLA, nor will MOTOROLA have any liability for the use of ancillary
equipment or software not furnished by MOTOROLA which is attached to or used in connection with
the Product. The foregoing states the entire liability of MOTOROLA with respect to infringement of
patents by the Product or any parts thereof.
Laws in the United States and other countries preserve for MOTOROLA certain exclusive rights for
copyrighted MOTOROLA software such as the exclusive rights to reproduce in copies and distribute
copies of such Motorola software. MOTOROLA software may be used in only the Product in which
the software was originally embodied and such software in such Product may not be replaced,
copied, distributed, modified in any way, or used to produce any derivative thereof. No other use
including, without limitation, alteration, modification, reproduction, distribution, or reverse
engineering of such MOTOROLA software or exercise of rights in such MOTOROLA software is
permitted. No license is granted by implication, estoppel or otherwise under MOTOROLA patent
rights or copyrights.
VII. Governing Law
This Warranty is governed by the laws of the State of Illinois, USA.
6881096C74-BMay 25, 2005
Page 28
xxviCommercial Warranty
Notes
May 25, 20056881096C74-B
Page 29
Model Numbering, Charts, and Specificationsxxvii
Model Numbering, Charts, and Specifications
Mobile Radio Model Numbering Scheme
Typical Model Number:
Position:
Position 1 - Type of Unit
M = Mobile
L = Table Top Station
Positions 2 & 3 - Model Series
20 = XTL 5000
Position 4 - Frequency Band
Less than 29.7MHz
A
=
29.7 to 35.99MHz
B
=
36 to 41MHz
C
=
42 to 50MHz
D
=
300 to 345MHz
E
=
66 to 80MHz
F
=
74 to 90MHz
G
=
Product Specific
H
=
VHF Range
136 to 162MHz
J
=
146 to 178MHz
K
=
174 to 210MHz
L
=
190 to 235MHz
M
=
* For XTL 5000 "K" in Position 4 represents
136-174MHz.
* For XTL 5000 "Q" in Position 4 represents
380-470MHz.
* For XTL 5000 "S" in Position 4 represents
450-520MHz.
* For XTL 5000 "U" in Position 4 represents
764-870MHz.
Note: Values represented are not absolute,
and are given to indicate range only.
Position 5 - Power Level
=
A
0 to 0.7 Watts
=
B
0.7 to 0.9 Watts
=
C
1.0 to 3.9 Watts
=
D
4.0 to 5.0 Watts
=
E
5.1 to 6.0 Watts
=
F
6.1 to 10 Watts
=
G
10.1 to 15 Watts
=
H
16 to 25 Watts
=
J
26 to 35 Watts
Note: Values represented are not absolute,
and are given to indicate range only.
HUF4022_VHF 136-174 MHz Main Board
HLN6861_Hardware Standard Install
HLN6842_Motorcycle Hardware 800 15 w w/W90
HLN6884_Motorcycle Interconnect Board
HKN4191_Mobile Power Cable
HKN6062_Motorcycle Control Head Cable 8’
HLN6865_Remote Mount Control Head Interconnect
HLN6125_Hardware Housing Front Remote
X HSN6003_Motorcycle Water Resistant Speaker
XHLN1445_White Motorcycle Enclosure and Hardware
X = Item Included
_ = the latest version kit. When ordering a kit, refer to your specific kit for the suffix number.
May 25, 20056881096C74-B
Page 31
Model Numbering, Charts, and Specificationsxxix
ASTRO XTL 5000 VHF 10-50 Watt Model Chart
M20KSS9PW1AN 136–174 MHz
OptionDescription
G66AAADD: Dash Mount W4, W5, W7
G66ABADD: Dash Mount W3
G66ACADD: Dash Mount No Control Head Needed
G67AAADD: Remote Mount W4, W5, W7
G67ABADD: Remote Mount W9
G67ACADD: Remote Mount W3
G67AEADD: Remote Mount No Control Head
G72AAADD: W3 Handheld Control Head
G73AAADD: W4 Control Head
G79AAADD: W5 Control Head
G80AAADD: W7 Control Head
G81AAADD: W9 Control Head
G159ACADD: Encryption UCM Hdw 3-Day Key Ret
G159ADADD: Encryption UCM Hdw 30-Sec Key Ret
W382AGALT: Control Station Palm Microphone
W665BEADD: Control Station Operation
G91AAADD: Control Station Power Supply
Item No.Description
XHUD4022_VHF 136-174 MHz Main Board
XXXXXHLN6861_Installation Hardware
XX
XXXXXHLN6863_Accessory Connector Plug
XX
XHKN4191_Mobile Power Cable
XX
X
XHLN6885_Handheld CH Interconnect Board
XXXHLN6883_Remote Interconnect Board
XHLN6813_Control Head Trunnion Kit
XHLN6432_Back Housing Kit
XXXXHKN4192_Mobile Power Cable 20 ft.
XXXHKN4356_Standard 17 ft Control Head Remote Cable
XXXHKN6096_Handheld Control Head Y Cable
HUE4039AUHF R1 380-470 MHz Main Board
HLN6861_Hardware Standard Install
HLN6842_Motorcycle Hardware 800 15 w w/W90
HLN6884_Motorcycle Interconnect Board
HKN4191_Mobile Power Cable
HKN6062_Motorcycle Control Head Cable 8’
X RAE4024ARB Motorcycle Antenna 1/4 WAve Whip 450-482 MHZ
X = Item Included
_ = the latest version kit. When ordering a kit, refer to your specific kit for the suffix number.
6881096C74-BMay 25, 2005
Page 36
xxxivModel Numbering, Charts, and Specifications
ASTRO XTL 5000 UHF Range 1 4-40 Watt Model Chart
M20QSS9PW1AN 380–470 MHz
OptionDescription
G66AAADD: Dash Mount W4, W5, W7
G66ABADD: Dash Mount W3
G66ACADD: Dash Mount No Control Head Needed
G67AAADD: Remote Mount W4, W5, W7
G67ABADD: Remote Mount W9
G67ACADD: Remote Mount W3
G67AEADD: Remote Mount No Control Head
G72AAADD: W3 Handheld Control Head
G73AAADD: W4 Control Head
G79AAADD: W5 Control Head
G80AAADD: W7 Control Head
G81AAADD: W9 Control Head
G159ACADD: Encryption UCM Hdw 3-Day Key Ret
G159ADADD: Encryption UCM Hdw 30-Sec Key Ret
W382AGALT: Control Station Palm Microphone
W665BEADD: Control Station Operation
G91AAADD: Control Station Power Supply
Item No.Description
XHUE4039_UHF R1 380-470 MHz Main Board
XXXXXHLN6861_Installation Hardware
XX
XXXXXHLN6863_Accessory Connector Plug
XX
XHKN4191_Mobile Power Cable
XX
X
XHLN6885_Handheld CH Interconnect Board
XXXHLN6883_Remote Interconnect Board
XHLN6813_Control Head Trunnion Kit
XHLN6432_Back Housing Kit
XXXXHKN4192_Mobile Power Cable 20 ft.
XXXHKN4356_Standard 17 ft Control Head Remote Cable
XXXHKN6096_Handheld Control Head Y Cable
HUE4040AUHF R2 450-520 MHz Main Board
HLN6861_Hardware Standard Install
HLN6842_Motorcycle Hardware 800 15 w w/W90
HLN6884_Motorcycle Interconnect Board
HKN4191_Mobile Power Cable
HKN6062_Motorcycle Control Head Cable 8’
XHSN6003_Motorcycle Water Resistant Speaker
X HAE6016_Antenna, Low-Profile Motorcycle, 450-512 MHz
X = Item Included
_ = the latest version kit. When ordering a kit, refer to your specific kit for the suffix number.
May 25, 20056881096C74-B
Page 41
Model Numbering, Charts, and Specificationsxxxix
ASTRO XTL 5000 UHF Range 2 4-45 Watt Model Chart
M20SSS9PW1AN 450–520 MHz
OptionDescription
G66AAADD: Dash Mount W4, W5, W7
G66ABADD: Dash Mount W3
G66ACADD: Dash Mount No Control Head Needed
G67AAADD: Remote Mount W4, W5, W7
G67ABADD: Remote Mount W9
G67ACADD: Remote Mount W3
G67AEADD: Remote Mount No Control Head
G72AAADD: W3 Handheld Control Head
G73AAADD: W4 Control Head
G79AAADD: W5 Control Head
G80AAADD: W7 Control Head
G81AAADD: W9 Control Head
G159ACADD: Encryption UCM Hdw 3-Day Key Ret
G159ADADD: Encryption UCM Hdw 30-Sec Key Ret
W382AGALT: Control Station Palm Microphone
W665BEADD: Control Station Operation
G91AAADD: Control Station Power Supply
Item No.Description
XHUE4040_UHF R2 450-520 MHz Main Board
XXXXXHLN6861_Installation Hardware
XX
XXXXXHLN6863_Accessory Connector Plug
XX
XHKN4191_Mobile Power Cable
XX
X
XHLN6885_Handheld CH Interconnect Board
XXXHLN6883_Remote Interconnect Board
XHLN6813_Control Head Trunnion Kit
XHLN6432_Back Housing Kit
XXXXHKN4192_Mobile Power Cable 20 ft.
XXXHKN4356_Standard 17 ft Control Head Remote Cable
XXXHKN6096_Handheld Control Head Y Cable
HUF4017_700-800 MHz Main Board
HLN6861_Hardware Standard Install
HLN6842_Motorcycle Hardware 800 15 w w/W90
HLN6884_Motorcycle Interconnect Board
HKN4191_Mobile Power Cable
HKN6062_Motorcycle Control Head Cable 8’
XHAF4015_Antenna, 3 dB Motorcycle, 764-870 MHz
X HAF4018_Antenna, 3 dB Low-Profile Motorcycle, 764-870 MHz
X = Item Included
_ = the latest version kit. When ordering a kit, refer to your specific kit for the suffix number.
6881096C74-BMay 25, 2005
Page 44
xliiModel Numbering, Charts, and Specifications
ASTRO XTL 5000 700-800 MHz 3.5-35 Watt Model Chart
M20URS9PW1AN 764–870 MHz
OptionDescription
G66AAADD: Dash Mount W4, W5, W7
G66ABADD: Dash Mount W3
G66ACADD: Dash Mount No Control Head Needed
G67AAADD: Remote Mount W4, W5, W7
G67ABADD: Remote Mount W9
G67ACADD: Remote Mount W3
G67AEADD: Remote Mount No Control Head
G72AAADD: W3 Handheld Control Head
G73AAADD: W4 Control Head
G79AAADD: W5 Control Head
G80AAADD: W7 Control Head
G81AAADD: W9 Control Head
G159ACADD: Encryption UCM Hdw 3-Day Key Ret
G159ADADD: Encryption UCM Hdw 30-Sec Key Ret
W382AGALT: Control Station Palm Microphone
W665BEADD: Control Station Operation
G91AAADD: Control Station Power Supply
Item No.Description
XHUF4017_700-800 MHz Main Board
XXXXXHLN6861_Hardware Standard Install
XX
XXXXXHLN6863_Accessory Connector
XX
XHKN4191_Mobile Power Cable
XX
X
XHLN6885_Handheld CH Interconnect Board
XXXHLN6883_Remote Interconnect Board
XHLN6813_Control Head Trunnion Kit
XHLN6432_Back Housing Kit
XXXXHKN4192_Mobile Power Cable 20 ft.
XXXHKN4356_Standard 17 ft Control Head Remote Cable
Standby @ 13.8 V:0.8 AWith pre-amplifier
Receive at Rated Audio @ 13.6 V:3.0 A 20 dB Quieting: (25 kHz Channel Spacing):Frequency Separation:
Transmit @ Rated Power:0.25 µVRange 1:30 MHz
10 W8.0 A 12 dB SINAD: (25 kHz Channel Spacing):
50 W13.0 A0.20 µVFrequency Stability:
100 Watt: 20 dB Quieting: (25 kHz Channel Spacing):
Standby @ 13.4 V:0.8 A0.4 µV
Receive at Rated Audio @ 13.4 V:3.2 A 12 dB SINAD: (25 kHz Channel Spacing):Modulation Limiting:
Transmit @ Rated Power:0.3 µV 25 kHz Channel Spacing:±5.0 kHz
100 W20.0 A 12.5 kHz Channel Spacing:±2.5 kHz
Mid Power Dimensions (H x W x D)With pre-amplifierModulation Fidelity (C4FM):
W4, W5, and W7 Models: (Measured in the Analog Mode):–80 dB 12.5 kHz Digital Channel:±2.8 kHz
Remote-Mount Control Head: 2.0" x 7.1"x 2.2"Without pre-amplifier
(50.8 mm x 180.3 mm x 55.9 mm)(Measured in the Analog Mode):–85 dB FM Hum and Noise:
Dash-Mount Radio:2.0" x 7.1"x 9.1"25 kHz Channel Spacing:–50 dB
(50.8 mm x 180.3 mm x 218.4 mm)Digital Sensitivity:12.5 kHz Channel Spacing:–40 dB
W9 Model: 1% BER (12.5 kHz channel):0.25 µVEmission (Conduct/Radiated): –85 dBc/-20dBm
Remote-Mount Control Head: 3.4" x 6.5"x 1.7"
(86.4 mm x 165.1 mm x 43.2 mm)Without pre-amplifierAudio Sensitivity:
Speaker: (excluding mounting bracket) 1% BER (12.5 kHz channel):0.4 µV (For 60% Max. Deviation at 1 kHz): 0.08V ±3 dB
(139.7 mm x 139.7 mm x 63.5 mm)
Mid Power Weight: (Measured in the Analog Mode) (Measured in the Analog Mode)
Radio:5.1 lbs (2.3 kg) 25 kHz Channel Spacing:–90 dB (6 dB/Octave Pre-Emphasis 300 to 3000Hz):
Speaker:1.5 lbs (0.7 kg)
High Pwr Dimensions wtih Handle(H x W x D) (Measured in the Analog Mode):–80 dB (For 60% Max. Deviation at 1 kHz): 3% TIA 603
2.65” x 8.08” x 12.31”
(67.31 mm x 205.13 mm x 312.6 mm)Spurious Rejection:–90 dBEmissions Designators:
High Power Weight with HandleFrequency Stability: 20K0F1E, 15K0F1D, 11K0F1D, and 11K0F2D
8.8 lbs (4 kg)(–30° to +60°C; 25°C Reference):
AZ492FT3808Range 1:136–174 MHzRange 1:136–174 MHz
Input Impedance: 50 OhmHigh-Power Radio:100 Watt
Frequency Separation:Full BandsplitChannel Spacing:12.5 kHz or 25 kHz
Without pre-amplifier (–30° to +60°C; 25°C Ref.): ±348 Hz @ 174 MHz
Mid Power Dimensions (H x W x D)With pre-amplifierModulation Fidelity (C4FM):
W4, W5, and W7 Models: (Measured in the Analog Mode):–80 dB 12.5 kHz Digital Channel:±2.8 kHz
Remote-Mount Control Head: 2.0" x 7.1"x 2.2"Without pre-amplifier
(50.8 mm x 180.3 mm x 55.9 mm)(Measured in the Analog Mode):–85 dB FM Hum and Noise:
Dash-Mount Radio:2.0" x 7.1"x 9.1"25 kHz Channel Spacing:–45 dB
(50.8 mm x 180.3 mm x 218.4 mm)Digital Sensitivity:12.5 kHz Channel Spacing:–40 dB
W9 Model: 1% BER (12.5 kHz channel):0.25 µV
Remote-Mount Control Head: 3.4" x 6.5"x 1.7"
(86.4 mm x 165.1 mm x 43.2 mm)Without pre-amplifier
Mid Power Weight: (Measured in the Analog Mode) (Measured in the Analog Mode)
Radio:5.1 lbs (2.3 kg) 25 kHz Channel Spacing:–82 dB (6 dB/Octave Pre-Emphasis 300 to 3000Hz):
Speaker:1.5 lbs (0.7 kg) 12.5 kHz Channel Spacing:–75 dB+1, –3 dB
AZ492FT4870Range 1:380–470 MHzRange 1:380–470 MHz
High-Power Radio:100 Watt
Channel Spacing:12.5 kHz or 25 kHz
Without pre-amplifier (–30° to +60°C; 25°C Ref.):±0.0002%
Dimensions (H x W x D)Without pre-amplifier (–30° to +60°C; 25°C Ref.):±0.0002%W4, W5, and W7 Models: 20 dB Quieting: (25 kHz Channel Spacing):
Remote-Mount Control Head: 2.0" x 7.1"x 2.2"0.4 µV Modulation Limiting:
(50.8 mm x 180.3 mm x 55.9 mm) 12 dB SINAD: (25 kHz Channel Spacing): 25 kHz Channel Spacing:±5.0 kHz
(50.8 mm x 180.3 mm x 218.4 mm) 12.5 kHz Channel Spacing:±2.5 kHz
W9 Model:With pre-amplifierModulation Fidelity (C4FM):
Remote-Mount Control Head: 3.4" x 6.5"x 1.7" (Measured in the Analog Mode):–80 dB 12.5 kHz Digital Channel:±2.8 kHz
(86.4 mm x 165.1 mm x 43.2 mm)Without pre-amplifier
Speaker: (excluding mounting bracket)(Measured in the Analog Mode):–85 dB FM Hum and Noise:
5.5" x 5.5"x 2.5"Digital Sensitivity:12.5 kHz Channel Spacing:–40 dB
(139.7 mm x 139.7 mm x 63.5 mm)With pre-amplifier
Weight:
Radio:5.1 lbs (2.3 kg)
Speaker:1.5 lbs (0.7 kg) Selectivity: (per EIA Specifications)Audio Response:
Range 2:450–520 MHzRange 2:450–520 MHz
45 Watt 450–500 MHz
Input Impedance: 50 Ohm25 Watt 512–520 MHz
Frequency Separation:Full BandsplitChannel Spacing:12.5 kHz or 25 kHz
0.20 µVFrequency Stability:
Intermodulation: (per EIA Specifications)
25 kHz Channel Spacing:–45 dB
1% BER (12.5 kHz channel):0.25 µV
5% BER (12.5 kHz channel):0.20 µV
Without pre-amplifier
1% BER (12.5 kHz channel):0.4 µVAudio Sensitivity:
5% BER (12.5 kHz channel):0.3 µV
(Measured in the Analog Mode) (Measured in the Analog Mode)
25 kHz Channel Spacing:–82 dB (6 dB/Octave Pre-Emphasis 300 to 3000Hz):
12.5 kHz Channel Spacing:–75 dB+1, –3 dB
Emission (Conducted and Radiated): –85 dBc
(For 60% Max. Deviation at 1 kHz): 0.08V ±3 dB
40 Watt 500–512 MHz
Spurious Rejection:–90 dBAudio Distortion:
Frequency Stability:
(–30° to +60°C; 25°C Reference):±0.0002%Emissions Designators:
Audio Output: (per EIA Specifications) 20K0F1E, 15K0F1D, 11K0F1D, and 11K0F2D
(Measured in the Analog Mode):
7.5 Watts at Less Than 3% Distortion
13 Watts Optional with Reduced Duty Cycle
13 Watts for High-Power Radios
(For 60% Max. Deviation at 1 kHz): 2% TIA 603
8K10F1E, 11K0F3E, 15K0F2D, 16K0F3E,
Specifications subject to change without notice.
All measurements are taken in the test mode at 25 kHz channel spacing except where indicated.
May 25, 20056881096C74-B
Page 49
Model Numbering, Charts, and Specificationsxlvii
700–800 MHz Radio Specifications (Mid Power Models Only)
Remote-Mount Control Head: 3.4" x 6.5"x 1.7" 12.5 kHz Channel:65 dB25 kHz Channel Spacing:±5.0 kHz
(86.4 mm x 165.0 mm x 43.2 mm)12.5 kHz Channel Spacing:±2.5 kHz
Speaker: (excluding mounting bracket)Intermodulation*:80 dB
5.5" x 5.5"x 2.5"Modulation Fidelity (C4FM)**:
(139.7 mm x 139.7 mm x 63.5 mm) Spurious Rejection*:90 dB12.5 kHz Digital Channel:±2.8 kHz
Repeater Mode:806–825 MHz
Weight:Frequency Stability*:FM Hum and Noise*:
Radio:6.1 lbs (2.8 kg)(–30° to +60° C; 25° C Ref.):±0.00015%20/25 kHz Channel:–40 dB
Speaker:1.5 lbs (0.7 kg)12.5 kHz Channel:–34 dB
Audio Output at 3% Distortion*:
7.5 Watts into 8 OhmsEmission (Conducted and Radiated):
13 Watts into 3.2 Ohms–70 dBc/–85 dBc (GNSS)
Audio Sensitivity*:
(For 60% Max. Deviation at 1 kHz):
0.08 V ±3 dB
Audio Response*:
(6 dB/Octave Pre-Emphasis 300 to 3000 Hz):
+1,–3 dB
Audio Distortion*:2%
Emissions Designators:
8K10F1D, 8K10F1E, 11K0F3E, 16K0F3E, and
20K0F1E
Specifications subject to change without notice.
* Measured in analog mode per TIA/EIA 603 under nominal conditions.
** Measured in digital mode per TIA/EIA IS 102.CAAB.
*** 2 W. itinerant frequencies.
6881096C74-BMay 25, 2005
Page 50
xlviiiModel Numbering, Charts, and Specifications
Notes
May 25, 20056881096C74-B
Page 51
Chapter 1Introduction
1.1Notations Used in This Manual
Throughout the text in this publication, you will notice the use of warnings, cautions, and notes.
These notations are used to emphasize that safety hazards exist, and care must be taken and
observed.
NOTE: The Note notation indicates an operational procedure, practice, or condition that is essential
to emphasize.
C a u t i o n
D A N G E R
1.2General
This manual includes all the information necessary to maintain peak product performance and
maximum working time. This detailed level of service (component-level) is typical of some service
centers, self-maintained customers, and distributors.
!
!
CAUTION indicates a potentially hazardous situation which, if
not avoided, might
WARNING indicates a potentially hazardous situation
which, if not avoided, could
DANGER indicates an imminently hazardous
situation which, if not avoided, will
injury.
result in equipment damage.
result in death or injury.
result in death or
Use this manual in conjunction with the ASTRO Digital XTL 5000 VHF/UHF Range 1/UHF Range 2/
700–800 MHz Mobile Radio Basic Service Manual (Motorola part number 6881096C73), which helps
in troubleshooting a problem to a particular board.
Conduct the basic performance checks first to verify the need to analyze the radio and help pinpoint
the functional problem area. In addition, you will become familiar with the radio test mode of
operation which is a helpful tool. If any basic receiver or transmitter parameters fail to be met, the
radio should be aligned using the radio alignment procedure described in the ASTRO Digital XTL 5000 VHF/UHF Range 1/UHF Range 2/700–800 MHz Mobile Radio Basic Service Manual.
Page 52
1-2Introduction: General
Included in other areas of this manual are functional block diagrams, detailed theory of operation,
troubleshooting charts and waveforms, schematics, and parts list. You should be familiar with these
sections to aid in deducing the problem circuit. Also included are component location diagrams to aid
in locating individual circuit components, as well as IC diagrams, which identify some convenient
probe points.
The Theory of Operation section of this manual contains detailed descriptions of operations of many
circuits. Once you locate the problem area, review the Troubleshooting Chart for that circuit to fix the
problem.
May 25, 20056881096C74-B
Page 53
Chapter 2Product Overview
2.1Introduction
The ASTRO Digital XTL 5000 radio is a dual-mode (trunked/conventional), microcontroller-based
transceiver incorporating a Digital Signal Processor (DSP). The microcontroller handles the general
radio control, monitors status, and processes commands input from the keypad or other user
controls. The DSP processes the typical analog signals and generates the standard signaling
digitally to provide compatibility with existing analog systems. In addition it provides for digital
modulation techniques utilizing voice encoding techniques with error correction schemes to provide
the user with enhanced range and audio quality all in a reduced bandwidth channel requirement. It
allows embedded signaling which can mix system information and data with digital voice to add the
capability of supporting a multitude of system features.
The XTL 5000 radios are wideband, synthesized, fixed-tuned radios and are available in the VHF
(136–174 MHz), UHF Range 1 (380–470 MHz), UHF Range 2 (450–520 MHz), 700 MHz, and
800 MHz bands. All XTL 5000 radios are capable of both analog operation (12.5 kHz, 20 kHz, and
25 kHz bandwidths) and ASTRO mode operation (12.5 kHz bandwidth).
NOTE: The UHF radio does not support 20 kHz bandwidth.
2.2Functional Blocks
The XTL 5000 radios contain the following functional blocks:
• Control-Head Assembly (Dash- or Remote-Mount)—is connected directly to the front of the
transceiver or remotely by the interconnect board and control cable. This assembly contains a
vacuum fluorescent (VF) display, VF driver, microprocessor and serial bus interface.
• Radio Power Distribution—contains voltage-regulation circuitry for power distribution
throughout the radio.
• Receiver Front-End section—contains the preselector, low-noise amplifier (LNA), and mixer.
• Receiver Back-End section—contains the receiver intermediate-frequency (IF) amplifier/filter
and the digital receiver back-end integrated circuit (IC).
• Transmitter section—contains the antenna switch, directional coupler/ detector, and power
amplifier circuitry.
• Frequency Generation section—contains the synthesizer, voltage controlled oscillators (VCOs),
reference oscillator, and receive and transmit buffers.
• Controller section—combines a vocoder and a controller into a single section containing the
following elements:
Page 54
2-2Product Overview: Control-Head Assembly
2.3Control-Head Assembly
This section discusses the basic operation and components of each control-head assembly.
2.3.1Display, Vacuum Fluorescent Display Driver, Vacuum Fluorescent Voltage
Source, Controls and Indicators, Status LEDs and Backlight LEDs
For information on the above, please refer to:
• W3 Control Head User’s Guide, 6881096C67 and
• W4, W5, W7 and W9 Control Heads User’s Guide, 6881096C68.
2.3.2Vehicle Interface Ports
The Vehicle Interface Ports (VIPs) allow the control head to activate external circuits and receive
inputs from the outside world. In general, VIP outputs are used for relay control, and VIP inputs
accept inputs from external switches. The VIP IN and VIP OUT lines move as the configuration
changes from Dash, to Remote, to Remote plus DEK. See the cable kit section for typical
connections of VIP input switches and VIP output relays.
2.3.2.1 Dash-Mount Control-Head Configuration (Mid Power Only)
In the dash-mount configuration (Figure 2-1), only two VIP output pins are available, and they are
located at the 26-pin accessory connector, J2-18 and J2-19. VIP input lines are not available in this
configuration.
U1
MC68HC
Control
Head
Pin 18
Pin 19
No connect
Pin 11
Pin 12
SB9600 data
lines toggle
VIP-OUT
hadware
inside the
Control Head
MicroprocessorSIOIC
Main Board
(Radio)
Figure 2-1. VIP Dash-Mount Configuration
2.3.2.2 Remote-Mount Standard Control-Head Configuration
Once the radio is put into a remote-mount configuration (Figure 2-2 on page 2-3), the two VIP output
pins located at the rear connector (J2) stop functioning, and the VIP output pins located on the back
of the control head below the area labeled "VIP" become the new VIP output pins. These
connections are used to control relays, just as in the dash-mount configuration. One end of the relay
should be connected to SWB+, while the other side is connected to VIP IN or VIP OUT pins (these
pins are software-controlled on/off switches via transistors inside the control head or on the
interconnect board).
Pin 18
Pin 19
MAEPF-27921-O
VIP OUT 1
VIP OUT 2
May 25, 20056881096C74-B
Page 55
Product Overview: Control-Head Assembly2-3
U1
MC68HC
Control
Head
VIP OUTVIP IN
VIP OUTVIP IN
SB9600 data
lines toggle
VIP-OUT
hadware
inside the
Control Head
Main Board
VIP OUT 1
VIP OUT 2
Figure 2-2. VIP Remote-Mount Configuration
22
11
MicroprocessorSIOIC
(Radio)
MAEPF-27922-O
1 2 3 4 5 7 8 10 11 12 13 14 15 16 17
18 19 20 21 23 24 26 27 28 29 30 31 32 33
34 35 36 37 38 40 41 43 44 45 46 47 48 49 50
SWB SWB GND GND
+
+
SWB GND
+
MICVIPRADIO
MAEPF-27918-O
Figure 2-3. VIP Remote-Mount Pin-Outs (Male)
6881096C74-BMay 25, 2005
Page 56
2-4Product Overview: Control-Head Assembly
2.3.2.3 Remote-Mount W3 Hand-Held Control Head Configuration
Because the W3 control head does not have an interface for VIPs on the control head itself, the radio
and the W3 interconnect board must work together to provide VIP OUT at the back of the radio
(Figure 2-4). The driving transistors (for the ON/OFF relay control) are located on the W3
interconnect board. Therefore, the microprocessor on the main board uses one set of lines to
interface with the interconnect board's transistors and a second set of return lines, which travel back
to the main board and pass through to the back of the radio. Also, by using a Y-split cable HKN6096,
VIP OUT also can be accessed at its 15-pin connector. However, the voltage levels are slightly lower
since the VIP SWB+ of the interconnect board is different from the SWB+ of the radio.
Another remote-mount configuration possibility is the addition of up to three Direct Entry Keypad
(DEK) boxes (Figure 2-5 on page 2-5). A DEK is an accessory that is used with a mobile radio to
provide extra buttons, indicators, and VIPs to the user. Just as the VIP output pins moved from the
rear of the radio to the rear of the control head, the VIP pins also move from the back of the control
head to the back of the DEK. The benefit of using a DEK box is that you gain three additional
VIP OUT and VIP IN pins for each DEK added. The first DEK box provides the original three
VIP OUT and three VIP IN pins. The next DEK provides an additional three VIP OUT and three
VIP IN pins. A final DEK box provides an additional three VIP OUT and three VIP IN pins for a total
of nine VIP OUT and nine VIP IN pins.
Pin 13
Pin 14
Pin 11
Pin 12
Main Board
(Radio)
Micro-
processor
Pin 18
Pin 19
MAEPF-27923-O
VIP OUT 1
VIP OUT 2
May 25, 20056881096C74-B
Page 57
Product Overview: Control-Head Assembly2-5
When a DEK is added, the
radio VIPs move from J2
and from the back of the
control head to the back of
Main Board
the DEK.
(Radio)
SB9600 bus
messaging
interface
Control Head
(W4, W5, W7, W9)
3 VIP - INs
3 VIP - OUTs
3 VIP - INs
3 VIP - OUTs
(B)
DEK A
(A) DEK interface lines:
DATA IN
DATA OUT
STROBE
CLOCK
3 VIP - INs
3 VIP - OUTs
1 2 3 4 5 7 8 10 11 12 13 14 15 16 17
STROBE GND CLOCK DATA VIP OUT VIP OUT SWB+
DEK B
Kit HKN4273 contains:
- One DEK-to-DEK interface cable (A)
- One 24-pin DEK VIP connector (B)
DEK C
Figure 2-5. VIP Remote-Mount Plus DEK Configuration
DATA
OUT STROBE 2
GND GND GND
DATA VIP IN VIP IN
IN
18 19 20 21 23 24 26 27 28 29 30 31 32 33
34 35 36 37 38 40 41 43 44 45 46 47 48 49 50
OUT
SWB+ DATA SWB+ VIP OUT SWB+ SWB+
IN
1
- One 14-pin non-DEK VIP connector
- Forty cimping pins
MAEPF-27925-O
VIP IN
GNDCLOCK
3
2
1
3
TO NEXT DEK BOXDEK VIP-INs AND VIP-OUTs
OR PREVIOUS DEK BOX
FROM
CONTROL HEAD
MAEPF-27917-O
Figure 2-6. VIP Remote-Mount Plus DEK Pin-Outs (Male)
6881096C74-BMay 25, 2005
Page 58
2-6Product Overview: Control-Head Assembly
2.3.2.5 VIP Output Connections:
There are three VIP outputs that are used for the W9 control head and two VIP outputs for the W3,
W4, W5, and W7 control heads. The VIP outputs are normally at SWB+ levels and are driven low by
logic within the control head for both the dash- and remote-mount configurations. Field programming
of the radio can define the functions of these pins. The output transistors that drive the VIP outputs
can sink 300 mA of current and are primarily used to control external relays. These relays should be
connected between the respective VIP output pin and switched B+.
VIP outputs are controlled by SB9600 Update_Indicator messages. Therefore, multiple indicators
and their status information can be sent with a single message.
The relay can be normally ON or normally OFF depending on the configuration of the VIP outputs.
The CPS can be used to program the function of these VIP outputs in the radio.
The following are typical applications currently supported with ASTRO products:
• Horn relay
• Light relay
• Siren horn transfer
2.3.2.6 VIP Input Connections:
There are three VIP inputs that accept inputs from switches. VIP input messages are sent via the
SB9600 pins as SB9600 BUTCTL messages. One side of the switch connects to ground while the
other side connects to a buffered input to the control head. The switch can be normally closed or
normally open depending on the configuration of the VIP inputs. The CPS can be used to program
the function of these VIP inputs in the radio.
The following are typical applications currently supported in ASTRO products:
• Siren horn ring
• Auxiliary siren
Table 2-1. Control-Head VIP Locations
Type
W3RemoteMidpowerJ3-3 and J3-12
W3DashMidpowerJ2-18 and J2-19
W4DashMidpowerJ2-18 and J2-19
W5DashMidpowerJ2-18 and J2-19
W7DashMidpowerJ2-18 and J2-19
Configur
-ation
Power
Level
VIP Location
Remote Mount Accessory Cable
HKN6096
Rear Accessory Connector
Rear Accessory Connector
Rear Accessory Connector
Rear Accessory Connector
Number of
VIP Inputs
None2
None2
None2
None2
None2
Number of
VIP Outputs
For the remote configuration of W4, 5, 7 and 9 control heads, refer to sections 3.1.2 and 3.2.1 of the
Installation Manual, 6881096C72.
May 25, 20056881096C74-B
Page 59
Product Overview: Control-Head Assembly2-7
2.3.2.7 DEK Interface With Radio: Remote-Mount (W4, W5, W7, W9)
A maximum of three DEKs can be daisy chained to a single mobile radio. DEKs are only used with
the W4, W5, W7, and W9 control heads when they are remotely mounted on the radio. DEKs are not
used with any dash-mount control heads, including W4, W5, W7, or W9. The W3 control head does
not support DEK, except in a special siren cabling configuration where the DEK 6-pin cable splits off
the SIREN cable and plugs into the back of a DEK box.
The VIP lines in the control head are used to connect a DEK. There are four lines that are needed to
communicate with the DEK: DATA IN, DATA OUT, STROBE, and CLOCK. These lines are shared
with the VIP lines in the control head (see Table 2-1 on page 2-6) and, as a result, the control head
loses its VIP lines when connected to a DEK. However, each DEK has its own VIP lines (three
VIP IN and three VIP OUT lines) that can be used.
Each DEK box is essentially a shift register consisting of eight buttons/indicators together with the
VIP lines. A raw, 48-bit stream of data from the control head is clocked into the first DEK box that is
directly connected to it. This DEK box only shifts the bits forward to DEK B, which, in turn, forwards
the bits to DEK C. Thus, bit 0 leaving the control head is actually stored as the last bit of DEK C. The
full 48 bits is always clocked in/out regardless of the number of DEKs connected. The software is
able to determine how many DEKs are actually connected by checking the "DEK present" bit for
each DEK. The VIPs provided by each DEK box can then be used for driving external circuitry.
2.3.2.7.1 DATA IN
DATA IN consists of data entering from either the control head or another DEK. DATA IN is a raw bit
stream fed into the DEK, which, in turn, essentially being a shift register, moves the data forward to
the next DEK. DATA IN is a 48-bit stream that consists of indicator data (0 = off, 1 = illuminated) and
VIP output data.
2.3.2.7.2 DATA OUT
DATA OUT consists of data leaving the DEK and either entering a control head or another DEK.
DATA OUT is a 48-bit stream that consists of button data (0 = pressed, 1 = released), VIP input data,
and DEK present.
2.3.2.7.3 STROBE
The STROBE line is used to latch the data contained in the shift registers inside the DEK box. This
line is used to inform the DEK that the data contained in its shift registers is now valid.
2.3.2.7.4 CLOCK
The CLOCK line is used to shift data in and out through the shift registers located in the DEK boxes.
2.3.3Power Supplies
The +5-V supply is a three-terminal regulator IC to regulate the 12 V SWB+ down for the digital logic
hardware.
2.3.4Ignition Sense Circuits
A transistor senses the vehicle ignition’s state, disabling the radio when the ignition is off. For
negative-ground systems, the orange lead is typically connected to the fuse box (+12 V).
6881096C74-BMay 25, 2005
Page 60
2-8Product Overview: Receiver Section
2.4Receiver Section
This section discusses the receiver section components and basic operation for each band.
2.4.1VHF Band Radios
The VHF (136–174 MHz) receiver consists of a front-end and a back-end sections.
2.4.1.1 Front-End Section
The primary function of the receiver front-end is to optimize image rejection and selectivity while
providing the first conversion. The front-end uses discreet filters and LNAs. The first filter reduces
the IF spur, image frequency response and limits some of the out-of-band interference. The second
filter following the second low-noise amplifier (LNA) provides additional image rejection and half IF
spur.
The receiver front-end signal is fed to the monolithic mixer IC where it is down converted to an IF of
109.65 MHz. The mixer is driven by the receiver injection buffer that provides 20 dBm to the mixer.
The VCO performs high side injection for the VHF band. The design maintains temperature stability,
low insertion loss, and high out-of-band rejection.
2.4.1.2 Back-End Section
The crystal filters provide IF selectivity and out-of-band signal protection to the back-end IC. Two 2pole crystal filters centered at 109.65 MHz that are isolated from one another by a stable, high-gain
low noise amplifier are used to meet the receiver specifications for gain, close-in intermodulation
rejection, adjacent-channel selectivity, and second-image rejection.
The output of the IF circuit is fed directly to the Abacus III digital back-end IC. The ABACUS III is an
IC with a variable-bandwidth bandpass Sigma-Delta architecture. It is capable of down-converting
analog, as well as digital, RF protocols into a baseband signal transmitted on the Synchronous Serial
Interface (SSI) bus. The ABACUS III IC converts the 109.65 MHz signal from the IF section down to
2.25 MHz using a second LO frequency of 107.4 MHz or 111.9 MHz. The second LO VCO is tuned to
107.4 MHz (low side), but can be modified to 75.6 MHz (high side injection) depends on known
spurious interference related to the programmed received frequency.
2.4.2UHF Range 1/UHF Range 2 Band Radios
The UHF Range 1 (380–470 MHz)/UHF Range 2 (450–520 MHz) receiver consists of a front-end
section and a back-end section.
2.4.2.1 Front-End Section
The receiver front-end consists of a switchable high pass filter and LNA, a preselector, a switchable
attenuator, a second switchable low noise amplifier (always in for UHF Range 2), image filter, mixer,
and injection amplifier. The preselector filter is varactor-tuned and is aligned at the factory. The radio
tuner software can also be used to check and re-align the preselector. The switchable stage provides
AGC capability.
The signal from the preselector is amplified by the low noise amplifier, then filtered by the image filter
before it is sent to the mixer. The mixer uses the LO signal, amplified by the injection amplifier, to
convert the RF signal to IF frequency of 109.65 MHz. This signal is then sent to the IF and back-end
circuits.
2.4.2.2 Intermediate Frequency and Back-End
The Intermediate Frequency (IF) consists of a crystal filter, amplifier, a second crystal filter, and a
switchable attenuator. This provides selectivity at the IF while attenuating out-of-band signals and
protecting the back-end (BE) IC.
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Product Overview: Transmitter Section2-9
The back-end is primarily the ABACUS III digital IC. The ABACUS III IC uses a variable-bandwidth
bandpass sigma-delta architecture. It is capable of down-converting analog as well as digital RF
protocols into a baseband signal, which is then transmitted over the Synchronous Serial Interface
(SSI) bus to the DSP and microprocessor.
2.4.3700–800 MHz Band Radios
The 700–800 MHz receiver consists of a front-end section and a back-end section.
2.4.3.1 Front-End Section
The primary function of the receiver front-end is to optimize image rejection and selectivity while
providing the first conversion. The front-end uses ceramic-filter technology and includes a wideband,
monolithic amplifier. The first filter is a dual-switched filter that reduces the image frequency
response and limits some of the out-of-band interference. The second filter following the monolithic
low-noise amplifier (LNA) provides additional image rejection.
The receiver front-end signal is fed to the monolithic mixer IC where it is down converted to an IF of
73.35 MHz. The mixer is designed to provide low conversion loss and high intermodulation
performance. The mixer is driven by the receiver injection buffer, a two-stage discrete IC design used
with the receiver VCO to efficiently drive the mixer over a wide temperature range with minimum
power variation. The injection buffer provides 15 dBm to the mixer. The VCO performs low-side
injection for the 800 MHz band and high-side Injection for the 700 MHz band. The design maintains
temperature stability, low insertion loss, and high out-of-band rejection.
2.4.3.2 Back-End Section
The crystal filters provide IF selectivity and out-of-band signal protection to the back-end IC. Two
2-pole crystal filters centered at 73.35 MHz that are isolated from one another by a stable, moderategain amplifier are used to meet the receiver specifications for gain, close-in intermodulation
rejection, adjacent-channel selectivity, and second-image rejection.
The output of the IF circuit is fed directly to the ABACUS III digital back-end IC. The ABACUS III is an
IC with a variable-bandwidth bandpass Sigma-Delta architecture. It is capable of down-converting
analog, as well as digital, RF protocols into a baseband signal transmitted on the Synchronous Serial
Interface (SSI) bus. The ABACUS III IC converts the 73.35 MHz signal from the IF section down to
2.25 MHz using a second LO frequency of 71.1 MHz or 75.6 MHz. The second LO VCO is tuned to
71.1 MHz (low side) or 75.6 MHz (high side injection). The choice of frequency depends on known
spurious interference related to the programmed received frequency.
2.5Transmitter Section
This section discusses the transmitter section components and basic operation for each band.
2.5.1VHF Radios
The VHF (136–174 MHz) transmitter consists of an RF power amplifier (RFPA), output network
(ON), and power control. See 2.5.3 700–800 MHz Radios below for an overview of the transmitter
sections.
2.5.2UHF Range 1/UHF Range 2 Radios
The UHF Range 1 (380–470 MHz)/UHF Range 2 (450–520 MHz) transmitter consists of an RF
power amplifier (RFPA), output network (ON), and power control. See 2.5.3 700–800 MHz Radios
below for an overview of the transmitter sections.
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2-10Product Overview: Frequency Generation Unit
2.5.3700–800 MHz Radios
The 700–800 MHz transmitter consists of an RF power amplifier (RFPA), output network (ON), and
power control.
2.5.3.1 RFPA
The RFPA is a three-stage, discrete-LDMOS transistor amplifier consisting of the following stages:
first, driver, and final.
The first stage acts as a variable-gain amplifier and feeds the driver stage, which, in turn, feeds the
final stage. All of the stages are matched using transmission lines, capacitors, and inductors. Stage
drain biases are supplied via A+ or K9.1V and DRV_9.3V (DRV_9.3V is present for UHF Range 1
and UHF Range 2 only). Stage gate biases are supplied via a digital-to-analog converter (DAC) or
the RFPA control voltage.
2.5.3.2 Output Network
The output network (ON) consists on the antenna switch, harmonic filter, and power detector. The
antenna switch operates in two modes: RX and TX.
In TX mode, the RFPA final stage is connected to the antenna through the harmonic filter and power
detector and is isolated from the RX path.
In RX mode, the antenna is connected to the RX front-end through the power detector and the
harmonic filter and is isolated from the TX path. The harmonic filter attenuates harmonics generated
by the RFPA when the antenna switch is in TX mode and provides extra selectivity in RX mode.
The power detector senses forward and reverse power and generates a detected voltage
proportional to each.
2.5.3.3 Power Control
The forward-power and reverse-power detected voltage is fed back to the power control section
where it is added to a DAC voltage determined via power tuning and compared to a reference
voltage. A control loop corrects the control voltage adjusting the first stage gain to maintain the
reference.
2.5.3.4 Circuit Protection
Final-stage current and temperature as well as radio A+ voltage and RFPA control voltage are
sensed. If a fault condition is determined, power is cut back to a level that is safe for the particular
conditions.
2.6Frequency Generation Unit
This section discusses the frequency generation unit (FGU) components and basic operation for
each band.
2.6.1VHF MHz Radios
The VHF (136-174 MHz) frequency generation unit consists of the following:
• Low-voltage fractional-N synthesizer IC
• 16.8 MHz reference oscillator IC
• Two receiver (RX) voltage-controlled oscillators (VCOs)
• Two transmitter (TX) voltage-controlled oscillators (VCOs)
• VCO buffer/amplifier circuits
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Product Overview: Frequency Generation Unit2-11
• Associated circuitry
The reference oscillator IC provides a frequency standard to the Fractional-N synthesizer IC, the
ABACUS III digital back-end IC, and the controller section. The synthesizer turns on one of the four
VCOs (determined by mode and band of operation) and tunes it to the receiver (RX) local oscillator
(LO) or transmitter (TX) carrier frequency.
All four voltage-controlled oscillators (VCOs) employ a discrete Colpitts configuration with a Nchannel J-FET transistor. The VCOs tank consists of a varactor diode, coupling capacitor, and a
resonator. The varactor changes the oscillator frequency when the DC voltage of the steering line
changes. The output of the VCOs is coupled to the second transistor for impedance buffering, and its
output is coupled to respective TX/RX buffer amplifiers.
In TX mode, the transmitter VCO output is coupled to a three-stage buffer before being injected into
the power amplifier. In RX mode, the receiver VCO output is buffered and amplified with a twostages. The output of the second-stage transistor is split into two paths. One path feeds back to the
synthesizer prescaler; the other path is injected into the third-stage. The output of the third-stage
provides the proper signal level for the LO port of the RX front-end mixer.
The superfilter supplies the voltage to the first two stages of the TX buffer and to the first two stages
transistor of the RX buffer/amplifier. The voltage for the third stage of the TX buffer is supplied by a
keyed 9.1 V source to conserve current drain while the radio is receiving. The third-stage of the RX
buffer/amplifier is supplied by a 9.3 V regulator.
2.6.2UHF Range 1/UHF Range 2 Radios
The UHF Range 1 (380–470 MHz)/UHF Range 2 (450–520 MHz) frequency generation unit consists
of the following:
• Low-voltage fractional-N synthesizer IC
• 16.8 MHz reference oscillator IC
• Three receive voltage-controlled oscillators (VCO)
• Two transmit VCOs
• VCO buffer/amplifier circuits
• Associated circuitry
See 2.6.3 700–800 MHz Radios below for an overview of the FGU sections.
2.6.3700–800 MHz Radios
The 700–800 MHz frequency generation unit consists of the following:
• Low-voltage fractional-N synthesizer IC
• 16.8 MHz reference oscillator IC
• Two voltage-controlled oscillator (VCO) modules (receive and transmit, containing two VCOs
each)
• VCO buffer/amplifier circuits
• Associated circuitry
The reference oscillator IC provides a frequency standard to the fractional-N synthesizer IC, the
ABACUS III digital back-end IC, and the controller section. The synthesizer turns on one of the four
VCOs (determined by mode and band of operation) and tunes it to the receiver (RX) local oscillator
(LO) or transmitter (TX) carrier frequency.
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2-12Product Overview: Controller Section
The voltage-controlled oscillator (VCO) module employs a Colpitts configuration with two bipolar
stages in a common-base, common-collector configuration. The LC tank circuit's capacitive portion
consists of a varactor diode, coupling capacitor, and a laser-trimmed capacitor for frequency
adjustment. The inductive portion consists of microstrip transmission line resonators for TX VCO and
coaxial resonators for RX VCO. Tuning is performed by the module manufacturer and is not field
adjustable. The varactor changes the oscillator frequency when the DC voltage of the steering line
changes. The output of the common base is coupled to the second transistor for impedance
buffering, and its output is coupled to respective TX/RX buffer amplifiers.
In TX mode, the transmitter VCO output is coupled to a three-stage buffer before being injected into
the power amplifier. In RX mode, the receiver VCO output is buffered and amplified with a two-stage
transistor/microwave monolithic IC (MMIC) circuit. The output of the first-stage transistor is split into
two paths. One path feeds back to the synthesizer prescaler; the other path is injected into the
second-stage MMIC. The output of the MMIC provides the proper signal level for the LO port of the
RX front-end mixer.
The superfilter supplies the voltage to the first two stages of the TX buffer and to the first-stage
transistor of the RX buffer/amplifier. The voltage for the third stage of the TX buffer is supplied by a
keyed 9.1 V source to conserve current drain while the radio is receiving. The second-stage MMIC of
the RX buffer/amplifier is supplied by a 9.3 V regulator.
2.7Controller Section
This section provides an explanation of radio operating modes and an overview of the controller
section components and circuits.
2.7.1Analog Mode of Operation
When the radio is receiving, the signal comes from the antenna/antenna-switch to the front-end
receiver. The signal is then filtered, amplified, and mixed with the first local-oscillator signal
generated by the voltage-controlled oscillator (VCO). The resulting intermediate frequency (IF)
signal is fed to the IF circuitry, where it is again filtered and amplified. This amplified signal is passed
to the digital back-end IC, where it is mixed with the second local oscillator to create the second IF at
2.25 MHz. The analog IF is processed by an analog-to-digital (A/D) converter inside the digital backend IC where it is converted to a digital bit stream and divided down to a baseband signal, producing
digital samples. These samples are converted to TTL logic signals and sent to the DSP. The DSP
digitally filters and discriminates the signal, decodes the information in the signal, and identifies the
appropriate destination for it. For a voice signal, the DSP will route the digital voice data to the coder/
decoder (CODEC) for conversion to an analog signal. The CODEC will then present the signal to the
audio power amplifier, which drives the speaker. For signalling information, the DSP will decode the
message and pass it to the microcomputer.
When the radio is transmitting, microphone audio is passed to an adjustable gain circuit, then to the
CODEC where the signal is digitized. The CODEC passes digital data to the DSP where preemphasis and low-pass (splatter) filtering are done. The DSP sends this signal to the modulation
digital-to-analog (D/A) converter where it is reconverted into an analog signal and scaled for
application to the voltage-controlled oscillator as a modulation signal. Transmitted signalling
information is accepted by the DSP from the microcomputer, coded appropriately, and passed to the
modulation D/A converter, which handles it the same as a voice signal. Modulation information is
passed to the synthesizer along the modulation line. A modulated carrier is provided to the power
amplifier (PA), which transmits the signal under dynamic power control.
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Product Overview: Controller Section2-13
2.7.2Digital (ASTRO) Mode of Operation
In the ASTRO mode (digital mode) of operation, the transmitted or received signal is limited to a
discrete set of deviation levels, instead of continuously varying. The receiver handles an ASTROmode signal identically to an analog-mode signal up to the point where the DSP decodes the
received data. In the ASTRO receive mode, the DSP uses a specifically defined algorithm to recover
information. In the ASTRO transmit mode, microphone audio is processed identically to an analog
mode with the exception of the algorithm the DSP uses to encode the information. This algorithm will
result in deviation levels that are limited to discrete levels.
2.7.3Controller Section Circuitry
The controller section consists of the following:
• Voltage regulators
• Data connectivity circuitry (RS-232, USB, and SB9600)
• Daughtercard module, which contains the:
- Patriot microprocessor IC
- 64-Mbit (8MB) FLASH IC
- 8-Mbit (1MB) SRAM IC
• Modulation D/A conversion circuitry
• CODEC audio circuitry
• TX power-control circuitry
• Emergency circuitry
• V.I.P input/output paths
• Secure interconnect board interface
• Front connector interface for control heads and remote-mount interconnect boards (I.B)
• Rear connector for additional accessories
• DC power-in plug
The controller section controls receive/transmit frequencies, the display, and various radio functions
using either direct logic control or serial communication to external devices. The connector J0701
provides interface between the encryption module and the controller for encrypting voice messages.
Connector J0402 provides the accessory interface to the outside rear connector while connector
J0401 provides the control-head interface.
The controller section executes a stored program located in the FLASH ROM. Data is transferred to
and from memory via an RS-232 interface on the microprocessor. The memory location from which
data is read, or to which data is written, is selected by the address lines. Besides the host and DSP
code, the customer-specific programming features (codeplug) and tuning parameters also are stored
in the FLASH ROM. The SRAM is used as scratchpad memory for the microprocessor.
The controller section is powered by SW_B+ coming from the control head, which is regulated down
to a 5 V supply. This supply powers the entire controller section and its regulators. The SW_B+
supply is removed from the board when the radio is turned off by the control-head switch.
The microprocessor is powered by a 1.55-V regulator for the microprocessor core and a 2.85-V
regulator for the I/O and control lines, while the memory is powered by a 1.85-V regulator. The 2.85V regulator also supplies almost all of the discrete controller circuitry. These three regulators are all
supplied by a switched 5-V regulator, which also provides power for the SB9600 data bus and for
interface to certain legacy data and control signals.
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2-14Product Overview: Controller Section
The DSP section of microprocessor performs signaling, voice encoding/decoding, audio filtering,
microphone gain and tuning, Private-Line/Digital Private Line (PL/DPL) encode, and alert-tone
generation. It processes all baseband audio signals, providing pre-emphasis and signaling/filtering of
the digital microphone audio data, as well as other transmitted signals. It also performs de-emphasis
and decoding of received digital speaker audio and other received signals. The DSP clock frequency
is derived from the 16.8 MHz reference oscillator clock input using a phase-locked loop (PLL) inside
the Patriot IC. The digital audio bus on the Patriot IC uses an 8 kHz clock, which provides the
sampling rate, and a 512 kHz clock, which provides the data rate.
The CODEC performs analog-to-digital and digital-to-analog conversions on audio signals. The DSP
controls squelch, deviation, and compensation, and it executes receiver filtering and discrimination.
The interface to the RX back-end IC (ABACUS III IC) consists of a single logic-level data line, a
1.2 MHz clock line (the discriminator data bit rate) and a 20 kHz frame-sync line (the discriminator
data sample rate). These clocks are generated by the ABACUS III IC and provided to the Patriot IC.
The interface to the TX modulation/DAC consists of a single logic-level data line, a 2.4 MHz clock
line (the modulation data bit rate), and a 48 kHz clock line (the modulation data sample rate). These
clocks are generated by the Urchin IC and provided to the Patriot IC.
Other functions provided by the controller include SB9600 communication, IC programming, and TX
power control. The SB9600 bus is used to communicate to legacy control heads and accessories. IC
programming is performed via the SPI bus for ICs including the ABACUS III, LV Frac-N, A/D, D/A,
and volume attenuator. The power-control circuitry receives power set and limit inputs from the D/A
IC and feedback from the RF power amplifier (RFPA). Based on these inputs, the circuit produces a
control voltage to maintain a fixed RF power level to the antenna.
The controller also provides detection of the On/Off and reset inputs. The reset circuits consist of the
regulator power-on reset circuit, low SW_B+ voltage-detector circuit, an ignition detection circuit, an
emergency detection circuit, and the external-bus system reset. The reset circuits allow the
microcomputer to recover from an unstable situation; for example, no battery on the radio, battery
voltage too high or too low, and remote devices on the external bus not communicating.
Communication using RS-232 protocol is provided to the rear accessory connector (J2).
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Chapter 3Theory of Operation
3.1Main Board
This section provides a detailed circuit description of the XTL 5000 radio main board for VHF/UHF
Range 1/UHF Range 2/700–800 MHz models. The main board contains the following major
sections:
• Radio Power (page 3-12)
• Receiver Front-End (page 3-13)
• Receiver Back-End (page 3-20)
• Transmitter (page 3-26)
• Frequency Generation Unit (page 3-45)
• Controller (page 3-62)
When reading the theory of operation, refer to your appropriate schematic and component location
diagrams located in “Chapter 7. Schematics, Component Location Diagrams, and Parts Lists”. This
detailed Theory of Operation will help isolate the problem. However, first use the ASTRO Digital XTL 5000 VHF/UHF Range 1/UHF Range 2/700–800 MHz Mobile Radio Basic Service Manual
(6881096C73) to troubleshoot the problem to a particular board.
3.2Main Board Major Sections
This section contains the main board layouts for each radio frequency band.
3.2.1VHF (136–174 MHz) Band
The illustrations (Figure 3-1 on page 3-2 to Figure 3-4 on page 3-5) and their accompanying tables
(Table 3-1 on page 3-2 to Table 3-4 on page 3-5) identify the location of the major sections of the
main board.
Figure 3-3. XTL 5000 Main Board Sections (VHF High Power)—Side 1
Table 3-3. XTL 5000 Main Board Sections (VHF High Power)—Side 1
1Secure Connector (J0501)8Controller Section
2Front Connector (J0401)9Audio Power Amplifier (PA)
3RX Back-End (ABACUS III)10RX VCO
416.8 MHz Reference Oscillator11TX VCO
5IF Filter12TX PA
6RX Front-End13TX Power Control
7Daughtercard
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Theory of Operation: Main Board Major Sections3-5
5
14
13
15
19
18
16
3
21
6
20
12
Figure 3-4. XTL 5000 Main Board Sections (VHF High Power)—Side 2
Table 3-4. XTL 5000 Main Board Sections (VHF High Power)—Side 2
3RX Back-End16Antenna Switch
5IF Filter17Rear Connector (J0402)
6Controller Section18RX Front-End Biasing
12TX PA19RX VCO Injection Stage
13TX Power Control20TX VCO Injection Stage
14Power Detector21FGU (Synthesizer)
15Harmonic Filter
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3-6Theory of Operation: Main Board Major Sections
3.2.2UHF Range 1 (380-470 MHz) and UHF Range 2 (450-520 MHz) Band
The illustrations (Figure 3-5 on page 3-6 to Figure 3-8 on page 3-9) and their accompanying tables
(Table 3-5 on page 3-6 and Table 3-8 on page 3-9) identify the location of the major sections of the
main board.
8
49
50
2
1
2
19
20
1
1
2
5
34
7
11
10
6
9
13
12
Figure 3-5. XTL 5000 Main Board Sections (UHF Range 1 Mid Power and UHF Range 2)—Side 1
Table 3-5. XTL 5000 Main Board Sections (UHF Range 1 Mid Power and UHF Range 2)—Side 1
1Secure Connector (J0501)8Controller Section
2Front Connector (J0401)9Audio Power Amplifier (PA)
3RX Back-End (ABACUS III)10RX VCO
416.8 MHz Reference Oscillator11TX VCO
5IF Filter12TX PA
6RX Front-End13TX Power Control
7Daughtercard
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Theory of Operation: Main Board Major Sections3-7
5
14
6
15
18
16
10
3
12
19
11
8
32
17
31
2
1
13
Figure 3-6. XTL 5000 Main Board Sections (UHF Range 1 Mid Power and UHF Range 2)—Side 2
Table 3-6. XTL 5000 Main Board Sections (UHF Range 1 Mid Power and UHF Range 2)—Side 2
3RX Back-End13TX Power Control
5IF Filter14Power Detector
6RX Front-End15Harmonic Filter
8Controller Section16Antenna Switch
10RX VCO17Rear Connector (J0402)
11TX VCO18RX VCO Injection Stage
12TX PA19FGU (Synthesizer)
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3-8Theory of Operation: Main Board Major Sections
2
1
5
8
7
9
4
11
3
10
6
13
12
Figure 3-7. XTL 5000 Main Board Sections (UHF Range 1 High Power)—Side 1
Table 3-7. XTL 5000 Main Board Sections (UHF Range 1 High Power)—Side 1
1Secure Connector (J0501)8Controller Section
2Front Connector (J0401)9Audio Power Amplifier (PA)
3RX Back-End (ABACUS III)10RX VCO
416.8 MHz Reference Oscillator11TX VCO
5IF Filter12TX PA
6RX Front-End13TX Power Control
7Daughtercard
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Theory of Operation: Main Board Major Sections3-9
5
3
21
20
6
13
12
14
15
16
Figure 3-8. XTL 5000 Main Board Sections (UHF Range 1 High Power)—Side 2
Table 3-8. XTL 5000 Main Board Sections (UHF Range 1 High Power)—Side 2
3RX Back-End13TX Power Control
5IF Filter14Power Detector
6RX Front-End15Harmonic Filter
8Controller Section16Antenna Switch
10RX VCO17Rear Connector (J0402)
11TX VCO18RX VCO Injection Stage
12TX PA19FGU (Synthesizer)
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3-10Theory of Operation: Main Board Major Sections
3.2.3700–800 MHz Band
The illustrations (Figure 3-9 and Figure 3-10 on page 3-11) and their accompanying tables (Table 3-9
and Table 3-10 on page 3-11) identify the location of the major sections of the main board.
49
50
8
9
13
1
2
2
19
20
1
1
2
5
34
7
11
10
6
12
MAEPF-27876-O
Figure 3-9. XTL 5000 Main Board Sections (700–800 MHz)—Side 1
Table 3-9. XTL 5000 Main Board Sections (700–800 MHz)—Side 1
1Secure Connector (J0501)8Controller Section
2Front Connector (J0401)9Audio Power Amplifier (PA)
3RX Back-End (ABACUS III)10RX VCO
416.8 MHz Reference Oscillator11TX VCO
5IF Filter12TX PA
6RX Front-End13TX Power Control
7Daughtercard
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Theory of Operation: Main Board Major Sections3-11
5
3
21
6
18
14
Figure 3-10. XTL 5000 Main Board Sections (700–800 MHz)—Side 2
15
19
16
12
20
32
17
31
2
1
13
MAEPF-27877-O
Table 3-10. XTL 5000 Main Board Sections (700–800 MHz)—Side 2
3RX Back-End16Antenna Switch
5IF Filter17Rear Connector (J0402)
6Controller Section18RX Front-End Biasing
12TX PA19RX VCO Injection Stage
13TX Power Control20TX VCO Injection Stage
14Power Detector21FGU (Synthesizer)
15Harmonic Filter
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3-12Theory of Operation: Radio Power Distribution
3.3Radio Power Distribution
This section provides information on DC power distribution in XTL 5000 radios. In the XTL 5000
radio, power is distributed to three boards: the main board, control head, and secure interface board.
Power for the radio is supplied by the vehicle’s 12-V battery. When using a desktop adapter unit, an
external DC power supply can be connected to replace the vehicle’s battery source.
A+ (referred to as incoming unswitched battery voltage) enters the radio through the rear RF power
amplifier connector (J0950) and is the main entry for DC power. The second path, through J2, pin 25,
provides ignition sense to inhibit radio turn-on when the ignition switch is off.
When the control-head On/Off button is turned on, the three 9.3-V regulators power on the controller
section, the RX/frequency generation unit (FGU) section, and the TX section. See Figure 3-11 for the
UHF Range 1 and UHF Range 2 bands or Figure 3-12 on page 3-13 for the VHF and 700-800 MHz
bands.
On/Off
Control Head
SIOIC
A+
SWB+
IGN
J0401
19, 21
17
20
3.0V
Regulator
U0962
A+
FET
Q0503
9.3V
Regulator
U0500
5V
Regulator
U0503
2.85V
Regulator
U0501
Controller SectionRX / FGU Section
1.85V
Regulator
U0507
VCC5
1.55V
Regulator
U0502
3V
Regulator
U6750
SW_A+
9.33V
Regulator
U0950
5V
Regulator
U0505
5V Circuit
VR0500, R0507
9.3V_FGU
3V
Regulator
U6002
UNSW
9.3V_TX
UWW_5V
9.3V
Regulator
U0951
KEYED_9.1_EN
Switch
GPIO
TX Section
Figure 3-11. DC Voltage Routing Block Diagram (UHF Range 1 and UHF Range 2)
9.3V
Regulator
U5570
DRV_9.3V
J0402
20, 22
J0950
J2
24
SWB+
25
18
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Theory of Operation: Receiver Front-End3-13
On/Off
Control Head
SIOIC
A+
SWB+
IGN
J0401
19, 21
17
20
3.0V
Regulator
U0962
FET
Q0503
9.3V
Regulator
U0500
5V
Regulator
U0503
2.85V
Regulator
U0501
Controller Section
1.85V
Regulator
U0507
VCC5
A+
1.55V
Regulator
U0502
SW_A+
9.33V
Regulator
U0950
5V
Regulator
U0505
3V
Regulator
U6750
RX / FGU Section
UNSW
5V Circuit
VR0500, R0507
9.3V_FGU
3V
Regulator
U6002
9.3V_TX
UWW_5V
9.3V
Regulator
U0951
TX Section
Figure 3-12. DC Voltage Routing Block Diagram (VHF and 700–800 MHz)
KEYED_9.1_EN
Switch
GPIO
J0402
20, 22
J0950
J2
24
25
18
MAEPF-27825-O
SWB+
The 9.3 V and the A+ voltage are the main DC power for the RF section. The 9.1 V (referred to as
“keyed 9.1 V”) is controlled by the VOCON board through P501, pin 45. This DC voltage enables the
transmitter’s RF power amplifier when the VOCON board senses a lock detect from the synthesizer.
3.4Receiver Front-End
This section provides a detailed circuit description of receiver front-end (RXFE). When reading the
Theory of Operation, refer to your appropriate schematic and component location diagrams located
in “Chapter 7. Schematics, Component Location Diagrams, and Parts Lists”. This detailed theory of
operation will help isolate the problem to a particular component.
3.4.1VHF (136–174 MHz) Band
The receiver circuits primary duties are to detect, filter, amplify, and demodulate RF signals in the
presence of strong interfering noise and unintended signals. The receiver is broken down into the
following blocks (Figure 3-13 on page 3-14):
• Front-end, which includes:
- 15 dB step attenuator
- PIN diode switches
- Three discrete filters
- Two low-noise amplifiers
-Mixer
• Back-end, which includes:
- Two crystal filters
6881096C74-BMay 25, 2005
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3-14Theory of Operation: Receiver Front-End
- Low-noise IF amplifier
- ABACUS III digital back-end IC
RF Input
Front-end
Ant. SW.
Harm. FLT
Att.
Pre Mode
HPF
Std Mode
ABACUS
Back-end
IC
Figure 3-13. Receiver Block Diagram (VHF)
3.4.1.1 15 dB Step Attenuator (U3250)
The 15 dB step attenuator provides protection from strong on-channel signals and interferences.
3.4.1.2 PIN Diode Switches
The VHF front end operates in two modes: Standard mode and Preamp mode. The PIN diode
switches select between the two modes. In standard mode the intermodulation performance is
improved by bypassing the first HPF and LNA. Preamp mode is characterized by higher sensitivity.
Back-end
2 Pole
Crystal
LNA 1
LNA
BPF 1BPF 2
2 Pole
Crystal
LNA 2
Mixer
LO
3.4.1.3 Preselector Filters
The front-end operates in the 136-174 MHz band. The front-end filters primary function is to provide
protection against out-of-band spurious responses such as image, IF, half-IF, etc. while providing flat,
low-loss response in the receive band. The front-end uses discrete LC filter technology. The first filter
is a high-pass filter that protects the first LNA from strong out-of-band signals at frequencies which
are below the receive band and is used in preamp mode only. The second and third filters are bandpass filters that provide additional out-of-band spurious rejection.
3.4.1.4 Low-Noise Amplifiers (Q3255, Q3252)
The function of the Low-Noise Amplifiers (LNA) is to amplify the received signal with minimal noise
contribution. The first LNA (Q3255) has 10 dB of gain and is activated in Preamp mode only. A
clamping diode pair (D3256) located after the High Pass and before the first LNA protects the
receiver from strong RF signals by limiting the signal amplitude going into the amplifier. The second
LNA (Q3252) has 15 dB of gain. Both LNAs are biased with 9.3V.
May 25, 20056881096C74-B
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Theory of Operation: Receiver Front-End3-15
3.4.1.5 Mixer (D3258)
The received signal is down-converted by a double-balanced mixer to an Intermediate Frequency
(IF) of 109.65 MHz. The mixer is designed to provide low conversion loss and high intermodulation
performance. The injection buffer provides a 20 dBm LO signal to the mixer. High-side injection is
used.
3.4.2UHF Range 1 (380–470 MHz) Band
The receiver circuits primary duties are to detect, filter, amplify, and demodulate RF signals in the
presence of strong interfering noise and unintended signals. The receiver (see Figure 3-14) is
broken down into the following blocks:
• Front-end, which includes:
- High pass fIlter and first low-noise amplifier (LNA)
- Preselector filter
- Switchable 15 dB attenuator
- Second LNA
- Image Filter
- First mixer
• Back-end, which includes:
- Intermediate Frequency (IF)
- ABACUS III IC
RF Input
Ant. SW.
Harm. FLT
Pre-Amp
Switch
380-470MHz
High Pass
Filter
Pre-Amp
LNA
Switch
Preselector
15 dB
Att.
A
Pre-Amp
Switch
Pre-Amp
LNA
Switch
Low Pass
2nd
LO
Filter
1st LO
Figure 3-14. Receiver Front-End and Back-End (UHF Range 1)
Mixer
Crystal
24dBm
LO
Synth.
ABACUS III IC
Backend A/D Converter
109.65MHz
IF AmpCrystal
Dec.
ADC
Filter
CLK
Synth.
10 dB
Att.
SSI
18MHz
CLK
A
6881096C74-BMay 25, 2005
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3-16Theory of Operation: Receiver Front-End
3.4.2.1 Highpass Filter and First Low-Noise Amplifier
The highpass filter and first low-noise amplifier (LNA) (11 dB gain) can be switched in and out of the
signal path by diode switches. When switched into the signal path, the sensitivity of the radio is
improved at the cost of degraded intermodulation performance. This can be necessary in fringe
areas when strong interference that can lead to intermodulation problems are not present and the
desired signal is weak.
The preamplifier version of the radio must be purchased to be able to control this option. If it has not
been purchased, the direct path created by the diode switches is the only one available, giving the
radio standard model performance with enhanced intermodulation rejection. Purchasing the
preamplifier option allows the user to select either mode with the CPS.
3.4.2.2 Preselector Filter
The front-end operates in the 380 to 470 MHz band. The front-end's primary function is to optimize
half IF rejection, image rejection, and selectivity while providing the first conversion. The front-end
uses a varactor-tuned filter that is tuned by the controller. The tuning signal is a DC control voltage
between 0 and 9V that come from the PA power control section. Low voltages are for lower
frequencies and higher voltages correspond to the higher frequencies. This filter is aligned in the
factory and can also be aligned using the Tuner software.
3.4.2.3 Switchable 15 dB Attenuator
This circuit block can provide 0 dB or 15 dB of attenuation in the signal path. Normally, it is set for
0 dB and does not affect the received signal. When strong signals are detected, the radio controller
can choose to activate this attenuator to provide protection to the back end circuits, and to enhance
high level intermodulation performance. Proprietary algorithms are used to control the switching.
3.4.2.4 Low-Noise Amplifier (LNA, U5302)
A diode (D5281) located after the varactor preselector and before the LNA protects the receiver from
strong RF signals by limiting the signal amplitude going into the amplifier. The LNA is a low-noise
monolithic IC providing ~ 15 dB of gain to the receiver. It is biased with 5 V and can be bypassed by
the radio software under very strong signal conditions.
The UHF receiver also has a second LNA based on Q5252 that can be activated or bypassed by the
radio software. This amplifier is protected by D5280 and provides 11 dB of gain. This is available
only if the preamplifier option has been purchased.
3.4.2.5 Image Filter
Following the LNA (U5302), the signal goes through a bandpass filter before it is sent to the mixer.
The passband is from 380 to 470 MHz with an insertion loss of about 2 dB, while the image rejection
is 55 dB. There is a trap on the input side of this filter to attenuate the 109.65 MHz IF.
3.4.2.6 Mixer
A passive double-balanced diode ring mixer is used to down-convert the received signal to an
Intermediate Frequency (IF) of 109.65 MHz. The mixer is designed to provide low conversion loss (<
7.0 dBm) and high intermodulation performance and requires a strong injection signal. The mixer is
driven by the receiver injection buffer, a two-stage LDMOS IC design, that amplifies the +3 dBm
high-side injection signal from the Frequency Generation Unit (FGU) to +24 dBm.
May 25, 20056881096C74-B
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Theory of Operation: Receiver Front-End3-17
3.4.3UHF Range 2 (450–520 MHz) Band
The receiver circuits primary duties are to detect, filter, amplify, and demodulate RF signals in the
presence of strong interfering noise and unintended signals. The receiver (see Figure 3-15) is
broken down into the following blocks:
• Front-end, which includes:
- High pass fIlter and first low-noise amplifier (LNA)
- Preselector filter
- Switchable 15 dB attenuator
- Second LNA
- Image Filter
- First mixer
• Back-end, which includes:
- Intermediate Frequency (IF)
- ABACUS III IC
RF Input
Ant. SW.
Harm. FLT
Pre-Amp
Switch
High Pass
Filter
LNA
Pre-Amp
Switch
450-520MHz
Preselector
15 dB
Att.
A
LNA
Figure 3-15. Receiver Front-End and Back-End (UHF Range 2)
3.4.3.1 Highpass Filter and First Low-Noise Amplifier
Low Pass
2nd
LO
Filter
Mixer
24dBm
1st LO
Backend A/D Converter
Crystal
LO
Synth.
ABACUS III IC
109.65MHz
IF AmpCrystal
Dec.
ADC
Filter
CLK
Synth.
10 dB
Att.
SSI
18MHz
CLK
A
The highpass filter and first low-noise amplifier (LNA) (11 dB gain) can be switched in and out of the
signal path by diode switches. When switched into the signal path, the sensitivity of the radio is
improved at the cost of degraded intermodulation performance. This can be necessary in fringe
areas when strong interference that can lead to intermodulation problems are not present and the
desired signal is weak.
The preamplifier version of the radio must be purchased to be able to control this option. If it has not
been purchased, the direct path created by the diode switches is the only one available, giving the
radio standard model performance with enhanced intermodulation rejection. Purchasing the
preamplifier option allows the user to select either mode with the CPS.
6881096C74-BMay 25, 2005
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3-18Theory of Operation: Receiver Front-End
3.4.3.2 Preselector Filter
The front-end operates in the 450 to 520 MHz band. The front-end's primary function is to optimize
half IF rejection, image rejection, and selectivity while providing the first conversion. The front-end
uses a varactor-tuned filter that is tuned by the controller. The tuning signal is a DC control voltage
between 0 and 9V that come from the PA power control section. Low voltages are for lower
frequencies and higher voltages correspond to the higher frequencies. This filter is aligned in the
factory and can also be aligned using the Tuner software.
3.4.3.3 Switchable 15 dB Attenuator
This circuit block can provide 0 dB or 15 dB of attenuation in the signal path. Normally, it is set for
0 dB and does not affect the received signal. When strong signals are detected, the radio controller
can choose to activate this attenuator to provide protection to the back end circuits, and to enhance
high level intermodulation performance. Proprietary algorithms are used to control the switching.
3.4.3.4 Low-Noise Amplifier (LNA, U5302)
A diode (D5281) located after the varactor preselector and before the LNA protects the receiver from
strong RF signals by limiting the signal amplitude going into the amplifier. The LNA is a low-noise
monolithic IC providing ~ 15 dB of gain to the receiver. It is biased with 5 V.
The UHF receiver also has a second LNA based on Q5252 that can be activated or bypassed by the
radio software. This amplifier is protected by D5280 and provides 11 dB of gain.
3.4.3.5 Image Filter
Following the LNA (U5302), the signal goes through a bandpass filter before it is sent to the mixer.
The passband is from 450 to 520 MHz with an insertion loss of about 2 dB, while the image rejection
is 55 dB. There is a trap on the input side of this filter to attenuate the 109.65 MHz IF.
3.4.3.6 Mixer
A passive double-balanced diode ring mixer is used to down-convert the received signal to an
Intermediate Frequency (IF) of 109.65 MHz. The mixer is designed to provide low conversion loss (<
7.0 dBm) and high intermodulation performance and requires a strong injection signal. The mixer is
driven by the receiver injection buffer, a two-stage LDMOS IC design, that amplifies the +3 dBm
high-side injection signal from the Frequency Generation Unit (FGU) to +24 dBm.
May 25, 20056881096C74-B
Page 85
Theory of Operation: Receiver Front-End3-19
3.4.4700–800 MHz Band
The receiver circuits primary duties are to detect, filter, amplify, and demodulate RF signals in the
presence of strong interfering noise and unintended signals. The receiver (see Figure 3-16) is
broken down into the following blocks:
• Front-end, which includes:
- Preselector filters
- Low-noise amplifier (LNA)
- First mixer
•IF
• Back-end
RF Input
Ant. SW.
Harm. FLT
Preselect 1
Figure 3-16. Receiver Front-End and Back-End (700–800 MHz)
3.4.4.1 Preselector Filters
The front-end operates in the 700 MHz and 800 MHz bands. The front-end's primary function is to
optimize image rejection and selectivity while providing the first conversion. The front- end uses fixed
ceramic-filter technology. There are two sets of filters: (B6250 and B6252) for the 800 MHz band and
(B6251 and B6253) for the 700 MHz band. These filters are switched between bands by a network of
diode switches (D6251 thru D6257) biased by RLC networks (C6254, C6260, R6254, and L6254)
that also act as RF chokes. The first filter is a dual-switched filter that reduces the image-frequency
response and limits some of the out-of-band interferers. The second filter following the monolithic
low-noise amplifier (LNA) provides additional image rejection.
700MHz
LNA
A
800MHz
Preselect 2
1st LO
2nd
LO
Mixer
15dBm
73.35MHz
Crystal
Backend A/D Converter
LO
Synth.
ABACUS III IC
IF AmpCrystal
ADC
CLK
Synth.
Dec.
Filter
18MHz
MAEPF-27905-O
SSI
CLK
3.4.4.2 Low-Noise Amplifier (LNA, U6250)
A diode (D6258) located after the first preselector and before the LNA protects the receiver from
strong RF signals by limiting the signal amplitude going into the amplifier. The LNA is a low-noise
monolithic IC providing ~ 16 dB of gain to the receiver. It is biased with 5 V at pins 1 and 6. The input
matching consists of an LC network (C6288, L6258) for optimal gain.
6881096C74-BMay 25, 2005
Page 86
3-20Theory of Operation: Receiver Back-End
3.4.4.3 Mixer (U6251)
The monolithic, passive mixer IC down-converts the received signal to an Intermediate Frequency
(IF) of 73.35 MHz. The mixer is designed to provide low conversion loss (< 7.0) and high
intermodulation performance. To improve the performance of the mixer in both bands, a shunt 9.1 pF
capacitor (C6297) along with a resistive PI network (R6278, R6280, R6281) is designed at the IF
port (pin 5) of the mixer. The mixer is driven by the receiver injection buffer, a two-stage discrete/IC
design used with the VCO to efficiently drive the mixer over temperature with minimum power
variation. The injection buffer provides 15 dBm to the mixer. The VCO does high-side injection for
the 800 MHz band and low-side Injection for the 700 MHz band.
3.5Receiver Back-End
This section discusses the receiver back-end (RXBE) components and detailed theory of operation.
The receiver back-end processes the down-converted, filtered IF signal to produce digital data for
final processing by the Patriot microcontroller IC.
3.5.1VHF (136-174 MHz) Band
The receiver back-end contains the following major components:
• Intermediate frequency (IF) section.
• ABACUS III IC
3.5.1.1 Intermediate Frequency (IF) Section
The XTL 5000 radio uses two leadless, surface-mount, two-pole, third-overtone, quartz crystal filters
(Y3400, Y3401) separated by a 21 dB gain IF amplifier. The filters are centered at 109.65 MHz. This
narrowband bandpass filter contributes to the radio’s adjacent-channel and alternate-channel
rejection performance. Components L3401, L3403, L3404, L3405, C3421, C3414, C3409, C3416,
C3420, C3418 and C3415 are used as impedance-matching networks. Components Q3400, R3409,
R3401, R3402, R3405, R3407, and R3413 are used for biasing and stabilizing the transistor Q3400.
Components C3424, C3404 bypass the DC supply. L3400 is RF choke. Diode D3400 and Inductor
L3408 protect the Abacus and the second IF filter from strong In-band signals.
3.5.1.2 ABACUS III IC
The receiver back-end is designed around the ABACUS III (AD9874 IF digitizing subsystem) IC and
its associated circuitry. The AD9874 (Figure 3-17 on page 3-21) is a general-purpose, IF subsystem
that digitizes a low-level, 10–300 MHz IF input with a bandwidth up to 270 kHz. The signal chain of
the AD9874 consists of a variable gain, low-noise amplifier, a mixer; a bandpass, sigma-delta, A/D
converter; and a decimation filter with programmable decimation factor. An automatic gain control
(AGC) circuit provides the AD9874 with 12 dB of continuous gain adjustment. The high dynamic
range and inherent anti-aliasing provided by the bandpass, sigma-delta converter allow the AD9874
to cope with blocking signals 80 dB stronger than the desired signal. Auxiliary blocks include clock
and LO synthesizers, as well as an SPI port. Input signal RXIF is the 109.65 MHz IF from the IF
section in the receiver front-end.
Components C3000, C3038, and L3002 match the input impedance from 50 ohms (IF Filter
terminating impedance) to the ABACUS III IC input IFIN. Formatted SSI data is output to the Patriot
microcontroller IC for DSP processing on ports FS, DOUTA, and CLKOUT. Control logic is sent to
the ABACUS III IC from the Patriot microcontroller via the SPI lines (PC, PD, PE).
May 25, 20056881096C74-B
Page 87
Theory of Operation: Receiver Back-End3-21
IFIN
FREF
AD9874
-16dB
LNA
LO
Synth.
IOUTL
LO VCOand
Loop Filter
MXOP
LOP
MXON
LON
IF2P
IF2N
GCP
ADC
Sample Clock
Synthesizer
IOUTC
CLK VCO and
CLKP
Loop Filter
GCN
f
CLKN
DAC AGC
= 13-26MHz
CLK
Decimation
Filter
Voltage
Reference
VCM
VREFP
VREFN
Formatting/SSI
Control Logic
SPI
PC
PD
DOUTA
DOUTB
FS
CLKOUT
PE
SYNCB
MAEPF-27817-O
Figure 3-17. ABACUS III (AD9874) IC Functional Block Diagram from Data Sheet (VHF)
3.5.1.2.1 Second Local Oscillator
The ABACUS III IC local oscillator (LO) synthesizer controls the second LO. Signal FREF is the
16.8 MHz reference from the frequency generation unit (FGU). The second LO frequency is
107.4 MHz by default, or 111.9 MHz in special cases as necessary to avoid radio self-quieters. The
second LO signal mixes with IFIN to produce a 109.65 MHz final IF. The external VCO consists of
transistor Q3000, together with its bias and instability network and tank elements. Darlington
transistor Q3001 along with C3035 and C3017 form an active DC filter. The second-order loop filter
is comprised of C3044, C3005, and R3009.
3.5.1.2.2 Sampling Clock Oscillator
The ABACUS III IC sampling clock synthesizer, at Fclk=18 MHz (IF2=Fclk/8, where Fclk is the clock
rate), utilizes a negative-resistance core that is internal to the ABACUS III IC which, when used in
conjunction with an external LC tank (made up of L3003 and C3039) and a varactor (D3001), serves
as the VCO.
3.5.2UHF Range 1 (380-470 MHz) Band
The receiver back-end (see Figure 3-14 on page 3-15) contains the following major components:
• Intermediate frequency (IF) filter
• ABACUS III IC
6881096C74-BMay 25, 2005
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3-22Theory of Operation: Receiver Back-End
3.5.2.1 Intermediate Frequency (IF) Filter
The XTL 5000 radio uses two leadless, surface-mount, two-pole, third-overtone, quartz crystal filters
(Y5400, Y5401) separated by a 20 dB gain IF amplifier. The filter is centered at 109.65 MHz. This
narrow-bandpass filter gives the radio part of its adjacent-channel and alternate-channel rejection
performance. Impedance-matching networks are located at the input and output of each crystal. The
IF amplifier is made with Q5401. The 10 dB attenuator (U5400) located after the second crystal filter
is controlled by the software to limit the signal gain in front of the ABACUS III IC.
3.5.2.2 ABACUS III IC (U5002)
The receiver back-end is designed around the ABACUS III (AD9874 IF digitizing subsystem) IC and
its associated circuitry. The AD9874 (Figure 3-18) is a general-purpose, IF subsystem that digitizes a
low-level, 10-300 MHz IF input with a bandwidth up to 270 kHz. The signal chain of the AD9874
consists of a variable gain, low-noise amplifier, a mixer; a bandpass, sigma-delta, A/D converter; and
a decimation filter with programmable decimation factor. An automatic gain control (AGC) circuit
provides the AD9874 with 12 dB of continuous gain adjustment. The high dynamic range and
inherent anti-aliasing provided by the bandpass, sigma-delta converter allow the AD9874 to cope
with blocking signals 80 dB stronger than the desired signal. Auxiliary blocks include clock and LO
synthesizers, as well as an SPI port. Input signal RXIF is the 109.65 MHz IF from the IF filter.
Components C5002, C5007, and L5002 match the input impedance from 50 ohms (IF Filter
terminating impedance) to the ABACUS III IC input IFIN. Formatted SSI (synchronous serial
interface) data is output to the Patriot microcontroller IC for DSP processing on ports FS, DOUTA,
and CLKOUT. Control logic is sent to the ABACUS III IC from the Patriot microcontroller via the SPI
lines (PC, PD, PE).
IFIN
FREF
AD9874
-16dB
LNA
LO
Synth.
IOUTL
LO VCOand
Loop Filter
MXOP
LOP
MXON
LON
IF2P
IF2N
Sample Clock
Synthesizer
IOUTC
CLK VCO and
Loop Filter
GCP
ADC
CLKP
GCN
f
CLKN
DAC AGC
= 13-26MHz
CLK
Decimation
Filter
Voltage
Reference
VCM
VREFP
VREFN
Formatting/SSI
Control Logic
SPI
PD
PE
PC
DOUTA
DOUTB
FS
CLKOUT
SYNCB
Figure 3-18. ABACUS III (AD9874) IC Functional Block Diagram from Data Sheet (UHF Range 1)
May 25, 20056881096C74-B
Page 89
Theory of Operation: Receiver Back-End3-23
3.5.2.2.1 Second Local Oscillator (LO)
The ABACUS III IC local oscillator (LO) synthesizer controls the second LO. Signal FREF is the
16.8 MHz reference from the frequency generation unit (FGU). The second LO frequency is
107.4 MHz by default, or 111.9 MHz in special cases as necessary to avoid radio self-quieters. The
second LO signal mixes with IFIN to produce a 2.25 MHz final IF. The external VCO consists of
transistor Q5002, together with its bias and instability network and tank elements. Darlington
transistor Q5001 along with C5018 and C5050 form an active DC filter. The 2nd order loop filter is
comprised of C5044, C5045, and R5013.
3.5.2.2.2 Sampling Clock Oscillator
The ABACUS III IC sampling clock synthesizer, at Fclk=18 MHz (IF2=Fclk/8, where Fclk is the clock
rate), utilizes the clock VCO built around Q5003.
3.5.3UHF Range 2 (450-520 MHz) Band
The receiver back-end (see Figure 3-15 on page 3-17) contains the following major components:
• Intermediate frequency (IF) filter
• ABACUS III IC
3.5.3.1 Intermediate Frequency (IF) Filter
The XTL 5000 radio uses two leadless, surface-mount, two-pole, third-overtone, quartz crystal filters
(Y5400, Y5401) separated by a 20 dB gain IF amplifier. The filter is centered at 109.65 MHz. This
narrow-bandpass filter gives the radio part of its adjacent-channel and alternate-channel rejection
performance. Impedance-matching networks are located at the input and output of each crystal. The
IF amplifier is made with Q5401. The 10 dB attenuator (U5400) located after the second crystal filter
is controlled by the software to limit the signal gain in front of the ABACUS III IC.
3.5.3.2 ABACUS III IC (U5002)
The receiver back-end is designed around the ABACUS III (AD9874 IF digitizing subsystem) IC and
its associated circuitry. The AD9874 (Figure 3-19 on page 3-24) is a general-purpose, IF subsystem
that digitizes a low-level, 10-300 MHz IF input with a bandwidth up to 270 kHz. The signal chain of
the AD9874 consists of a variable gain, low-noise amplifier, a mixer; a bandpass, sigma-delta, A/D
converter; and a decimation filter with programmable decimation factor. An automatic gain control
(AGC) circuit provides the AD9874 with 12 dB of continuous gain adjustment. The high dynamic
range and inherent anti-aliasing provided by the bandpass, sigma-delta converter allow the AD9874
to cope with blocking signals 80 dB stronger than the desired signal. Auxiliary blocks include clock
and LO synthesizers, as well as an SPI port. Input signal RXIF is the 109.65 MHz IF from the IF filter.
Components C5002, C5007, and L5002 match the input impedance from 50 ohms (IF Filter
terminating impedance) to the ABACUS III IC input IFIN. Formatted SSI (synchronous serial
interface) data is output to the Patriot microcontroller IC for DSP processing on ports FS, DOUTA,
and CLKOUT. Control logic is sent to the ABACUS III IC from the Patriot microcontroller via the SPI
lines (PC, PD, PE).
6881096C74-BMay 25, 2005
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3-24Theory of Operation: Receiver Back-End
IFIN
FREF
AD9874
-16dB
LNA
LO
Synth.
IOUTL
LO VCOand
Loop Filter
MXOP
LOP
MXON
LON
IF2P
IF2N
Sample Clock
Synthesizer
IOUTC
CLK VCO and
Loop Filter
GCP
ADC
CLKP
GCN
f
CLKN
DAC AGC
= 13-26MHz
CLK
Decimation
Filter
Voltage
Reference
VCM
VREFP
VREFN
Formatting/SSI
Control Logic
SPI
PD
PE
PC
DOUTA
DOUTB
FS
CLKOUT
SYNCB
Figure 3-19. ABACUS III (AD9874) IC Functional Block Diagram from Data Sheet (UHF Range 2)
3.5.3.2.1 Second Local Oscillator (LO)
The ABACUS III IC local oscillator (LO) synthesizer controls the second LO. Signal FREF is the
16.8 MHz reference from the frequency generation unit (FGU). The second LO frequency is
107.4 MHz by default, or 111.9 MHz in special cases as necessary to avoid radio self-quieters. The
second LO signal mixes with IFIN to produce a 2.25 MHz final IF. The external VCO consists of
transistor Q5002, together with its bias and instability network and tank elements. Darlington
transistor Q5001 along with C5018 and C5050 form an active DC filter. The 2nd order loop filter is
comprised of C5044, C5045, and R5013.
3.5.3.2.2 Sampling Clock Oscillator
The ABACUS III IC sampling clock synthesizer, at Fclk=18 MHz (IF2=Fclk/8, where Fclk is the clock
rate), utilizes the clock VCO built around Q5003.
3.5.4700–800 MHz Band
The receiver back-end (see Figure 3-16 on page 3-19) contains the following major components:
• Intermediate frequency (IF) filter
• ABACUS III IC
May 25, 20056881096C74-B
Page 91
Theory of Operation: Receiver Back-End3-25
3.5.4.1 Intermediate Frequency (IF) Filter
The XTL 5000 radio uses two leadless, surface-mount, two-pole, third-overtone, quartz crystal filters
(B6350, B6351) separated by a 20 dB gain IF amplifier. The filter is centered at 73.35 MHz. This
narrow-bandpass filter gives the radio its adjacent-channel and alternate-channel rejection
performance. Components L6350, L6351, L6352, L6353, C6351, C6352, C6353, C6355, C6356,
and C6357 are used as impedance-matching networks. Components L6355, R6354, R6352, R6353,
C6354, and R6350 are used for biasing and stabilizing the transistor Q6350. Component C6358
bypasses the DC supply. L6355 is an RF choke.
3.5.4.2 ABACUS III IC (U6000)
The receiver back-end is designed around the ABACUS III (AD9874 IF digitizing subsystem) IC and
its associated circuitry. The AD9874 (Figure 3-20) is a general-purpose, IF subsystem that digitizes a
low-level, 10–300 MHz IF input with a bandwidth up to 270 kHz. The signal chain of the AD9874
consists of a variable gain, low-noise amplifier, a mixer; a bandpass, sigma-delta, A/D converter; and
a decimation filter with programmable decimation factor. An automatic gain control (AGC) circuit
provides the AD9874 with 12 dB of continuous gain adjustment. The high dynamic range and
inherent anti-aliasing provided by the bandpass, sigma-delta converter allow the AD9874 to cope
with blocking signals 80 dB stronger than the desired signal. Auxiliary blocks include clock and LO
synthesizers, as well as an SPI port. Input signal RXIF is the 73.35 MHz IF from the IF filter in the
receiver front-end.
Components C6000, C6001, and L6000 match the input impedance from 50 ohms (IF Filter
terminating impedance) to the ABACUS III IC input IFIN. Formatted SSI (synchronous serial
interface) data is output to the Patriot microcontroller IC for DSP processing on ports FS, DOUTA,
and CLKOUT. Control logic is sent to the ABACUS III IC from the Patriot microcontroller via the SPI
lines (PC, PD, PE).
IFIN
FREF
AD9874
-16dB
LNA
LO
Synth.
IOUTL
LO VCOand
Loop Filter
MXOP
LOP
MXON
LON
IF2P
IF2N
Sample Clock
Synthesizer
IOUTC
CLK VCO and
Loop Filter
GCP
ADC
CLKP
GCN
f
CLKN
DAC AGC
= 13-26MHz
CLK
Decimation
Filter
Voltage
Reference
VCM
VREFP
VREFN
Formatting/SSI
Control Logic
SPI
PC
PD
DOUTA
DOUTB
FS
CLKOUT
PE
SYNCB
MAEPF-27817-O
Figure 3-20. ABACUS III (AD9874) IC Functional Block Diagram from Data Sheet (700–800 MHz)
6881096C74-BMay 25, 2005
Page 92
3-26Theory of Operation: Transmitter
3.5.4.2.1 Second Local Oscillator (LO)
The ABACUS III IC local oscillator (LO) synthesizer controls the second LO. Signal FREF is the
16.8 MHz reference from the frequency generation unit (FGU). The second LO frequency is
75.6 MHz by default, or 71.1 MHz in special cases as necessary to avoid radio self-quieters. The
second LO signal mixes with IFIN to produce a 2.25 MHz final IF. The external VCO consists of
transistor Q6000, together with its bias and instability network and tank elements. Darlington
transistor Q6001 along with C6024 and C6025 form an active DC filter. The 2nd order loop filter is
comprised of C6056, C6057, and R6019.
3.5.4.2.2 Sampling Clock Oscillator
The ABACUS III IC sampling clock synthesizer, at Fclk=18 MHz (IF2=Fclk/8, where Fclk is the clock
rate), utilizes a negative-resistance core that is internal to the ABACUS III IC which, when used in
conjunction with an external LC tank (made up of L6003 and C6031) and a varactor (D6030), serves
as the VCO.
3.6Transmitter
This section of the theory of operation provides a detailed circuit description of the transmitter, which
includes the RF power amplifier (RFPA), output network (ON), and power control.
When reading the theory of operation, refer to the appropriate schematic and component location
diagrams located in “Chapter 7. Schematics, Component Location Diagrams, and Parts Lists”. This
detailed theory of operation will help isolate the problem to a particular component. However, first
use the ASTRO Digital XTL 5000 VHF/UHF Range 1/UHF Range 2/700–800 MHz Mobile Radio Basic Service Manual to troubleshoot the problem to a particular section.
3.6.1VHF (136-174 MHz) Band
3.6.1.1 50-Watt Transmitter
The following text discusses the 50-W transmitter.
3.6.1.1.1 RF Power Amplifier (RFPA)
The RFPA consists of three gain stages, which are shown in Figure 3-21.
%&'(
Figure 3-21. 50-Watt RF Power Amplifier (RFPA) Gain Stages (VHF)
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0(
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()
*
#.
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May 25, 20056881096C74-B
Page 93
Theory of Operation: Transmitter3-27
First Stage
The RFPA first stage provides gain that is determined by the control voltage, RFPA_CNTRL. This
control voltage is generated in the power control section and is a function of the final-stage output
power, temperature, and current, as well as the control and A+ voltage levels. See “3.6.1.4. Power
Control (for 50W and 100W Transmitter)” on page 3-30 for a detailed explanation of the power
control section.
The 2 mW TX_INJ signal is routed to the U3550 first-stage device (Pin 16, RFIN) via C3500 to an
integrated, wide-band input match. U3550 is a two-stage LDMOS device with a bandpass interstage
match consisting of C3503, L3502, C3504, R3501 and C3505 routed between VD1 (pin 14) and G2
(pin 11). L3501 and L3503 provide the K9.1V drain bias voltage for the first and second stages to
VD1 (pin 14) and RFOUT1/2 (pins 6 and 7), respectively. The RFPA_CNTRL gate bias is provided to
both stages internally via VCNTRL (pin 1). Both U3550 stages are operated Class A.
Driver Stage
C3521, L3520, C3520, and a transmission line form a low-pass, interstage match that transfers
power to the Q3530 LDMOS transistor. R3520-3 provide device stability, and R3524 and C3522
supply the VGBIAS2 gate bias. L3530-1, R3530-1, C3530, C3531, C3536 and C3537 form the A+
drain bias circuit. Q3530 is operated Class AB.
Final Stage
C3532-4, and transmission lines form a bandpass. R3532-8 provide stability for Q3550. R3540 and
C3535 supply the VGBIAS1 gate bias to Q3550. L3549-51, C3548-51, and R3551 form the A+ drain
bias circuit.
C3552-9 and transmission lines form a low-pass. Q3550 operate Class AB.
R3550, R3560, C3563, and U3561 comprise the final-stage, current-sense circuit that generates the
VCURRENT voltage proportional to the final stage current. R3560 sets the circuit gain. U3560
generates the VTEMP voltage, which is proportional to the final-stage temperature.
6881096C74-BMay 25, 2005
Page 94
3-28Theory of Operation: Transmitter
3.6.1.2 100-Watt Transmitter
The following text discusses the 100-W transmitter.
3.6.1.2.1 RF Power Amplifier (RFPA)
The RFPA consists of three gain stages, which are shown in Figure 3-22.
A+
Vg_bias
5W
Q3540
50W
Key9.1V
Tx_inj
2mW
U3500
30C65
RFPA_cntrl
100mW
Q3520
A+
10W
Vg_bias
5W
Q3541
A+
RFPA_out
100W
50W
Vg_bias
Figure 3-22. 100-Watt RF Power Amplifier (RFPA) Gain Stages (VHF)
First Stage
The RFPA first stage provides gain that is determined by the control voltage, RFPA_CNTRL. This
control voltage is generated in the power control section and is a function of the final-stage output
power, temperature, and current, as well as the control and A+ voltage levels. See “3.6.1.4. Power
Control (for 50W and 100W Transmitter)” on page 3-30 for a detailed explanation of the power
control section.
The 2 mW TX_INJ signal is routed to the U3500 first-stage device (Pin 16, RFIN) via C3500 to an
integrated, wide-band input match. U3550 is a two-stage LDMOS device with a bandpass interstage
match consisting of C3502 and L3501 routed between VD1 (pin 14) and G2 (pin 11). L3501 and
L3500 provide the K9.1V drain bias voltage for the first and second stages to VD1 (pin 14) and
RFOUT1/2 (pins 6 and 7), respectively. The RFPA_CNTRL gate bias is provided to both stages
internally via VCNTRL (pin 1). Both U3500 stages are operated Class A.
Driver Stage
C3521, L3520, C3520, and a transmission line form a low-pass, interstage match that transfers
power to the Q3520 LDMOS transistor. R3520-5 provide device stability, and R3526 and C3522
supply the VGBIAS2 gate bias. L3521, R3528, C3525, C3524, C3536, L3522 and R3527 form the
A+ drain bias circuit. Q3520 is operated Class AB.
May 25, 20056881096C74-B
Page 95
Theory of Operation: Transmitter3-29
Dual Final Stage
C3540-1, C3543-4 and transmission lines form a bandpass. R3541-8 provide stability for Q3540.
R3550-7 provide stability for Q3541. R3540 and R3568 supply the VGBIAS1 gate bias to Q3540.
R3569 and R3558 supply the VGBIAS2 gate bias to Q3541. L3540-4 and C3560-1 form the A+ drain
bias circuit. C3548-55 and transmission lines form a low-pass. Q3540-1 operate Class AB.
R3560-1, C3561, and U3561 comprise the final-stage, current-sense circuit that generates the
VCURRENT voltage proportional to the final stage current. R3564 sets the circuit gain. U3560
generates the VTEMP voltage, which is proportional to the final-stage temperature.
3.6.1.3 Output Network (ON) - (for 50W and 100W Transmitter)
The ON consists of the antenna switch, harmonic filter, and power detector (see Figure 3-23).
"#$%%%#
!
Figure 3-23. Output Network Components (VHF)
Antenna Switch
The antenna switch functions in two modes, which are determined by the presence of K9.1V. The
K9.1V switch bias is applied via L3700, L3731-2, and C3702. When K9.1V is present, the switch is in
TX mode. D3701-2 and D3704 are forward biased forming a low-loss path from the RFPA final stage
to the harmonic filter and a 60 dB isolation path between the RFPA final stage and the RX front-end.
Isolation is achieved via a quarter-wave transmission line between D3701 and D3702. D3701-4
serves as an ESD protection circuit against ESD discharge on the antenna connector.
When K9.1V is absent, the switch is in RX mode. D3701 and D3702 are reverse biased forming a
low-loss path from the harmonic filter to the RX front-end and a 60 dB isolation path from the
harmonic filter to the RFPA final stage. Isolation is achieved via the D3701 off resistance.
Harmonic Filter
L3720-7, C3720-3, form the twelve-element, low-pass harmonic filter. The filter attenuates
harmonics generated by the RFPA when the antenna switch is in TX mode and provides extra
selectivity when the antenna switch is in RX mode.
Power Detector
The power detector consists of two asymmetric, coupled transmission lines and detection circuitry
that detects forward and reverse power. C3730-1, D3730, L3730, R3730-3, and R3735-6 form the
forward-power detector (VFORWARD), which is used for power leveling. C3732-3, D3731, L3731,
R3737-9, and R3733-4 form the reverse-power detector (VREVERSE). L3737 provides an
electrostatic discharge path to protect the RFPA final stage device.
6881096C74-BMay 25, 2005
Page 96
3-30Theory of Operation: Transmitter
3.6.1.4 Power Control (for 50W and 100W Transmitter)
The power control section is comprised of a control loop to level forward power and protection
mechanisms to reduce power to a safe level for the given environmental conditions
(see Figure 3-24).
VFORWARD
(FROM ON)
TEMP_1
(U0959, PIN 9)
(FROM RFPA)
(U0959, PIN 10)
VTEMP
TEMP_2
EEPOT
U0952
9.3V
-
U0956-2
+
-
U0957-1
+
PWR_SET
(U0959, PIN 2)
9.3V
-
U0957-2
+
9.3V
D0950
D0951
D0952
1.5V
+
-
9.3V
-
U0956-3
+
9.3V
U0957-4
9.3V
U0957-4
-
+
PA_EN
-
+
Q0954
CURR_LIM_SET
(U0959, PIN1)
VCURRENT
(FROM RFPA)
9.3V
RFPA_CNTRL
(TO RFPA)
Q0955
MAEPF-27889-O
Figure 3-24. Power Control Components (VHF)
Power Control Loop
VFORWARD from the ON is buffered via the non-inverting, variable-gain stage U0956-2 whose gain
is set by EPOT U0952. The proper gain is determined during power-detection calibration tuning.
Buffered VFORWARD (U0956-2, Pin 7) is added to PWR_SET via R0971, R0972, and R0947 and
then compared to a reference determined by R0974 and R0975. PWR_SET is supplied by the
digital-to-analog converter (DAC) U0959, Pin 2. Comparator stage U0956-3 increases or decreases
RFPA_CNTRL so that the voltage at U0956-3, Pin 9 in the same at the reference voltage at U09563, Pin 10. When the PWR_SET voltage is decreased, U0956-3 increases RFPA_CNTRL to increase
VFORWARD which is proportional to forward power thus increasing the power level. When the
PWR_SET voltage is increased, U0956-3 decreases RFPA_CNTRL to decrease VFORWARD, thus
decreasing the power level. The microprocessor initiates the loop through U0958-1 and Q0954.
Loop timing is set via software together with R0977, and C0973.
May 25, 20056881096C74-B
Page 97
Theory of Operation: Transmitter3-31
Protection Mechanisms
Final-stage temperature is sensed in the RFPA resulting in VTEMP, which is proportional to
temperature. VTEMP is compared against a reference voltage TEMP_1 (U0959, pin 9) via U0957-1.
When VTEMP exceeds TEMP_1, the U0957-1, pin 1, voltage increases and forward biases one of
the D0951 diodes, which cuts back power. Power continues to cut back with rising temperature until
the voltage level at the junction of R0978 and R0983 is high enough to forward bias D0952, thus
clamping the cut back so that the radio meets its duty cycle specification while providing protection
against high-temperature conditions. The clamping level is set via TEMP_2 (U0959, pin 10) and
U0957-2. U0957-3 is used to sense if a high A+ battery voltage condition exists and, if it does, the
Q0955 gate is biased on, which increases the clamp voltage allowing for additional power cutback
for a high A+, high temperature condition.
Final-stage current is also monitored via VCURRENT, which is proportional to current. VCURRENT
is compared against a reference CURR_LIM_SET (U0959, pin 1) which is tuned after power
characterization. If VCURRENT exceeds CURR_LIM_SET, then U0957-4, pin 14, voltage rises and
forward biases one of the D0951 diodes, which limits power.
Finally, control voltage is limited by U0956-4 and D0950. RFPA_CNTRL can rise to the control
voltage limit set by R0942-4.
3.6.2UHF Range 1 (380-470 MHz) Band
3.6.2.1 40-Watt Transmitter
The following text discusses the 40-W transmitter.
3.6.2.1.1 RF Power Amplifier (RFPA)
The RFPA consists of three gain stages, which are shown in Figure 3-25.
TRANSMIT
BUFFER
TX_INJ
From
FGU
2mW
Q5501
C65
0.5mW
K9.1V
Figure 3-25. 40-Watt RF Power Amplifier (RFPA) Gain Stages (UHF Range 1)
FIRST
STAGE
U5501
C65
RFPA_CNTRL
K9.1V
250mW
DRIVER
STAGE
Q5502
1518
VGBIAS3
3.5W
DRV_9.3V
VGBIAS2
VGBIAS1
STAGE
Q5503
1570
FINAL
A+
51W
RFPA_OUT
To Antenna
Switch
6881096C74-BMay 25, 2005
Page 98
3-32Theory of Operation: Transmitter
First Stage
The RFPA first stage provides gain that is determined by the control voltage, RFPA_CNTRL. This
control voltage is generated in the power control section and is a function of the final-stage output
power, temperature, and current, as well as the control and A+ voltage levels. See “3.6.2.4. Power
Control (for 40W and 100W Transmitter)” on page 3-35 for a detailed explanation of the power
control section.
The 0.5 mW TX_INJ signal is routed to the U5501 first stage device (Pin 16, RFIN) via C5508 to an
integrated, wide-band input match. U5501 is a two-stage LDMOS device with a bandpass interstage
match consisting of L5503, C5507, and C5509 routed between VD1 (pin 14) and G2 (pin 11). L5502
and L5505 provide the K9.1V drain bias voltage for the first and second stages to VD1 (pin 14) and
RFOUT1/2 (pins 6 and 7), respectively. The RFPA_CNTRL gate bias is provided to both stages
internally via VCNTRL (pin 1). Both U5501 stages are operated Class A and the second-stage output
power is approximately 250 mW.
Driver Stage
C5566, C5516, C5518 and a transmission line form a low-pass, interstage match that transfers
power to the Q5502 LDMOS transistor. R5511-R5515 provide device stability, and R5527, C5556,
C5525 and R5516 supply the VGBIAS3 gate bias. L5508, C5527, R5517, E5501 and C5526 form
the 9.3 V drain bias circuit. The 9.3 V drain voltage is supplied from regulator U5570 via R5574. The
9.3 V supply to the driver is only present during transmit and is disabled during receive via the K9.1V
signal and Q5570. Q5502 is operated Class AB and its output power is approximately 3.5 W.
Final Stage
C5559, C5560, C5535, C5538, and transmission lines form a low pass, splitter match that transfers
power to the LDMOS final-stage transistor Q5503. Q5503 contains two transistors in a single
package, each with it's own gate and drain lead. R5530, R5533, R5534 and R5536 provide stability
for Q5503. R5525, C5557, C5539 and R5520 supply the VGBIAS1 gate bias to Q5503-7. R5526,
C5558, C5540 and R5521 supply the VGBIAS2 gate bias to Q5503-6. L5510, C5549, R5523, E5502
and C5550 form the A+ drain bias circuit to Q5503-2 and Q5503-3. C5542-43, C5545-46, C5547-48,
C5551-53 and transmission lines form a low -pass combiner match that transfers approximately 51
W to the antenna switch. R5535 provides stability for Q5503. Q5503 operates Class AB.
R5522 and U5503 comprise the final-stage, current-sense circuit that generates the VCURRENT
voltage proportional to the final stage current. R5519 sets the circuit gain. U5502 generates the
VTEMP voltage, which is proportional to the final-stage temperature.
May 25, 20056881096C74-B
Page 99
Theory of Operation: Transmitter3-33
3.6.2.2 100-Watt Transmitter
The following text discusses the 100-W transmitter.
3.6.2.2.1 RF Power Amplifier (RFPA)
The RFPA consists of three gain stages, which are shown in Figure 3-26.
A+
Vg_bias
4W
Q5540
50W
Key9.1V
Tx_inj
2.5mW
U5500
30C65
RFPA_cntrl
300mW
Q5520
A+
8W
Vg_bias
4W
RFPA_out
100W
Q5541
50W
Vg_bias
A+
Figure 3-26. 100-Watt RF Power Amplifier (RFPA) Gain Stages (UHF Range 1)
First Stage
The RFPA first stage provides gain that is determined by the control voltage, RFPA_CNTRL. This
control voltage is generated in the power control section and is a function of the final-stage output
power, temperature, and current, as well as the control and A+ voltage levels. See “3.6.2.4. Power
Control (for 40W and 100W Transmitter)” on page 3-35 for a detailed explanation of the power
control section.
The 2.5 mW TX_INJ signal is routed to the U5500 first stage device (Pin 16, RFIN) via C5524 to an
integrated, wide-band input match. U5500 is a two-stage LDMOS device with a bandpass interstage
match consisting of L5511, L5510, C5511 routed between VD1 (pin 14) and G2 (pin 11). L5510 and
R5510 provide the K9.1V drain bias voltage for the first and second stages to VD1 (pin 14) and
RFOUT1/2 (pins 6 and 7), respectively. The RFPA_CNTRL gate bias is provided to both stages
internally via VCNTRL (pin 1). Both U5501 stages are operated Class A and the second-stage output
power is approximately 300 mW.
Driver Stage
C5525, L5514, C5516, C5518, C5519, C5523 and a transmission line form a low-pass, interstage
match that transfers power to the Q5502 LDMOS transistor. R5520-R5525 provide device stability,
and R5526, C5520 and C5529 supply the VGBIAS3 gate bias. L5520, C5521, R5527, L5521, R5528
and C5522 form the A+ drain bias circuit. Q5520 is operated Class AB and its output power is
approximately 8 W.
6881096C74-BMay 25, 2005
Page 100
3-34Theory of Operation: Transmitter
Dual Final Stage
C5530, C5531, C5532, C5533, C5536, C5537-41 and transmission lines form a low pass, splitter
match that transfers power to the LDMOS dual final-stage transistors Q5541 and Q5540. Q5540 and
Q5541 contain two transistors in a single package, each with it's own gate and drain lead. R5542-5,
R5548-51 provide stability for Q5540. R5552-5, R5557-60 provide stability for Q5541. R5546, C5602
and C5542 supply the VGBIAS1 gate bias to Q5540. R5581, C5550 and C5603 supply the VGBIAS2
gate bias to Q5541. L5543, L5544, R5574, C5567 and C5568 form the A+ drain bias circuit to Q5540
and Q5541. C5551-56, C5559-66, C5584, C5587, C5589 and transmission lines form a low -pass
combiner match that transfers approximately 100 W to the antenna switch. R5562 provides stability
for Q5540. R5573 provides stability for Q5541. Both Q5540 and Q5541 operate Class AB.
R5575 and U5561 comprise the final-stage, current-sense circuit that generates the VCURRENT
voltage proportional to the final stage current. R5578 sets the circuit gain. U5560 generates the
VTEMP voltage, which is proportional to the final-stage temperature.
3.6.2.3 Output Network (ON) - (for 40W and 100W Transmitter)
The ON consists of the antenna switch, harmonic filter, and power detector (see Figure 3-27).
POWER
DETECTOR
VREVERSE
RF
CONNECTOR
44W
J5701
RFPA_OUT
From
RFPA
51W
ANTENNA
SWITCH
RX_IN
K9.1V
H-FILTER
VFORWARD
Figure 3-27. Output Network Components (UHF Range 1)
Antenna Switch
The antenna switch functions in two modes determined by the presence of K9.1V. The K9.1V switch
bias is applied via L5701and C5702. When K9.1V is present, the switch is in TX mode. D5701,
D5702 and D5703 are forward biased forming a low-loss path from the RFPA final stage to the
harmonic filter and a 20 dB isolation path between the RFPA final stage and the RX front-end.
Isolation is achieved via a quarter-wave transmission lines between D5701 - D5702 and between
D5702 - D5703. C5709-10 resonates out the D5702-3 on inductance improving the isolation. When
K9.1V is absent, the switch is in RX mode. D5701, D5702 and D5703 are reverse biased forming a
low-loss path from the harmonic filter to the RX front-end and a 20 dB isolation path from the
harmonic filter to the RFPA final stage. Isolation is achieved via the D5701 off resistance. L5702
resonates out the D5701 off capacitance improving the isolation.
Harmonic Filter
The harmonic filter is a 7-element, equal-L Zolotarev quasi-lowpass filter consisting of C5712 and
C5713, C5719 thru C5721 and L5706 thru L5708. L5712, C5711 and L5713, C5714 form two shunt
zeros for extra attenuation at the second harmonic. C5708 acts as a DC block between the filter and
the antenna switch. The filter provides approximately 60 dB of harmonic rejection. The harmonic
filter together with the antenna switch provides approximately 0.7 dB insertion loss between the
transmitter power amplifier and the antenna.
May 25, 20056881096C74-B
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