Motorola ASTRO Digital Saber, ASTRO R Service Manual

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™ Digital SABER™

and

Portable Radios

Detailed Service Manual

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Table of Contents

1 - Foreword . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

Safety. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1

Radio Frequency (RF) Operational Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1

Portable Radio Operation and EME Exposure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1

Electromagnetic Interference/Compatibility. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3

Safety and General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4

Operational Warnings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4

Operational Cautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5

Intrinsically Safe Radio Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5

Manual Revisions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-8

Computer Software Copyrights . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-8

Replacement Parts Ordering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

Parts Ordering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

Motorola Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

Parts Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9

Portable Radio Model Numbering System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-10

ASTRO Digital SABER Detailed Model Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-11

Glossary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12

2 - Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1

Notations Used in This Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2

3 - General Overview of an ASTRO Digital SABER Radio . . . . . . . . . . . . . . . . . . . . . . . 3-1

Analog Mode of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2

ASTRO Mode (Digital Mode)

of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2

Transceiver Board Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3

VOCON Board Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3

4 - Radio Power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1

General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1

B+ Routing for VHF/UHF Transceiver Boards. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-2

B+ Routing for 800MHz Transceiver Boards. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-3

B+ Routing for VOCON Boards and Display Modules. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-4

5 - VHF/UHF Transceiver Board Detailed Theory of Operation . . . . . . . . . . . . . . . . . . 5-1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1

Frequency Generation Unit (FGU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1

Antenna Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-3

Receiver Front End . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-3

Receiver Back End. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-4

Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5

Harmonic Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5

RF Power Amplifier Module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5

ALC Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5

, Motorola, ASTRO, Private-Line, and Digital Private Line are trademarks of Motorola, Inc. © 2000, 2001 Motorola Commercial, Government, Industrial Solutions Sector 8000 W. Sunrise Blvd., Fort Lauderdale, FL 33322 All Rights Reserved. Printed in U. S. A. 4/2001.

Detailed Service Manual

68P81076C10-A

Page 3

6 - 800MHz Transceiver Board Detailed Theory of Operation . . . . . . . . . . . . . . . . . . . 6-1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

Frequency Synthesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

Antenna Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2

Receiver Front End . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3

Receiver Back End . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4

Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5

7 - VOCON Board Detailed Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

Controller Section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2

Vocoder Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3

Switched Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5

RX Signal Path. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6

TX Signal Path. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8

Controller Bootstrap and Asynchronous Buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-10

Vocoder Bootstrap. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-11

SPI Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12

Universal Connector and Option Selects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12

Keypad and Display Module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-13

Controls and Control Top Flex. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-14

Controller Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-15

Vocoder Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-17

MCU System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-19

DSP System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-19

Radio Power-Up/Power-Down Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-19

8 - Secure Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1

Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2

Troubleshooting

Secure Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2

Error 09/10,

Error 09/90. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2

Keyload. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2

9 - Troubleshooting Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1

Handling Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1

Voltage Measurement and Signal Tracing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2

Power-Up Self-Check Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3

Power-Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3

Standard Bias Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-6

10 - Troubleshooting Charts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1

11 - Troubleshooting Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1

Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1

12 - Troubleshooting Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-1

Introduction to This Section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-1

13 - Block Diagrams, Schematics, Electrical Parts Lists, and Circuit Board Details 13-1

Page 4

List of Figures

Figure 1 . B+ Routing for VHF/UHF Transceiver Boards.................................................................. 4-2

Figure 2. B+ Routing for 800MHz Transceiver Boards.................................................................... 4-3

Figure 3. B+ Routing for Vocoder/Controller (VOCON) Boards .................................................... 4-5

Figure 4. VOCON Board - Controller Section................................................................................. 7-2

Figure 5. VOCON Board - Vocoder Section.................................................................................... 7-4

Figure 6. DSP RSSI Port - RX Mode ................................................................................................. 7-6

Figure 7. DSP RSSI Port - TX Mode ................................................................................................. 7-8

Figure 8. Host SB9600 and RS232 Ports........................................................................................ 7-10

Figure 9. Universal Connector...................................................................................................... 7-12

Figure 10. VOCON Board Connector - J201................................................................................... 7-12

Figure 11. Control Top Flex............................................................................................................ 7-14

Figure 12. Controller Memory Mapping ........................................................................................ 7-16

Figure 13. Vocoder Memory Mapping............................................................................................ 7-18

Figure 14. Waveform W1................................................................................................................ 11-1

Figure 15. Waveform W2................................................................................................................ 11-2

Figure 16. Waveform W3................................................................................................................ 11-2

Figure 17. Waveform W4................................................................................................................ 11-3

Figure 18. Waveform W5................................................................................................................ 11-3

Figure 19. Waveform W6................................................................................................................ 11-4

Figure 20. Waveform W7................................................................................................................ 11-4

Figure 21. Waveform W8................................................................................................................ 11-5

Figure 22. Waveform W9................................................................................................................ 11-5

Figure 23. Waveform W10.............................................................................................................. 11-6

List of Tables

Table 1. Option Select Functions................................................................................................. 7-13

Table 2. Standard Operating Bias .................................................................................................. 9-6

Table 3. J201 VOCON Board to Universal Connector ................................................................ 12-1

Table 4. J601VOCON Board to Display Board ............................................................................ 12-2

Table 5. J701 VOCON Board to Keypad...................................................................................... 12-2

Table 6. J1/J401 Transceiver Board to VOCON Board................................................................. 12-2

Table 7. J801 VOCON Board to Encryption Board ..................................................................... 12-3

Table 8. J901 VOCON Board to Control Top Flex ...................................................................... 12-3

Page 5

List of Schematics, Circuit Boards, and Parts Lists

Radio Interconnect Diagram............................................................................................................ 13-2

NLD8892R VHF Transceiver Board Schematic Diagram.................................................................. 13-3

NLD8892R VHF Transceiver Circuit Board Details and Parts List................................................... 13-4

NLE4560K UHF Range 1 Transceiver Board Schematic Diagram.................................................... 13-6

NLE4560K UHF Range 1 Transceiver Circuit Board Details and Parts List ..................................... 13-7

NLE4244P UHF Range 2 Transceiver Board Schematic Diagram .................................................... 13-9

NLE4244P UHF Range 2 Transceiver Circuit Board Details and Parts List.................................... 13-10

NUF6411K 800 MHz Transceiver Board Schematic Diagram........................................................ 13-12

NUF6411K 800 MHz Transceiver Circuit Board Details and Parts List ......................................... 13-13

NTN7749G VOCON (Vocoder/Controller) Board Schematic Diagram, Sheet 1 of 2.................... 13-16

NTN7749G VOCON (Vocoder/Controller) Board Schematic Diagram, Sheet 2 of 2.................... 13-17

NTN7749G VOCON (Vocoder/Controller) Circuit Board Details & Parts List.................... 13-18

Related Publications

ASTRO Digital SABER (Model I) User’s Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68P81072C75

ASTRO Digital SABER (Models II and III) User’s Guide . . . . . . . . . . . . . . . . . . . . . . . . . .68P81072C80

ASTRO Digital SABER Portable Radios Basic Service Manual . . . . . . . . . . . . . . . . . . . . . .68P81076C05

Page 6

Foreword

•

Safety

SAFETY AND GENERAL INFORMATION

IMPORTANT INFORMATION ON SAFE AND EFFICIENT OPERATION

READ THIS INFORMATION BEFORE USING YOUR MOTOROLA TWO-WAY RADIO

The information provided in this document supersedes the general safety information contained in user guides published prior to October

2000. For information regarding radio use in a hazardous atmosphere refer to the Factory Mutual (FM) manual supplement included with radio models that offer this capability and/or the intrinsic safety radio information section of this user manual.

Radio Frequency (RF) Operational Characteristics

To transmit (talk) you must push the Push-To-Talk button; to receive (listen) you must release the Push-T o-T alk button.

When the radio is transmitting, it generates radio frequency (RF) energy; when it is receiving, or when it is off, it does not generate RF energy.

Portable Radio Operation and EME Exposure

Y our Motorola radio is designed to comply with the following national and international standards and guidelines regarding exposure of human beings to radio frequency electromagnetic energy (EME):

United States Federal Communications Commission, Code of Federal Regulations; 47 CFR part 2 sub-part J

American National Standards Institute (ANSI) / Institute of Electrical and Electronic Engineers (IEEE) C95. 1-1992

Institute of Electrical and Electronic Engineers (IEEE) C95.1-1999 Edition

National Council on Radiation Protection and Measurements (NCRP) of the United States, Report 86, 1986

International Commission on Non-Ionizing Radiation Protection (ICNIRP) 1998

Ministry of Health (Canada) Safety Code 6. Limits of Human

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Exposure to Radio Frequency Electromagnetic Fields in the Frequency Range from 3 kHz to 300 GHz, 1999

Australian Communications Authority Radiocommunications (Electromagnetic Radiation - Human Exposure) Standard 1999 (applicable to wireless phones only)

To assure optimal radio performance and make sure human exposure to radio frequency electromagnetic energy is within the guidelines set forth in the above standards, always adhere to the following procedures:

Two-way Radio Operation

When using your radio, hold the radio in a

vertical position with the microphone one to two inches (2.5 to 5 centimeters) away from the

MAN WITH RA

lips.

Body-worn Operation

Antenna Care

T o maintain compliance with FCC RF exposure guidelines, if you wear a radio on your body when transmitting, always place the radio in a

Motorola approved clip, holder, holster, case, or body harness for this product . Use of non-Motorola-approved

accessories may exceed FCC RF exposure guidelines. If you do not

use a Motorola approved body-worn accessory and are not using the radio in the intended use positions along side of the head in the phone mode or in front of the face in the two-way radio mode, then ensure the antenna and radio is kept the following minimum distances from the body when transmitting:

Phone or Two-way radio mode: one inch (2.5 centimeters) Data operation using any data feature with or without an

accessory cable: one inch (2.5 centimeters)

Use only the supplied or an approved replacement antenna.

Unauthorized antennas, modiﬁcations, or attachments could damage the radio and may violate FCC regulations.

DO NOT hold the antenna when the radio is “IN USE”. Holding the

antenna affects call quality and may cause the radio to operate at a higher power level than needed.

Approved Accessories

For a list of approved Motorola accessories look in the appendix or accessory section of your radio’s User Guide.

Page 8

•

Electromagnetic Interference/Compatibility

NOTE: Nearly every electronic device is

susceptible to electromagnetic interference (EMI) if inadequately shielded, designed or otherwise conﬁgured for electromagnetic compatibility.

Facilities

To avoid electromagnetic interference and/or compatibility conﬂicts, turn off your radio in any facility where posted notices instruct you to do so. Hospitals or health care facilities may be using equipment that is sensitive to external RF energy.

Aircraft

When instructed to do so, turn off your radio when on board an aircraft. Any use of a radio must be in accordance with applicable regulations per airline crew instructions.

Medical Devices

Pacemakers

The Health Industry Manufacturers Association recommends that a minimum separation of 6 inches (15 centimeters) be maintained between a handheld wireless radio and a pacemaker.These recommendations are consistent with those of the U.S. Food and Drug Administration.

Persons with pacemakers should:

ALWAYS keep the radio more than 6 inches (15 centimeters) from their pacemaker when the radio is turned ON.

not carry the radio in the breast pocket. use the ear opposite the pacemaker to minimize the potential

for interference. turn the radio OFF immediately if you have any reason to

suspect that interference is taking place.

Hearing Aids

Some digital wireless radios may interfere with some hearing aids. In the event of such interference, you may want to consult your hearing aid manufacturer to discuss alternatives.

Other Medical Devices

If you use any other personal medical device, consult the manufacturer of your device to determine if it is adequately shielded from RF energy. Your physician may be able to assist you in obtaining this information.

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SAFETY AND GENERAL

Use While Driving

Check the laws and regulations on the use of radios in the area where you drive. Always obey them.

When using your radio while driving, please:

Give full attention to driving and to the road. Use hands-free operation, if available. Pull off the road and park before making or answering a call if

driving conditions so require.

OPERATIONAL WARNINGS

FOR VEHICLES WITH AN AIR BAG

Do not place a portable radio in the area over an air bag or in the air bag deployment area. Air bags

W A R N I N G

inﬂate with great force. If a portable radio is placed in the air bag deployment area and the air bag inﬂates, the radio may be propelled with great force and cause serious injury to occupants of the vehicle.

POTENTIALLY EXPLOSIVE ATMOSPHERES

Turn off your radio prior to entering any area with a potentially explosive atmosphere, unless it is a radio

W A R N I N G

BLASTING CAPS AND AREAS

W A R N I N G

type especially qualiﬁed for use in such areas as "Intrinsically Safe" (for example, Factory Mutual, CSA, UL, or CENELEC). Do not remove, install, or charge batteries in such areas. Sparks in a potentially explosive atmosphere can cause an explosion or ﬁre resulting in bodily injury or even death.

NOTE: The areas with potentially explosive

atmospheres referred to above include fueling areas such as below decks on boats, fuel or chemical transfer or storage facilities, areas where the air contains chemicals or particles, such as grain, dust or metal powders, and any other area where you would normally be advised to turn off your vehicle engine. Areas with potentially explosive atmospheres are often but not always posted.

To avoid possible interference with blasting operations, turn off your radio when you are near electrical blasting caps, in a blasting area, or in areas posted: "Turn off two-way radio.” Obey all signs and instructions.

Page 10

OPERATIONAL CAUTIONS

ANTENNAS

Do not use any portable radio that has a damaged antenna. If a damaged antenna comes

C a u t i o n

BATTERIES

C a u t i o n

into contact with your skin, a minor burn can result.

All batteries can cause property damage and/or bodily injury such as burns if a conductive material such as jewelry, keys, or beaded chains touch exposed terminals. The conductive material may complete an electrical circuit (short circuit) and become quite hot. Exercise care in handling any charged battery, particularly when placing it inside a pocket, purse, or other container with metal objects.

INTRINSICALLY SAFE RADIO INFORMATION

FMRC Approved Equipment

Anyone intending to use a radio in a location where hazardous concentrations of ﬂammable material exist (hazardous atmosphere) is advised to become familiar with the subject of intrinsic safety and with the National Electric Code NFPA 70 (National Fire Protection Association) Article 500 (hazardous [classiﬁed] locations).

An Approval Guide, issued by Factory Mutual Research Corporation (FMRC), lists manufacturers and the products approved by FMRC for use in such locations. FMRC has also issued a voluntary approval standard for repair service (“Class Number 3605”).

FMRC Approval labels are attached to the radio to identify the unit as being FM Approved for speciﬁed hazardous atmospheres. This label speciﬁes the hazardous Class/Division/Group along with the part number of the battery that must be used. Depending on the design of the portable unit, this FM label can be found on the back or the bottom of the radio housing. The FM Approval mark is shown below:

APPROVED

Page 11

WARNINGS

W A R N I N G

WARNINGS

W A R N I N G

Do not operate radio communications equipment in a hazardous atmosphere unless it is a type especially qualiﬁed for such use (e.g., FMRC Approved). An explosion or ﬁre may result.

Do not operate an FMRC Approved Product in a hazardous atmosphere if it has been physically damaged (e.g., cracked housing). An explosion or ﬁre may result.

Do not replace or charge batteries in a hazardous atmosphere. Contact sparking may occur while installing or removing batteries and cause an explosion or ﬁre.

Do not replace or change accessories in a hazardous atmosphere. Contact sparking may occur while installing or removing accessories and cause an explosion or ﬁre.

Do not operate an FMRC Approved Product unit in a hazardous location with the accessory contacts exposed. Keep the connector cover in place when accessories are not used.

•

Turn a radio off before removing or installing a battery or accessory.

Do not disassemble an FMRC Approved Product unit in any way that exposes the internal electrical circuits of the unit.

Radios must ship from the Motorola manufacturing facility with the hazardous atmosphere capability and FM Approval labeling. Radios will not be “upgraded” to this capability and labeled in the ﬁeld.

• A modiﬁcation changes the unit’s hardware from its original design conﬁguration. Modiﬁcations can only be made by the original product manufacturer at one of its FMRC-audited manufacturing facilities.

Page 12

WARNINGS

• Failure to use an FMRC Approved Product unit with an FMRC Approved battery or FMRC Approved accessories

W A R N I N G

Repair of FMRC Approved Products

REPAIRS FOR MOTOROLA PRODUCTS WITH FMRC APPROVAL ARE THE RESPONSIBILITY OF THE USER.

You should not repair or relabel any Motorola- manufactured communication equipment bearing the FMRC Approval label (“FMRC Approved Product”) unless you are familiar with the current FMRC Approval standard for repairs and service (“Class Number 3605”).

You may want to consider using a repair facility that operates under 3605 repair service approval.

speciﬁcally approved for that product may result in the dangerously unsafe condition of an unapproved radio combination being used in a hazardous location.

• Unauthorized or incorrect modiﬁcation of an FMRC Approved Product unit will negate the Approval rating of the product.

WARNINGS

• Incorrect repair or relabeling of any FMRC Approved

Product unit could adversely affect the Approval

W A R N I N G

FMRC’s Approval Standard Class Number 3605 is subject to change at any time without notice to you, so you may want to obtain a current copy of 3605 from FMRC. Per the December 1994 publication of 3605, some key deﬁnitions and service requirements are as follows:

Repair

A repair constitutes something done internally to the unit that would bring it back to its original condition—Approved by FMRC. A repair should be done in an FMRC Approved facility.

Items not considered as repairs are those in which an action is performed on a unit which does not require the outer casing of the unit to be opened in a manner which exposes the internal electrical circuits of the unit. You do not have to be an FMRC Approved Repair Facility to perform these actions.

rating of the unit.

• Use of a radio that is not intrinsically safe in a

hazardous atmosphere could result in serious injury or death.

Page 13

Relabeling

The repair facility shall have a method by which the replacement of FMRC Approval labels are controlled to ensure that any relabeling is limited to units that were originally shipped from the Manufacturer with an FM Approval label in place. FMRC Approval labels shall not be stocked by the repair facility . An FMRC Approval label shall be ordered from the original manufacturer, as needed, to repair a speciﬁc unit. Replacement labels may be obtained and applied by the repair facility , provided there is satisfactory evidence that the unit being relabeled was originally an FMRC Approved unit. Veriﬁcation may include, but is not limited to: a unit with a damaged Approval label, a unit with a defective housing displaying an Approval label, or a customer invoice indicating the serial number of the unit and purchase of an FMRC Approved model.

Do Not Substitute Options or Accessories

The Motorola communications equipment certiﬁed by Factory Mutual is tested as a system and consists of the FM Approved portable, FM Approved battery, and FM Approved accessories or options, or both. This FM Approved portable and battery combination must be strictly observed. There must be no substitution of items, even if the substitute has been previously Approved with a different Motorola communications equipment unit. Approved conﬁgurations are listed in the FM Approval Guide published by FMRC, or in the product FM Supplement. This FM Supplement is shipped from the manufacturer with the FM Approved radio and battery combination. The Approval Guide, or the Approval Standard Class Number 3605 document for repairs and service, can be ordered directly from Factory Mutual Research Corporation located in Norwood, Massachusetts.

Manual Revisions Changes which occur after this manual is printed are described in

“FMRs.” These FMRs provide complete information on changes including pertinent parts listing data.

Computer Software Copyrights

The Motorola products described in this manual may include copyrighted Motorola computer programs stored in semiconductor memories or other media. Laws in the United States and other countries preserve for Motorola certain exclusive rights for copyrighted computer programs, including the exclusive right to copy or reproduce in any form the copyrighted computer program. Accordingly , any copyrighted Motorola computer programs contained in the Motorola products described in this manual may not be copied or reproduced in any manner without the express written permission of Motorola. Furthermore, the purchase of Motorola products shall not be deemed to grant either directly or by implication, estoppel, or otherwise, any license under the copyrights, patents or patent applications of Motorola, except for the normal non-exclusive royalty free license to use that arises by operation of law in the sale of a product.

Page 14

Replacement Parts Ordering

When ordering replacement parts or equipment information, the complete identiﬁcation number should be included. This applies to all components, kits, and chassis. If the component part number is not known, the order should include the number of the chassis or kit of which it is a part, and sufﬁcient description of the desired component to identify it.

Crystal and channel element orders should specify the crystal or channel element type number, crystal and carrier frequency, and the model number in which the part is used.

Parts Ordering 7:00 A. M. to 7:00 P. M. (Central Standard Time)

Monday through Friday (Chicago, U. S. A.) Domestic (U. S. A.): 1-800-422-420, or 847-538-8023 1-800-826-1913, or 410-712-6200 (Federal Government) TELEX: 280127 FAX: 1-847-538-8198 FAX: 1-410-712-4991 (Federal Government) Domestic (U. S. A.) after hours or weekends: 1-800-925-4357 International: 1-847-538-8023

Motorola Parts Accessories and Aftermarket Division

(United States and Canada) Attention: Order Processing 1313 E. Algonquin Road Schaumburg, IL 60196

Accessories and Aftermarket Division Attention: International Order Processing 1313 E. Algonquin Road Schaumburg, IL 60196

Parts Identiﬁcation 1-847-538-0021 (Voice)

1-847-538-8194 (FAX)

Page 15

Portable Radio Model Numbering System

Typical Model Number:

Position:

Position 1 - Type of Unit

H = Hand-Held Portable

Positions 2 & 3 - Model Series

04 = ASTRO

Position 4 - Frequency Band

Less than 29.7MHz

29.7 to 35.99MHz

36 to 41.99MHz

42 to 50MHz

66 to 80MHz

74 to 90MHz

Product Specific

136 to 162MHz

146 to 178MHz

174 to 210MHz

190 to 235MHz

Values given represent range only; they are

not absolute.

Position 5 - Power Level

0 to 0.7 Watts

0.7 to 0.9 Watts

1.0 to 3.9 Watts

4.0 to 5.0 Watts

5.1 to 6.0 Watts

6.1 to 10 Watts

Position 6 - Physical Packages

RF Modem Operation

Receiver Only

Standard Control; No Display

Standard Control; With Display

Limited Keypad; No Display

Limited Keypad; With Display

Full Keypad; No Display

Full Keypad; With Display

Limited Controls; No Display

Limited Controls; Basic Display

Limited Controls; Limited Display

Rotary Controls; Standard Display

Enhanced Controls; Enhanced Display

Low Profile; No Display

Low Profile; Basic Display

Low Profile; Basic Display, Full Keypad

Position 7 - Channel Spacing

1 = 5kHz 2 = 6.25kHz 3 = 10kHz 4 = 12.5kHz

H04U CF 9 P W7 A N S P 0 1

123 4 5 6 7 8 9 10111213141516

336 to 410MHz

403 to 437MHz

438 to 482MHz

470 to 520MHz

Product Specific

806 to 870MHz

825 to 870MHz

896 to 941MHz

1.0 to 1.6GHz

1.5 to 2.0GHz

5 = 15kHz 6 = 20/25kHz 7 = 30kHz 9 = Variable/Programmable

Positions 13 - 16

“SP” Model Suffix

Position 12 -

Unique Model Variations

C = Cenelec N = Standard Package

Position 11 - Version

Version Letter (Alpha) - Major Change

Position 10 - Feature Level

1 = Basic 2 = Limited Package 3 = Limited Plus 4 = Intermediate 5 = Standard Package

Position 9 - Primary System Type

Conventional

Privacy Plus®

Clear SMARTNET™

Advanced Conventional Stat-Alert™

Enhanced Privacy Plus®

Nauganet 888 Series

Japan Specialized Mobile Radio (JSMR)

Multi-Channel Access (MCA)

CoveragePLUS™

MPT1327* - Public

MPT1327* - Private

Radiocom

Tone Signalling

Binary Signalling

Phonenet®

Programmable

Secure Conventional

Secure SMARTNET™

6 = Standard Plus 7 = Expanded Package 8 = Expanded Plus 9 = Full Feature/ Programmable

* MPT = Ministry of Posts and Telecommunications

Position 8 - Primary Operation

Conventinal/Simplex

Conventional/Duplex

Trunked Twin Type

Dual Mode Trunked

Dual Mode Trunked/Duplex

Trunked Type I

Trunked Type II

FDMA* Digital Dual Mode

TDMA** Digital Dual Mode

Single Sideband

Global Positioning Satellite Capable

Amplitude Companded Sideband (ACSB)

Programmable

* FDMA = Frequency Division Multiple Access

** TDMA = Time Division Multiple Access

Page 16

ASTRO Digital SABER Detailed Model Chart

Model Number Description

H04KDC9PW5AN VHF 1-5 Watt ASTRO Digital SABER Model I

H04KDF9PW7AN VHF 1-5 Watt ASTRO Digital SABER Model II

H04KDH9PW7AN VHF 1-5 Watt ASTRO Digital SABER Model III

H04RDC9PW5AN UHF 1-4 Watt ASTRO Digital SABER Model I

H04RDF9PW7AN UHF 1-4 Watt ASTRO Digital SABER Model II

H04RDH9PW7AN UHF 1-4 Watt ASTRO Digital SABER Model III

H04SDC9PW5AN UHF 1-4 Watt ASTRO Digital SABER Model I

H04SDF9PW7AN UHF 1-4 Watt ASTRO Digital SABER Model II

H04SDH9PW7AN UHF 1-4 Watt ASTRO Digital SABER Model III

H04UCC9PW5AN 800MHz 1-3 Watt ASTRO Digital SABER Model I

H04UCF9PW7AN 800MHz 1-3 Watt ASTRO Digital SABER Model II

H04UCH9PW7AN 800MHz 1-3 Watt ASTRO Digital SABER Model III

Item Number Description

XXXXNHN6544_ Housing (with display and 3 x 6 keypad)

X X X X NHN6554_ Housing (with display and 3 x 2 keypad) XXXXNHN6555_ Housing (no display and no keypad) X X X NLD8892_ VHF Transceiver Board (136-174MHz)

XXX NLE4560_ UHF Transceiver Board (403-470MHz)

X X X NLE4244_ UHF Transceiver Board (450-512MHz)

XXXNUF6411_ 800MHz Transceiver Board (806-870MHz)

X X X X X X X X X X X X NTN4595_ Nickel-Cadmium, Ultra-High Capacity

XXXXXXXXXXXXNTN7061_ Accessory Connector Cover X X X X X X X X X X X X NTN7268_ Control Top Chassis XXXXXXXXXXXXNTN7309_ Belt Clip X X X X NTN7637_ Non-Display Front Shield

XX XX XX XXNTN7638_ Display Front Shield X X X X X X X X X X X X NTN7749_ VOCON Kit XXXXXXXXXXXX0305150X01 VOCON Shield Screws (qty. 4) X X X X X X X X X X X X 1302646J01 Control Top Escutcheon XXXXXXXXXXXX1302647J01 16-Position Select Knob Escutcheon X X X X X X X X X X X X 2605403X01 VOCON Board Back Shield XXXXXXXXXXXX2605535W02 Center Transceiver Shield X X X X X X X X X X X X 2605844V01 VOCON Board Top Shield XXXXXXXXXXXX2805462X01 20-Pin Mating Plug X X X X X X X X X X X X 3205082E48 On/Off/Volume Control Knob O-Ring Gasket XXXXXXXXXXXX3205082E80 Control Top O-Ring Gasket X X X X X X X X X X X X 3205082E83 Programmable Button O-Ring Gasket XXXXXXXXXXXX4502640J01 2-Position A/B Switch X X X 8505518V01 VHF Antenna

XXXXXX 8505241U05 UHF Antenna

X X X 8505241U03 800MHz Antenna

X = Indicates one of each is required.

(1800mAh), Large-Size Housing (Height 3.9” ) Battery

Page 17

Glossary

A/D Analog to Digital converter; converts an instantaneous dc voltage level to a corresponding

digital value. ABACUS IC Custom integrated circuit providing a digital receiver IF backend. ADSIC ABACUS/DSP Support IC; custom integrated circuit providing peripheral functions for the

DSP. ALC Automatic Level Control; a circuit in the transmit RF path that controls RF power ampliﬁer

output, provides leveling over frequency and voltage, and protects against high VSWR. D/A Digital to Analog converter; converts a digital value to a corresponding dc voltage value. DTMF Dual Tone Multi-Frequency DPL Digital Private-Line™ DSP Digital Signal Processor; microcontroller speciﬁcally tailored for signal processing

computations. In this case refers speciﬁcally to Motorola DSP56001. Firmware Software or a software/hardware combination of computer programs and data, with a

ﬁxed logic conﬁguration stored in a read-only memory; information can not be altered or

reprogrammed. FGU Frequency Generation Unit FLASHport™ A Motorola term that describes the ability of a radio to change memory. Every FLASHport

radio contains a FLASHport EEPROM memory chip that can be software written and

rewritten to, again and again. Host Motorola HC11F1 microcontrol unit U204 (see MCU). Host Port Parallel memory mapped interface consisting of eight registers in the DSP56001. IC Integrated Circuit IMBE A sub-band, voice encoding algorithm used in ASTRO digital voice. ISW Inbound Signalling Word; data transmitted on the control channel from a subscriber unit

to the central control unit. LSH Low Speed Handshake; 150 baud digital data sent to the radio during trunked operation

while receiving audio. MCU MicroControl Unit MDC Motorola Digital Communications OMPAC Over-Molded Pad-Array Carrier; a Motorola custom IC package, distinguished by the

presence of solder balls on the bottom pads. Open Architecture A controller conﬁguration that utilizes a microprocessor with extended ROM, RAM, and

EEPROM. OSW Outbound Signalling Word; data transmitted on the control channel from the central

controller to the subscriber unit. PC Board Printed Circuit board PL Private-Line® tone squelch; a continuous sub-audible tone that is transmitted along with

the carrier. PLL Phase-Locked Loop; a circuit in which an oscillator is kept in phase with a reference,

usually after passing through a frequency divider. PTT Push-To-Talk; the switch located on the left side of the radio which, when pressed, causes

the radio to transmit. Registers Short-term data-storage circuits within the microcontrol unit or programmable logic IC.

Page 18

Repeater Remote transmit/receive facility that re-transmits received signals in order to improve

communications coverage. RESET Reset line; an input to the microcontroller that restarts execution. RF PA Radio Frequency Power Ampliﬁer RSS Radio Service Software RPT/TA RePeaTer/Talk-Around RX DATA Recovered digital data line. Signal Qualiﬁer

Mode

An operating mode whereby the radio is muted but still continues to analyze receive data

to determine RX signal type. SCI IN Serial Communication Interface INput line SLIC Support-Logic IC; a custom gate array used to provide I/O and memory expansion for the

microcontroller. Softpot Software potentiometer; a computer-adjustable electronic attenuator. Software Computer programs, procedures, rules, documentation, and data pertaining to the

operation of a system. SPI Serial Peripheral Interface; how the microcontroller communicates to modules and ICs

through the CLOCK and DATA lines. Squelch Muting of audio circuits when received signal levels fall below a pre-determined value. SRAM Static-RAM chip used for volatile, program/data memory. SSI Synchronous Serial Interface on the DSP56001 consisting of six signals and used for an RX

and TX modulated data interface to the ADSIC. Standby Mode An operating mode whereby the radio is muted but still continues to monitor data. System Central

Controllers

Main control unit of the trunked dispatch system; handles ISW and OSW messages to and

from subscriber units (see ISW and OSW). System Select The act of selecting the desired operating system with the system-select switch (also, the

name given to this switch). TOT Time-Out Timer; a timer that limits the length of a transmission. TSOP Thin Small-Outline Package UART Universal Asynchronous Receiver Transmitter. µC Microcontrol unit (see MCU). VCO Voltage-Controlled Oscillator; an oscillator whereby the frequency of oscillation can be

varied by changing a control voltage. VCOB IC Voltage-Controlled Oscillator Buffer IC Vocoder VOice enCODER; the DSP-based system for digitally processing the analog signals,

includes the capabilities of performing voice compression algorithms or voice encoding. VOCON VOcoder/CONtroller board VSELP Vector Sum Excited Linear Predictive coding; a voice encoding technique used in ASTRO

digital voice. VSWR Voltage Standing Wave Ratio

Page 19

Notes

Page 20

Introduction

General This manual includes all the information necessary to maintain peak

product performance and maximum working-time. This detailed-level of service (component-level) is typical of some service centers, selfmaintained customers, and distributors.

This manual is to be used in conjunction with the ASTRO Digital SABER Portable Radios Basic Service Manual (Motorola part number 68P81076C05), which helps troubleshooting a problem to a particular board. Conduct the basic performance checks ﬁrst. This will verify the actual need for analyzing the radio and help pinpoint the functional problem area. In addition, the technician will become familiar with the radio test mode of operation, which is a helpful tool. If any basic receive or transmitter parameters fail, then the radio should be aligned per the radio alignment procedure.

Included in other areas of this manual are functional block diagrams, detailed theory of operation, troubleshooting charts and waveforms, schematics, and parts list. The technician should be very familiar with these sections to aid in deducing the problem circuit. Also included are component location diagrams to aid in locating individual circuit components and some IC diagram, which point out some convenient probe points.

The theory of operation sections of this manual contain detailed descriptions of operations of many circuits. Once the area of the problem is located, it would be strongly advisable to review the operation of the circuit pertaining to the troubleshooting ﬂow chart.

Page 21

Notations Used in This Manual

Throughout the text in this publication, you will notice the use of warnings, cautions, and notes. These notations are used to emphasize that safety hazards exist, and care must be taken and observed.

NOTE: An operational procedure, practice, or

condition, etc., which is essential to emphasize.

CAUTION: Indicates a potentially hazardous situation which, if not avoided, may result in equipment damage. To properly word a caution,

C a u t i o n

W A R N I N G

ﬁrst identify the gravity of the risk, then describe the nature of the risk, then tell the user how to avoid the risk, and ﬁnally communicate this risk clearly to the person exposed to the risk.

WARNING: Indicates a potentially hazardous situation which, if not avoided, could result in death or injury. To properly word a caution, ﬁrst identify the gravity of the risk, then describe the nature of the risk, then tell the user how to a void the risk, and ﬁnally communicate this risk clearly to the person exposed to the risk.

DANGER: Indicates an imminently hazardous situation which, if not avoided, will result in death or injury. To properly word a caution, ﬁrst identify the gravity of the risk, then describe the nature of the risk, then tell the user how to a v oid the risk, and ﬁnally communicate this risk

D A N G E R

You will also ﬁnd in this publication the use of the asterisk symbol (*) to indicate a negative or NOT logic true signal.

clearly to the person exposed to the risk.

Page 22

General Overview of an

ASTRO Digital SABER Radio 3

The ASTRO Digital SABER radio is a dual mode (trunked/ conventional), microcontroller-based transceiver incorporating a Digital Signal Processor (DSP). The microcontroller handles the general radio control, monitors status, and processes commands input from the keypad or other user controls. The DSP processes the typical analog signals and generates the standard signaling digitally to provide compatibility with existing analog systems. In addition it provides for digital modulation techniques utilizing voice encoding techniques with error correction schemes to provide the user with enhanced range and audio quality all in a reduced bandwidth channel requirement. It allows embedded signaling which can mix system information and data with digital voice to add the capability of supporting a multitude of system features.

The ASTRO Digital SABER radio is available in three models, which are available in the following bands; VHF (136-174MHz), UHF (403470MHz or 450-512MHz), and 800MHz (806-870MHz).

The ASTRO Digital SABER radio consists of:

• Vocoder/Controller (VOCON) Board

• Band-Dependent Transceiver Board

• Display/Keypad Assembly

• In secure models, a hardware, encryption module is also included.

It is advantageous to think of the vocoder/controller (VOCON) board as two separate functional units; a vocoder and a controller. The vocoder section consists of a Digital Signal Processor (DSP), Static-RAM (SRAM), FLASH program memory, audio power ampliﬁer (audio PA), and a custom ABACUS/DSP support integrated circuit (ADSIC). This section handles all the analog and signaling functions previously accomplished with analog integrated circuits (ICs) by processing the signals digitally. In addition, it provides advanced digital signal processing functions which include digital modulation and voice encoding techniques while still maintaining compatibility with today’s analog radio systems. The controller section consists of a microcontroller with FLASH program memory, EEPROM, SRAM, and a custom IC; the SLIC. This section handles general radio control and ergonomics through the various user buttons, and rotary knobs.

The transceiver is frequency dependent, and one transceiver exists for each of the bands; VHF, UHF (range 1 and 2), and 800MHz. The distinction with these transceivers is the incorporation of the ABACUS IC. The ABACUS is a digital IF/Discriminator which provides a true digital interface to the digital circuitry of the vocoder.

Page 23

The display module is a two-line, liquid crystal display with associated circuitry. The display module is an integral part of the front cover keypad. This module utilizes chip-on-board technology and is not considered ﬁeld repairable.

The available encryption module connects directly to the VOCON board and interfaces directly to the vocoder digital circuitry. It contains an independent microcontroller, and two custom ICs to perform digital, numerical, encryption algorithms.

Analog Mode of Operation

When the radio is receiving, the signal comes from the antenna/ antenna-switch connector to the transceiver board, passes through the RX/TX switch and the receiver front end. The signal is then ﬁltered, ampliﬁed, and mixed with the ﬁrst local-oscillator signal generated by the voltage-controlled oscillator (VCO). The resulting intermediate frequency (IF) signal is fed to the IF circuitry , where it is again ﬁltered and ampliﬁed. This ampliﬁed signal is passed to the digital back-end IC, where it is mixed with the second local oscillator to create the second IF at 450kHz. It is then converted to a digital bit stream and mixed a third time to produce a baseband signal. This signal is passed to the VOCON board through a current-driven differential output. On the VOCON board, the ADSIC (ABACUS DSP Support IC) digitally ﬁlters and discriminates the signal, and passes it to the digital-signal processor (DSP). The DSP decodes the information in the signal and identiﬁes the appropriate destination for it. For a voice signal, the DSP will route the digital voice data to the ADSIC for conversion to an analog signal. The ADSIC will then present the signal to the audio power ampliﬁer, which drives the speaker. For signalling information, the DSP will decode the message and pass it to the microcontrol unit.

When the radio is transmitting, microphone audio is passed from the audio power ampliﬁer (PA) to the ADSIC, where the signal is digitized. The ADSIC passes digital data to the DSP, where pre-emphasis and lowpass (splatter) ﬁltering are done. The DSP returns this signal to the ADSIC, where it is reconverted into an analog signal and scaled for application to the voltage-controlled oscillator as a modulation signal. Transmitted signalling information is accepted by the DSP from the microcontrol unit, coded appropriately, and passed to the ADSIC, which handles it the same as a voice signal. Analog modulation information is passed to the synthesizer along the modulation line. A modulated carrier is provided to the RF PA, which transmits the signal under dynamic power control.

ASTRO Mode (Digital Mode) of Operation

In the ASTRO mode (digital mode) of operation, the transmitted or received signal is limited to a discrete set of four deviation levels. The receiver handles an ASTRO-mode signal identically to an analog-mode signal up to the point where the DSP decodes the received data. In the ASTRO receive mode, the DSP uses a speciﬁcally deﬁned algorithm to recover information. In the ASTRO transmit mode, microphone audio is processed identically to an analog mode with the exception of the algorithm the DSP uses to encode the information. This algorithm will result in deviation levels that are limited to four discrete levels.

Page 24

Transceiver Board Overview

The receiver front end consists of a preselector, an RF ampliﬁer, a second preselector, and a mixer . Both preselectors in the VHF and UHF radios are varactor-tuned, two-pole ﬁlters controlled by the microcontrol unit through the digital/analog (D/A) IC. On the 800MHz receiver front end, these ﬁlters are ﬁxed-tuned. The RF ampliﬁer is a dual-gate, gallium- arsenide based IC. The mixer is a double-balanced, active mixer coupled by transformers. Injection is provided by the VCO through an injection ﬁlter . See T able 14 for local oscillator (LO) and ﬁrst IF information.

The frequency generation function is performed by three ICs and associated circuitry. The reference oscillator provides a frequency standard to the synthesizer/prescaler IC, which controls the VCO IC. The VCO IC actually generates the ﬁrst LO and transmit-injection signals and buffers them to the required power level. The synthesizer/ prescaler circuit module incorporates frequency-division and comparison circuitry to keep the VCO signals stable. The synthesizer/ prescaler IC is controlled by the microcontrol unit through a serial bus. Most of the synthesizer circuitry is enclosed in rigid metal cans on the transceiver board to reduce microphonic effects.

The receiver back end consists of a two-pole crystal ﬁlter, an IF ampliﬁer, a second two-pole crystal ﬁlter, and the digital back-end IC (ABACUS). The two-pole ﬁlters are wide enough to accommodate 5kHz modulation. Final IF ﬁltering is done digitally in the ADSIC.

VOCON Board Overview

The digital back-end IC (ABACUS) consists of an ampliﬁer, the second mixer, an IF analog-to-digital converter, a baseband down-converter, and a 2.4MHz synthesis circuit to provide a clock to the ADSIC on the VOCON board. The second LO is generated by discrete components external to the IC. The output of the ABACUS IC is a digital bit stream that is current driven on a differential pair for a reduction in noise generation.

The transmitter consists of an RF PA IC that gets an injection signal from the VCO. Transmit power is controlled by two custom ICs that monitor the output of a directional coupler and adjust PA control voltages correspondingly. The signal passes through a RX/TX switch that uses PIN diodes to automatically provide an appropriate interface to transmit or receive signals. Antenna selection is done mechanically in the control top.

The VOCON board contains the radio’s microcontrol unit with its memory and support circuits, voltage regulators, audio, DSP, ADSIC, and power control circuits. Connected to the VOCON board are the display board, transceiver board, and control top.

The microcontrol unit (MCU) controls receive/transmit frequencies, power levels, display, and other radio functions, using either direct logic control or serial communications paths to the devices.The microcontrol unit executes a stored program located in the FLASH ROM. Data is transferred to and from memory by the microcontrol unit data bus. The memory location from which data is read, or to which data is written, is selected by the address lines.

Page 25

The SLIC acts as an extension of the microcontrol unit by providing logic functions such as lower address latch, reset, memory address decoding, and additional control lines for the radio. The microcontrol unit controls the crystal-pull circuit to adjust the crystal oscillator’s frequency on the microcontrol unit, so that the E-clock’ s harmonics do not cause interference with the radio’s receive channel.

Switched +5V is used for all circuits on the VOCON board except the audio PA, which is sourced from 7.5V. The regulator automatically provides 5V when the radio is turned on. The regulator’s power-down mode is controlled by the microcontrol unit, which senses the position of the on/off/volume control knob.

The DSP performs all signalling and voice encoding and decoding as well as audio ﬁltering and volume control. This includes PrivateLine®/Digital Private Line™ (PL/DPL) encode and alert-tone generation. The IC transmits pre-emphasis on analog signals and applies a low-pass (splatter) ﬁlter to all transmitted signals. It is programmed using parallel programming from the microcontrol unit and the ADSIC.

The ADSIC performs analog-to-digital and digital-to-analog conversions on audio signals. It contains attenuators for volume, squelch, deviation, and compensation, and it executes receiver ﬁltering and discrimination. The IC requires a 2.4MHz clock to function (generated by the ABACUS IC) and is programmed by the microcontrol unit SPI bus.

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Radio Power

Introduction This section of the manual provides a detailed circuit description of

the power distribution for an ASTRO Digital SABER radio.

General In the ASTRO radio, power is distributed to three boards:

• transceiver

• VOCON

• display

In the case of a secure model radio, the encryption module is supplied also.

Power for the radio is provided through a battery supplying a nominal

7.5Vdc directly to the transceiver. The battery is available in the following forms:

• Nickel-Cadmium, High-Capacity (1100mAh), Medium-Size Housing

• Nickel-Cadmium, High-Capacity (1100mAh), Medium-Size Housing (FM Approved, Submersible)

• Nickel-Cadmium, Ultra-High Capacity (1800mAh), Large-Size Housing

• Nickel-Cadmium, Ultra-High Capacity (1800mAh), Large-Size Housing (FM Approved)

• Nickel-Cadmium, Ultra-High Capacity (1800mAh), Large-Size Housing (FM Approved, Submersible)

• Nickel-Metal-Hydride, Medium-Capacity (950mAh), Small-Size Housing

• Nickel-Metal-Hydride, Ultra-High Capacity (1650mAh), Medium-Size Housing (FM Approved, Submersible)

B+ from the battery is electrically switched to most of the radio, rather than routed through the on/off/volume control knob, S901/R901. The electrical switching of B+ supports a “keep-alive” mode. Under software control, even when the on/off/volume control knob has been turned to the “off” position, power remains on until the MCU completes its power-down, at which time the radio is physically powered-down.

Page 27

B+ Routing for VHF/UHF Transceiver Boards

Refer to Figure 1 and your speciﬁc schematic diagram. Raw B+ (7.5V) from the battery (Batt B+) enters the radio on the

transceiver board through a 3-contact spring pin arrangement (J3) as B+, where it is routed through two ferrite beads on the VHF (E1, E101) and three ferrite beads on the UHF (E1, E101, E106) to the RF power ampliﬁer module (U105) and ALC IC (U101, pin 13). Battery B+ is fused, and then routed through the connector J1, pins 19 and 20 to the VOCON board (J401, pins 19 and 20). The B+ supply is routed through the VOCON board to the on/off/volume control knob (S901/R901) on the control top/PTT ﬂex at jack J901, pin 1. With the mechanical on/ off switch (S901) placed in the “on” position, switched B+ (B+ SENSE) is routed from the control top ﬂex at connector plug P901, pin 10 and applied to the VOCON board at connector jack J901, pin 10. This signal is also fed to a resistive divider R222, R223 on the VOCON board so that the microcontrol unit (U204) can monitor the battery voltage.

To/From VOCON Board

RF Amp

Mixer

SW B+

VHF/UHF Transceiver Board

UNSW B+

RX SB+

Q107

CR109

5V Regulator

L121

U106

CR108

L122

RX/TX

L105

Vcc

Out

Synth

U204

ALC U101

VCOB IC

U201

Ref Osc

U203

ABACUS

RF PA Module

U105

5V Regulator

U202

U401

D/A IC

U102

Figure 1 . B+ Routing for VHF/UHF Transceiver Boards

Fuse

IF Amp

Q601

Raw B+

MAEPF-24700-O

Battery

7.5V

The switched B+ voltage supplies power to circuits on the transceiver board. The 5-volt regulator (U202), is applied this voltage through decoupling component C125 to produce a stable 5.0 volt output. Raw B+ (7.5V), which is connected to the ALC IC (U101), is switched through the output (CATH1) to another 5-volt regulator (U106).

Regulator U202 supplies those circuits which need to remain on at all times, such as the reference oscillator (U203), fractional-N-synthesizer (U204), D/A IC (U102), and the ABACUS IC (U401). The D/A IC controls dc switching of the transceiver board. The SC1 signal at U102 pin 12 controls transistors Q107, Q111, and the transmit 5 volts (T5).

Page 28

The SC3 signal at U102 pin 14 controls the Rx 5V switch U106, and the receive 5 volts (R5). A voltage on the synthesizer SOUT line at U204 pin 19 supplies power (Vcc) to the VCO buffer at U201 pin 3.

During the receive mode, regulator U106 supplies regulated 5V (R5) to the receiver front end. In the battery-saver mode, R5 can be switched on and off by controlling pin 3 of U106. Module U106 is not used during the transmit mode. During the transmit mode, transmit 5 volts (T5) for the ALC IC and other TX circuitry is obtained from U202 via switching transistor Q111.

B+ Routing for 800MHz Transceiver Boards

CR104

L101

CR102

Refer to Figure 2 and your speciﬁc schematic diagram. Raw B+ (7.5V) from the battery (Batt B+) enters the radio on the

transceiver board through a 3-contact spring pin arrangement (J3) as B+, where it is routed through four ferrite beads (E1, E2, E3, E4) and applied to the RF power ampliﬁer (U502) and the ALC IC (U504 pin

13). Battery B+ is fused and then routed to the VOCON board, where

it enters on connector J1 pins 19 and 20. On secure radios, Raw B+ is also routed to the encryption board so that it can perform key management and other functions independently of SW B+.

To/From VOCON Board

SW B+ Raw B+

800MHz Transceiver Board

VCO

ALC

U504

Q503

U307

VCOB IC

U303

UNSW B+

RF PA

Module

U502

5V Regulator

U505

Fuse

Battery

7.5V

RF Amp

U202

Mixer

U205

Figure 2 . B+ Routing for 800MHz Transceiver Boards

Synth

U302

Ref Osc

U304

ABACUS

U401

D/A IC

U503

IF Amp

Q601

MAEPF-24336-O

The SW B+ is applied to the 5V regulator (U505) to produce a stable

5.0 volt output. Regulator U505 supplies those circuits which need to

remain on at all times, such as the reference oscillator (U304), fractional-n-synthesizer (U302), D/A IC (U503), and the ABACUS IC (U401). The D/A IC controls dc switching of the transceiver board. The SCI signal at U503 pin 12 controls Q503 and transmit 5 volts (T5). The SC3 signal at U503 pin 14 controls the RX 5V switch in Q503 and the

Page 29

receive 5 volts (R5). During the receive mode, switch Q503 supplies regulated 5volts (R5) to the receiver front end.

B+ Routing for VOCON Boards and Display Modules

Refer to Figure 3 and your speciﬁc schematic diagram. Power for the radio is derived from a 7.5 volt battery, which is applied

to the transceiver board through J3. This Raw B+, or unswitched B+ (UNSW B+), is routed to J1 on the transceiver board and then on to J401 on the VOCON board. Here the UNSW B+ is forwarded to the radio’s control top on/off/volume knob through J901 and a ﬂex circuit. The on/off/volume knob controls B+_SENSE to Q206, which in turn controls Q207. Transistor Q207 is a solid-state power switch, which provides SW B+ to the VOCON board’s analog and transceiver 5V regulators, the audio PA, the display module, and back to the transceiver board. In addition, UNSW B+ is routed to the main digital 5V regulator (U409); B+ SENSE provides for enabling or disabling this regulator .

In the case of a secure radio model, SW B+ and UNSW B+ are also supplied to the encryption module through J801.

Q207 is also under the control of the microcontrol unit (MCU - U204]) through a port on the SLIC IC (U206). This allows the MCU to follow an orderly power-down sequence when it senses the SW B+ is off. This sense is provided through the resistor network of R222 and R223, which provides an input to the A/D port on the MCU.

The VOCON board contains two 5V regulators partitioned between the digital logic circuitry and the analog circuitry . The 5V regulator for the digital circuitry is comprised of U409, CR403, L402, C470, and associated components. This circuit is a switched mode regulator. Switched mode regulators use a switched storage device (L402) to supply just enough energy to the output to maintain regulation. This allows for much greater efﬁciency and lower power dissipation.

The analog circuitry of the ADSIC (U406) and the audio PA (U401) is powered through a separate 5V linear regulator (U410).

It should also be noted that a system reset is provided by U407. This device brings the system out of reset on power-up. It provides a system reset to the microcomputer on power-down or if the digital 5V regulator falls out of regulation.

Page 30

Display Module

8Kx24 SRAM

U402

8Kx24 SRAM

U403

8Kx24 SRAM

U414

256Kx8

FLASH

U205

256Kx8

FLASH

U210

Universal Connector

DSP56001

U405

256Kx8

FLASH

U404

SRAM

U202

EEPROM

U201

HC11F1

MCU

U204

Opt_B+

ADSIC

U406

Audio

U401

5V Analog

5V Digital

SLIC IV

U206

Vocoder/Controller

J201

SW_B+

5V Regulator

U410

5V Regulator

U409

B+_CNTL

Switch

Q207

B+_Sense

On Off

Controls

Flex

UNSW_B+SW_B+

J401

Figure 3 . B+ Routing for Vocoder/Controller (VOCON) Boards

MAEPF-24335-O

Page 31

Notes

Page 32

VHF/UHF T ransceiver Board

Detailed Theory of Operation 5

Introduction This section of the manual provides a detailed circuit description of an

ASTRO Digital SABER VHF and UHF Transceiver Board. When reading the theory of operation, refer to your appropriate schematic and component location diagrams located in the back section of this manual. This detailed theory of operation will help isolate the problem to a particular component. However, ﬁrst use the ASTRO Digital SABER Portable Radios Basic Service Manual to troubleshoot the problem to a particular board.

Frequency Generation Unit (FGU)

The frequency generation unit (FGU) consists of three major sections: the high stability reference oscillator (U203), the fractional-N synthesizer (U204,) and the VCO buffer (U201). A 5V regulator (U202), supplies power to the FGU. The synthesizer receives the 5V REG at U204, and applies it to a ﬁltering circuit within the module and capacitor C253. The well-ﬁltered 5-volt output at U204 pin 19 is distributed to the TX and RX VCOs and the VCO buffer IC. The mixer LO injection signal and transmit frequency are generated by the RX VCO and TX VCO respectively. The RX VCO uses an external active device (Q202), whereas the VHF TX VCO active device is a transistor inside the VCO buffer . The UHF TX VCO uses two active devices, one external (Q203) and the other internal to the VCO buffer . The base and emitter connections of this internal transistor are pins 11 and 12 of U201.

The RX VCO is a Colpitts-type oscillator, with capacitors C235 and C236 providing feedback. The RX VCO transistor (Q202) is turned on when pin 38 of U204 switches from high to low . The RX VCO signal is received by the VCO buffer at U201 pin 9, where it is ampliﬁed by a buffer inside the IC. The ampliﬁed signal at pin 2 is routed through a low-pass ﬁlter (L201 and associated capacitors) and injected as the ﬁrst LO signal into the mixer (U2 pin 8). In the VCO buffer, the RX VCO signal (or the TX VCO signal during transmit) is also routed to an internal prescaler buffer . The buffered output at U201 pin 16 is applied to a low-pass ﬁlter (L205 and associated capacitors). After ﬁltering, the signal is routed to a prescaler divider in the synthesizer at U204 pin 21.

The divide ratios for the prescaler circuits are determined from information stored in a codeplug, which is part of the microcontrol unit (U204 on the VOCON board). The microprocessor extracts data for the division ratio as determined by the position of the channelselect switch (S902), and busses the signal to a comparator in the synthesizer. A 16.8MHz reference oscillator, U203, applies the

16.8MHz signal to the synthesizer at U204 pin 14. The oscillator signal

Page 33

is divided into one of three pre-determined frequencies. A time-based algorithm is used to generate the fractional-N ratio.

If the two frequencies in the synthesizer’s comparator differ, a control (error) voltage is produced. The phase detector error voltage (V control) at pin 31 and 33 of U204, is applied to the loop ﬁlter consisting of resistors R211, R212, and R213, and capacitors C244, C246, C247 and C275. The ﬁltered voltage alters the VCO frequency until the correct frequency is synthesized. The phase detector gain is set by components connected to U204 pins 28 and 29.

In the TX mode, U204 pin 38 goes high and U201 pin 14 goes low, which turns off transistor Q202 and turns on the internal TX VCO transistor in U204 and the external TX VCO buffer Q203 on the UHF circuit. The TX VCO feedback capacitors are C219 and C220. V aractor diode CR203 sets the TX frequency while varactor CR202 is the TX modulation varactor. The modulation of the carrier is achieved by using a 2-port modulation technique. The modulation of low frequency tones such as DPL/TPL is achieved by injecting the tones into the A/D section of the fractional-N synthesizer. The digitized signal is modulated by the fractional-N divider, generating the required deviation. Modulation of the high frequency audio signals is achieved by modulating the varactor (CR203) through a frequency compensation network. Resistors R207 and R208 form a potential divider for the higher frequency audio signals.

In order to cover the very wide bandwidths, positive and negative Vcontrol voltages are used. High control voltages are achieved using positive and negative multipliers. The positive voltage multiplier circuit consists of components CR204, C256, C257 and reservoir capacitor C258.The negative multiplier circuit consists of components CR205, CR206, C266, C267 and reservoir capacitor C254 in VHF and UHF radios. Out-of-phase clocks for the positive multiplier appear at U204 pins 9 and 10. Out-of-phase clocks for the negative multiplier appear at U204 pins 7 and 8, and only when the negative V-control is required (i.e., when the VCO frequency exceeds the crossover frequency). When the negative V-control is not required, transistor Q201 is turned on, and capacitor C259 discharges. The 13V supply generated by the positive multiplier is used to power-up the phase detector circuitry. The negative V-control is applied to the anodes of the VCO varactors.

The TX VCO signal is ampliﬁed by an internal buffer in U201, routed through a low pass ﬁlter and routed to the TX PA module, U105 pin 1. The TX and RX VCOs and buffers are activated via a control signal from U204 pin 38.

The reference oscillator supplies a 16.8MHz clock to the synthesizer where it is divided down to a 2.1MHz clock. This divided-down clock is fed to the ABACUS IC (U401), where it is further processed for internal use.

Page 34

Antenna Switch Two antenna switches are part of the radio circuitry. One of the

switches which is located in the radio casting is mechanical. It switches between the radio antenna and a remote antenna. Switching is accomplished by a plunger located on the accessory connector. W ith a remote antenna installed, continuity between the radio antenna and the RF input line is broken; continuity is made from the remote antenna to the radio RF line. The second switch is a current device. It is a pair of diodes (CR108/CR109) that electronically steer RF between the receiver and the transmitter. In the transmit mode, RF is routed through transmit switching diode CR108, and sent to the antenna. In the receive mode, RF is received from the antenna, routed through receive switching diode CR109, and applied to the RF ampliﬁer, U1 (UHF), Q1 (VHF). In transmit, bias current, sourced from U101 pin 21, is routed through L105, U104, CR108, and L122 in VHF and L105, CR108, and L122 in UHF. Sinking of the bias current is through the transmit ALC module, U101 pin 19. In the receive mode, bias current, sourced from SB+, is routed through Q107 (pin 3 to pin 2), L123 (UHF), L121, CR109, and L122. Sinking of the bias current is through the 5volt regulator, U106 pin 8.

Receiver Front End The RF signal is received by the antenna and coupled through the

external RF switch. The UHF board applies the RF signal to a low-pass ﬁlter comprised of: L126, L127, L128, C149, C150, and C151. The VHF board bypasses the lowpass ﬁlter. The ﬁltered RF signal is passed through the antenna switch (CR109) and applied to a bandpass ﬁlter comprised of: VHF; L11 through L14, CR1 through CR9, C4, C2, and C3, or UHF; L30, L31, L32, L34, L35, CR6 through CR9, C1, C2, and C3. The bandpass ﬁlter is tuned by applying a control voltage to the varactor diodes in the ﬁlter. (CR1-CR9 in VHF and CR6-CR9 in UHF.)

The bandpass ﬁlter is electronically tuned by the D/A IC (U102) which is controlled by the microcomputer .The D/A output range is extended through the use of a current mirror, transistor Q108 and associated resistors R115 and R116. When Q108 is turned on via R115, the D/A output is reduced due to the voltage drop across R116. Depending on the carrier frequency the microcomputer will turn on or off Q108. Wideband operation of the ﬁlter is achieved by retuning the bandpass ﬁlter across the band.

The output of the bandpass ﬁlter is applied to a wideband GaAs RF ampliﬁer IC, U1 (RF AMP) on the UHF transceiver board. The VHF board uses an active device for RF ampliﬁcation (Q1). After being ampliﬁed by the RF AMP, the RF signal is further ﬁltered by a second broad-band, ﬁxed-tuned, bandpass ﬁlter consisting of C6, C7, C8, C80, C86, C87, C88, C97, C99, L3, L4, L5, and L30 (VHF); or C4 through C7, C88 through C94, C99, and L11 through L15 (UHF) to improve the spurious rejection.

Via a broadband 50-ohm transformer, T1, the ﬁltered RF signal is routed to the input of a broadband mixer/buffer (U2). Mixer U2 uses GaAs FETs, in a double-balanced Gilbert Cell conﬁguration. The RF signal is applied to the mixer at U2 pins 1 and 15. An injection signal (1st LO) of about -10dBm, supplied by the FGU, is applied to U2 pin 8. Mixing of the RF and the 1st LO results in an output signal which is

Page 35

the ﬁrst IF frequency . The ﬁrst IF frequency of VHF and UHF bands are

45.15MHz and 73.35MHz respectively. The 1st LO signal for VHF is

45.15MHz higher than the carrier frequency while that for the UHF is

73.35MHz lower than the carrier frequency. The 1st IF signal output, at U2 pins 4 and 6, is routed through transformer T2 and impedance matching components, and applied to a 2-pole crystal ﬁlter (FL1), which is the ﬁnal stage of the receiver front end. The 2-pole crystal ﬁlter removes unwanted mixer products. Impedance matching between the output of the transformer (T2) and the input of the ﬁlter (FL1) is accomplished by capacitor C605 and inductor L605 (VHF); or C611, C614 and L605 (UHF).

Receiver Back End The output of crystal ﬁlter FL1 is matched to the input of IF buffer

ampliﬁer transistor Q601 by components C610 and L604 (VHF) and C609, C610, and L600 (UHF). Transistor Q601 is biased by the 5V regulator (U202). The IF frequency on the collector of Q601 is applied to a second crystal ﬁlter through a matching circuit. The second crystal ﬁlter (FL2) input is matched by C604, C603, and L601 (VHF); or C604, L601, and L602 (UHF). The ﬁlter supplies further attenuation at the IF sidebands to increase the radios selectivity. The output of FL2 routed to pin 32 of U401 through a matching circuit which consists of L603, L606, and C608 (VHF); or L603, C606, and C605 (UHF).

In the ABACUS IC, (U401) the ﬁrst IF frequency is ampliﬁed and then down converted to 450kHz, the second IF frequency . At this point, the analog signal is converted into two digital bit streams via a sigma-delta A/D converter. The bit streams are then digitally ﬁltered and mixed down to baseband and ﬁltered again. The differential output data stream is then sent to the ADSIC (U406) on the VOCON board where it is decoded to produce the recovered audio.

The ABACUS IC (U401) is electronically programmable, and the amount of ﬁltering which is dependent on the radio channel spacing and signal type is controlled by the microcomputer. Additional ﬁltering, which used to be provided externally by a conventional ceramic ﬁlter, is replaced by internal digital ﬁlters in the ABACUS IC. The ABACUS IC contains a feedback AGC circuit to expand the dynamic range of the sigma-delta converter. The differential output data contains the quadrature (I and Q) information in 16-bit words, the AGC information in a 9-bit word, imbedded word sync information and ﬁll bits dependent on sampling speed. A fractional-n synthesizer is also incorporated on the ABACUS IC for 2nd LO generation.

The 2nd LO/VCO is a Colpitts oscillator built around transistor Q401 (VHF) and Q1 (UHF). The VCO has a varactor diode, VR401 (VHF) and CR5 (UHF), to adjust the VCO frequency. The control signal for the varactor is derived from a loop ﬁlter consisting of C426, C428, and R413.

Page 36

Transmitter The transmitter consists of three major sections:

• Harmonic Filter

• RF Power Ampliﬁer Module

• ALC Circuits

Harmonic Filter RF from the power ampliﬁer (PA) module (U105) is routed through the

coupler (U104), passed through the transmit antenna switch (CR108), and applied to a harmonic ﬁltering network in UHF. In the case of a VHF transceiver board, RF from the PA module (U105) is routed also through the coupler (U104), then through the harmonic ﬁltering network, and on to the antenna switch (CR108). The harmonic ﬁltering circuit is comprised of the following components: L126, L127, L128, C149, C150, and C151 (for VHF models); or L126, L127, L128, C149, C150, and C151 (for UHF models). Resistor R128 (UHF) or R117 (VHF) provides a current limited 5V to J2 for mobile ASTRO vehicular adapter (AVA) applications.

RF Power Ampliﬁer Module

The RF power ampliﬁer module (U105) is a wide-band multi-stage ampliﬁer (3 stages for the VHF models and 4 stages for the UHF models). Nominal input and output impedance of U105 is 50 ohms. The dc bias for U105 is on pins 2, 4, 5. In the transmit mode, the voltage on U105 pins 2 and 4 (close to the B+ level) is obtained via switching transistor Q101. Transistor Q101 receives its control base signal as follows:

• the microcomputer keys the D/A IC to produce a ready signal at U102 pin 3

• the ready signal at U102 pin 3 is applied to the TX ALC IC at U101 pin 14 (5V)

• the synthesizer sends a LOC signal to the TX ALC IC (U204 pin 40 to U101 pin 16)

When the LOC signal and the ready signal are both received, the TX ALC IC (pin 13) sends a control signal to turn on transistor Q101.

ALC Circuits Coupler module U104 samples the forward power and the reverse

power of the PA output voltage. Reverse power is present when there is other than 50 ohms impedance at the antenna port. Sampling is achieved by coupling some of the forward and/or reverse power, and apply it to CR102(VHF) or CR101(UHF) and CR103 for rectiﬁcation and summing. The resultant dc signal is then applied to the TX ALC IC (U101 pin 2) as RFDET to be used as an RF strength indicator.

The transmit ALC circuit, built around U101, is the heart of the power control loop. Circuits in the TX ALC module compare the signals at U101 pins 2 and 7. The resultant signal, C BIAS, at U101 pin 4 is applied to the base of transistor Q110. In response to the base drive, transistor Q110 varies the dc control voltages applied to the RF PA at U105 pin 3, thus controlling the RF power of module (U105).

Thermistor RT101 senses the temperature of the TX ALC IC. If an abnormal operating condition exists, which causes the PA slab temperature to rise to an unacceptable level, the thermistor forces the ALC to reduce the set power.

Page 37

Notes

Page 38

800MHz T ransceiver Board

Detailed Theory of Operation 6

Introduction This section of the manual provides a detailed circuit description of an

ASTRO Digital SABER 800MHz Transceiver Board. When reading the theory of operation, refer to your appropriate schematic and component location diagrams located in the back section of this manual. This detailed theory of operation will help isolate the problem to a particular component. However, ﬁrst use the ASTRO Digital SABER Portable Radios Basic Service Manual to troubleshooting the problem to a particular board.

Frequency Synthesis The complete synthesizer subsystem consists of the reference oscillator

(U304), the voltage controlled oscillator (VCO), U307, a buffer IC (U303), and the synthesizer (U302).

The reference oscillator contains a temperature-compensated

16.8MHz crystal. This oscillator is digitally tuned and contains a

temperature-referenced 5-bit analog-to-digital (A/D) converter. The output of the oscillator (pin 10 on U304) is applied to pin 14 (XTAL1) on U302 via capacitor C309 and resistor R306.

Module U307 is the voltage controlled oscillator, which is varactor tuned. That is, as the voltage (2-11V) being applied to pins 1 and 7 of the VCO varies, so does the varactor’s capacitance, thereby changing the VCO’s output frequency. The 800MHz VCO is a dual-range oscillator that covers the 806-825MHz and the 851-870MHz frequency bands. The low-band VCO (777-825MHz) provides the ﬁrst LO injection frequencies (777-797MHz) that will be 73.35MHz below the carrier frequency. In addition, when the radio is operated through a repeater, the low-band VCO will generate the transmit frequencies (806-825MHz) that will be 45MHz below the receiver frequencies. The low-band VCO is selected by pulling pin 3 high and pin 8 low on U307. When radio-to-radio or talk-around operation is necessary, the high band VCO (851-870MHz) is selected. This is accomplished by pulling pin 3 low and pin 8 high on U307.

The buffer IC (U303) includes a TX, RX, and prescaler buffer whose main purpose is to individually maintain a constant output and provide isolation.The TX buffer is chosen by setting pin 7 of U303 high; the RX buffer is chosen by setting pin 7 of U303 low. The prescaler buffer will always be on. In order to select the proper combination of VCO and buffer, the following conditions must be true at pin 6 of U303 (or pin 38 of U302) and pin 7 of U303 (or pin 39 of U302). For the ﬁrst LO injection frequencies 777-797MHz, pins 6 and 7 must both be low; for the TX repeater frequencies 806-825MHz pins

Page 39

6 and 7 must both be high. For talkaround TX frequencies 851870MHz, pin 6 must be low while pin 7 must be high.

The synthesizer IC (U303) consists of a prescaler, a programmable loop divider, a divider control logic, a phase detector, a charge pump, an A/D converter for low-frequency digital modulation, a balance attenuator to balance the high frequency analog modulation to the low frequency digital modulation, a 13V positive-voltage multiplier, a serial interface for control, and ﬁnally a ﬁlter for the regulated ﬁve volts. This ﬁltered ﬁve volts is present at pin 19 of U302, pin 9 of U307, and pins 2, 3, 4, and 15 of U303. It is also applied directly to resistors R309, R315, and R311. Additionally, the 13V, being generated by the positive voltage multiplier circuitry, should be present at pin 35 of U302. The serial interface (SRL) is connected to the microprocessor via the data line (pin 2 of U302), clock line (pin 3 of U302), and chip enable line (pin 4 of U302).

The complete synthesizer subsystem works as follows. The output of the VCO, pin 4 on U307, is fed into the RF input port (pin 9) of U303. In the TX mode, the RF signal will be present at pin 4 of U303. On the other hand, in the RX mode, the RF signal will be present at pin 3 of U303. The output of the prescaler buffer, pin 15 on U303, is applied to the PREIN port (pin 21) of U302. The prescaler in U302 is a dualmodulus type with selectable divider ratios. This divider ratio is controlled by the loop divider, which in turn receives its inputs via the SRL. The loop divider adds or subtracts phase to the prescaler divider by changing the divide ratio via the modulus control line. The output of the prescaler is then applied to the loop divider. The output of the loop divider is then applied to the phase detector . The phase detector will then compare the loop divider’s output signal with the signal from U304 (that is divided down after it is applied to pin 14 of U302). The result of the signal comparison is a pulsed dc signal which is applied to the charge pump. The charge pump outputs a current that will be present at pin 32 of U302. The loop ﬁlter (which consists of capacitors C322, C317, C318, C329, C324, and C315, and resistors R307, R305, and R314) will transform this current into a voltage that will be applied to pins 1 and 7 of U307, and alter the VCO’s output frequency.

Antenna Switch Switching between the standard and external antenna ports is

In order to modulate the PLL, the two-port modulation method is utilized. The analog modulating signal is applied to the A/D converter as well as the balance attenuator, via U302 pin 5. The A/D converter converts the low-frequency analog modulating signal into a digital code that is applied to the loop divider, thereby causing the carrier to deviate. The balance attenuator is used to adjust the VCO’s deviation sensitivity to high-frequency modulating signals.

accomplished with the external mechanical switch which is actuated by a plunger located on the accessory connector.

An electronic PIN diode switch steers RF between the receiver and transmitter. The common node of the switch is at capacitor C101. In the transmit mode, RF is routed to the anode of diode CR104. In receive mode, RF is routed to pin 1 of U201. In transmit, bias current sourced from U504 pin 21, is routed through PIN diodes CR104 and

Page 40

CR102, biasing them to a low-impedance state. Bias current returns to ground through U504 pin 20. In receive, U504 pin 21 is pulled down to ground and pin 20 is pulled up to B+, reverse biasing diodes CR104 and CR102 to a high impedance.

Receiver Front End For the purposes of this discussion, the receiver front end is deﬁned to

be the circuitry from the antenna switch to the output of the IF crystal ﬁlter. The 800MHz front end is designed to convert the received RF signal to the 1st IF frequency of 73.35MHz, while at the same time providing for spurious immunity and adjacent channel selectivity. A review of the interstage components of the front end will now be presented with emphasis on troubleshooting considerations.

The received RF signal is passed through the antenna switch input matching components C101, L105, and C114 tank components C106 and L103 (which are anti-resonant at the radios transmitter frequencies), and output matching components C103 and L104. Both pin diodes CR102 and CR104 must be back biased to properly route the received signal.

The stage following the antenna switch is a 50-ohm, inter-digitated, 3pole, stripline preselector (U201). The preselector is positioned after the antenna switch to provide the receiver preamp some protection to strong signal, out-of-band signals.

After the preselector (U201), the received signal is processed through the receiver preamp, U202. The preamp is a dual-gate GaAs MESFET transistor which has been internally biased for optimum IM, NF, and gain performance. Components L201 and L202 match the input (gate

1) of the amp to the ﬁrst preselector, while at the same time

connecting gate 1 to ground potential. The output (drain) of the amp is pin 3 and is matched to the subsequent receiver stage via components L204, C205 and C222. A supply voltage of 5Vdc is provided to pin 3 via an RF choke L203 and bypass C204. The 5 volt supply is also present at pin 4 which connects to a voltage divider network that biases gate 2 (pin 5) to a predeﬁned quiescent voltage of

1.2Vdc. Resistor R202 and capacitor C203 are connected to pin 5 to

provide amp stability. The FET source (pin 7) is internally biased at

0.55 to 0.7Vdc for proper operation with bypass capacitors C201 and

C202 connected to the same node. The output of the amp is matched to a second 3-pole preselector

(U203) of the type previously discussed. The subsequent stage in the receiver chain is the 1st mixer U205, which uses low-side injection to convert the RF carrier to an intermediate frequency (IF) of 73.35MHz. Since low-side injection is used, the LO frequency is offset below the RF carrier by 73.35MHz, or Flo = Frf - 73.35MHz. The mixer utilizes GaAs FETs in a double balanced Gilbert Cell conﬁguration. The LO port (pin 8) incorporates an internal buffer and a phase shift network to eliminate the need for a LO transformer. The LO buffer bypass capacitors (C208, C221, and C216) are connected to pin 10 of U205, and should exhibit a nominal dc voltage of 1.2 to 1.4Vdc. Pin 11 of U205 is LO buffer Vdd (5Vdc) with associated bypass capacitors C226 and C209 connected to the same node. An internal voltage divider network within the LO buffer is bypassed to virtual ground at pin 12

Page 41

of U205 via bypass C213. The mixer’s LO port is matched to the radio’ s PLL by a capacitive tap, C207 and C206. A balun transformer (T202) is used to couple the RF signal into the mixer. The primary of T202 is matched to the preceding stage by capacitor C223, with C227 providing a dc block to ground. The secondary of T202 provides a differential output, with a 180° phase differential being achieved by setting the secondary center tap to virtual ground using bypass capacitors C210, C211 and C212. The secondary of transformer T202 is connected to pins 1 and 15 of the mixer IC, which drives the source leg of dual FETs used to toggle the paralleled differential ampliﬁer conﬁguration within the Gilbert Cell.

The ﬁnal stage in the receiver front end is a 2-pole crystal ﬁlter (FL1). The crystal ﬁlter provides some of the receiver’s adjacent channel selectivity. The input to the crystal ﬁlter is matched to the 1st mixer using components L605, C611 and C614. The output of the crystal ﬁlter is matched to the input of IF buffer ampliﬁer transistor Q601 by components L600, C609, and C610.

Receiver Back End The IF frequency on the collector of Q601 is applied to a second crystal

ﬁlter (FL2) through a matching circuit consisting of L601, L602, C604, and C612. The ﬁlter supplies further attenuation at the IF sidebands to increase the radio’s selectivity. The output of FL2 is routed to pin 32 of U401 through a matching circuit which consists of L603, C605, and C606 and dc block capacitor C613.

The second LO/VCO is a Colpitts oscillator built around transistor Q1. The VCO has a varactor diode (VR401), which is used to the adjust the VCO frequency. The control signal for the varactor is derived from a loop ﬁlter consisting of C426, C428, and R413.

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Transmitter The 800MHz RF power ampliﬁer (P A) is a 5-stage ampliﬁer (U502). The

RF power ampliﬁer has a nominal input and output impedance of 50 ohms.

An RF input drive level of approximately +3dBm, supplied from the VCO buffer IC (U303), is applied to pin 1 of U502. The dc bias for the internal stages of U502 is applied to pins 2, 5, and 6 of the module. Pins 2 and 5 being switched through Q502 and pin 6 being unswitched B+ to the ﬁnal ampliﬁer stage. Power control is achieved through the varying of the dc bias to pins 3 and 4, the third and fourth ampliﬁer stages of the module. The ampliﬁed RF signal leaves the PA module via pin 7 and is applied to the directional coupler (U501).

The purpose of U501 is to sample both the forward power and the reverse power. The reverse power will be present when there is other than a 50-ohm load at the antenna port. The sampling will be achieved by coupling some of the reﬂected power, forward and/or reverse, to a coupled leg on the coupler. The sampled RF signals are applied to diode CR501 for rectiﬁcation and summing. The resultant dc signal is applied to the ALC IC (U504 pin 2) as RFDET to be used as an strength indicator of the RF signal being passed through the directional coupler (U501).

The transmit ALC IC (U504) is the heart of the power control loop. The REF V line (U504 pin 7), a dc signal supplied from the D/A IC (U503), and the RF DET signal described earlier, are compared internally in the ALC IC to determine the amount of C BIAS, pin 4, to be applied to the base of transistor Q501. Transistor Q501 responds to the base drive level by varying the dc control voltages applied to pin 3 and 4 of the RF PA, controlling the RF power level of module, U502. The ALC IC also controls the base switching to transistor Q502 via pin 12, BIAS.

The D/A IC (U503) controls the dc switching of the transceiver board. Its outputs, SC1 and SC3, pins 12 and 14 respectively, control transistor Q503, which then supplies TX 5V and RX 5V to the transceiver board. The D/A also supplies the dc bias to the detector diode (CR501) via pin 7, and the REF V signal to the ALC IC (U504).

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Notes

Page 44

VOCON Board

Detailed Theory of Operation 7

Introduction This section of the manual provides a detailed circuit description of an

ASTRO Digital SABER VOCON (Vocoder/Controller) Board. When reading the theory of operation, refer to your appropriate schematic and component location diagrams located in the back section of this manual. This detailed theory of operation will help isolate the problem to a particular component. However, ﬁrst use the ASTRO Digital SABER Portable Radios Basic Service Manual to troubleshooting the problem to a particular board.

General The VOCON board consists of two subsystems:

• vocoder

• controller

Although these two subsystems share the same printed circuit board and work closely together, it helps to keep their individual functionality separate in describing the operation of the radio.

The controller section is the central interface between the various subsystems of the radio. It is very similar to the digital logic portion of the controllers on many existing Motorola radios. Its main task is to interpret user input, provide user feedback, and schedule events in the radio operation, which includes programming ICs, steering the activities of the DSP and driving the display.

The vocoder section performs the functions which previously were performed by analog circuitry. This includes all tone signaling, trunking signalling, and conventional analog voice, etc. All analog signal processing is done digitally utilizing a DSP56001. In addition it provides a digital voice plus data capability utilizing VSELP or IMBE voice compression algorithms. Vocoder is a general term used to refer to these DSP based systems and is short for voice encoder.

In addition, the VOCON board provides the interconnect between the microcontrol unit (MCU), DSP, and the encryption board on secureequipped radios.

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Controller Section Refer to Figure 4 and your speciﬁc schematic diagram.

The controller section of the VOCON board consists entirely of digital logic comprised of a microcontrol unit (MCU-U204), a custom support logic IC (SLIC-U206), and memory consisting of: SRAM (U202), EEPROM (U201), and FLASH memory (U205, U210).

The MCU (U204) memory system is comprised of a 32k x 8 SRAM (U202), 32k x 8 EEPROM (U201), and 512k x 8 FLASH ROM (U205,U210). The MCU also contains 1024 bytes of internal SRAM and 512 bytes of internal EEPROM. The EEPROM memory is used to store customer speciﬁc information and radio personality features. The FLASH ROM contains the programs which the HC11F1 executes. The FLASH ROM allows the controller ﬁrmware to be reprogrammed for future software upgrades or feature enhancements. The SRAM is used for scratchpad memory during program execution.

The SLIC (U206) performs many functions as a companion IC for the MCU. Among these are expanded input/output (I/O), memory decoding and management, and interrupt control. It also contains the universal asynchronous receiver transmitter (UART) used for the RS232 data communications. The SLIC control registers are mapped into the MCU (U204) memory space.

U201

32Kx8

EEPROM

U202 32Kx8 SRAM

U205

256Kx8 FLASH

U210

256Kx8

FLASH

HC11/DSP

Interface

1024 Bytes

SRAM

Address/Data/

Control

U204

MC68HC11F1

Resets

U206

SLIC IV

Address/Data/

Control

Chip Selects/ Bank Control

512 Bytes EEPROM

Purpose I/O

Clocks

Purpose I/O

SCI

SPI

General

A/D

Controls

General

RS232

Figure 4 . VOCON Board - Controller Section

Universal Connector

Transceiver/Display

ADSIC

Universal Connector

MAEPF-24337-O

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The controller performs the programming of all peripheral ICs. This is done through a serial peripheral interface (SPI) bus. ICs programmed through this bus include the synthesizer, DAIC, reference oscillator, display , and ADSIC. On secure-equipped model, the encryption board is also controlled through the SPI bus.

In addition to the SPI bus, the controller also maintains two asynchronous serial busses; the SB9600 bus and an RS232 serial bus. The SB9600 bus is for interfacing the controller section to different hardware option boards, some of which may be external to the radio. The RS232 is used for the function of a common data interface for external devices.

User input is handled by the controller through top rotary controls and side buttons. On models with a display , an additional 3 x 2 or 3 x 6 keypad are also read. User feedback is provided by a single bicolor LED on the top and a two-line, fourteen-character display if equipped.

The controller schedules the activities of the DSP through the host port interface. This includes setting the operational modes and parameters of the DSP. The controlling of the DSP is analogous to programming analog signaling ICs on standard analog radios.

Vocoder Section Refer to Figure 5 and your speciﬁc schematic diagram.

The vocoder section of the VOCON board is made up of a digital signal processor (DSP-U405), 24k x24 static-RAM (SRAMs-U414, U403, and U402), 256kB FLASH ROM (U404), ABACUS/DSP support IC (ADSICU406), and an audio PA (U401).

The FLASH ROM (U404) contains the program code executed by the DSP . As with the FLASH ROM used in the controller section, the FLASH ROM is reprogrammable so new features and algorithms can be updated in the ﬁeld as they become available. Depending on the mode and operation of the DSP, corresponding program code is moved from the FLASH ROM into the faster SRAM, where it is executed at full bus rate.

The ADSIC (U406) is basically a support IC for the DSP. It provides among other things, the interface from the digital world of the DSP to the analog world. The ADSIC also provides some memory management and provides interrupt control for the DSP processing algorithms. The conﬁguration programming of the ADSIC is performed by the MCU. However some components of the ADSIC are controlled through a parallel memory mapped register bank by the DSP.

In the receive mode, The ADSIC (U406) acts as an interface to the ABACUS IC, which can provide IF data samples directly to the DSP for processing. Or the IF data can be ﬁltered and discriminated by the ADSIC and data provided to the DSP as raw discriminator sample data. The latter mode, with the ADSIC performing the IF ﬁltering and discrimination, is the typical mode of operation.

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U402 8Kx24 SRAM

U403 8Kx24 SRAM

U414 8Kx24 SRAM

U404

256Kx8 FLASH

In the transmit mode, the ADSIC (U406) provides a serial digital-toanalog (D/A) converter. The data generated by the DSP is ﬁltered and reconstructed as an analog signal to present to the VCO as a modulation signal. Both the transmit and receive data paths between the DSP and ADSIC are through the DSP SSI port.

The only analog device in the vocoder section is the audio PA (U401). This IC is an audio ampliﬁer for the microphone analog input and speaker analog output. The audio PA allows steering between the internal and external microphone and internal and external speaker. Steering is accomplished through four control lines provided by the ADSIC and controlled by the DSP through the ADSIC parallel registers.

The ampliﬁed microphone signal is provided to the ADSIC, which incorporates an analog-to-digital (A/D) converter to translate the analog waveform to a series of data. The data is available to the DSP through the ADSIC parallel registers. In the converse way, the DSP writes speaker data samples to a D/A in the ADSIC, which provides an analog speaker audio signal to the audio PA.

HC11/DSP

A0-A15

D0-D23

BUS

CONTROL

MODB

MODA

U405

DSP56001

EXTAL

Host

Port

SCI

SERIAL

SSI

SERIAL

Interface

Encryption

Interface

Gata Array

General

Purpose I/O

Speaker

Figure 5 . VOCON Board - Vocoder Section

Logic

D/A

System

Clock

U406

ADSIC

Microphone

A/D

Tx D/A

ABACUS Rx

Interface

Serial

Config.

Audio PA

Modulation

Out

ABACUS

Interface

HC11

SPI

External

Microphone

Internal

Microphone

U401

External Speaker

Internal

Speaker

MAEPF-24338-O

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Switched Regulator All of the digital circuitry on the VOCON is supplied 5 volt regulated

dc by a switched mode regulator (refer to Figure 3 on page 5 of Chapter

4). The fundamental parts of the regulator are U409, L402, C470, CR403, C463, and U407. Module U409 is a pulse width modulating (PWM) switched regulator controller. Coil L402 is an energy storage element, C470 is an output ripple ﬁlter, and CR403 is a Schottky diode switch. Capacitor C463 is added for UNSW_B+ ripple ﬁlter and is necessary for stability of the regulator. Module U407 is a supply supervisory IC, which provides a system reset function when the output of the regulator falls out of regulation, typically around 4.6Vdc.

This switched mode regulator works by supplying just sufﬁcient energy to the storage element to maintain the output power of the regulator at 5Vdc. It can be related to a ﬂywheel in the sense that just enough energy can be added to a spinning ﬂywheel to keep it spinning at a constant speed. In contrast to a typical linear type regulator, which basically shunts unused current to ground through an active resistive divider . The switched mode regulator is much more energy efﬁcient. It can be noted that input current to the regulator is less than the load current. In fact, as input voltage to the regulator goes up, current supplied to the regulator actually goes down for a constant load.

Module U409 works off of a clock with a nominal operating frequency of 160kHz (kit number NTN7749E), or 260kHz (kit numbers NTN7749F and NTN7749G). This may vary a little based on the load and input voltage. It maintains regulation by varying the duty cycle of a clock output driving L402. This signal is referred to as Lx on U409 (refer to Waveform W1). As long as the clock output is high, current ﬂows from the supply into L402 allowing energy to be stored. When the clock output goes low , the diode CR403 conducts, allowing current to continue to ﬂow from ground through L402. A pulse width on the Lx signal can be obtained, which provides the correct amount of energy to keep the output in regulation. Capacitor C470 is an output ﬁlter to reduce ripple on the output from the clock transitions.

Module U409 is supplied directly from the unswitched battery supply. It is turned on and off through the control line connected to SHDN*/ ON/OFF. This is the same control line from the MCU, which controls the series pass element Q207, which switches SW_B+. A voltage level of approximately 2Vdc is required to turn the regulator on.

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RX Signal Path The vocoder processes all received signals digitally. This requires a

unique back end from a standard analog radio. This unique functionality is provided by the ABACUS IC with the ADSIC (U406) acting as the interface to the DSP. The ABACUS IC located on the transceiver board provides a digital back end for the receiver section. It provides a digital output of I (In phase) and Q (Quadrature) data words which represent the IF (Intermediate Frequency) signal at the receiver back end (refer to appropriate transceiver section for more details on ABACUS operation). This data is passed to the DSP through an interface with the ADSIC (U406) for appropriate processing.

The ADSIC interface to the ABACUS is comprised of the four signals SBI, DIN, DIN*, and ODC (refer to Figure 6).

IRQB

DSP56001

U405

SSI

SERIAL

SRD

SC0 SC1 SC2

SCK

STD

8KHz

D8-D23

A0-A2,A13-A15,RD*,WR*

2.4 MHz Receive Data Clock 20 KHz RX Data Interrupt

48KHz TX Data Interrupt

1.2 MHz Tx Data Serial Clock Serial Receive Data

Serial Transmit Data

IRQB

SCKR

RFS TFS SCKT RXD TXD

Figure 6 . DSP RSSI Port - RX Mode

NOTE: An asterisk symbol (*) next to a signal

name indicates a negative or NOT logic true signal.

ADSIC

U406

SDO

SBI DIN

DIN-

IDC

GCB0-GCB3

SBI

Data In Data In* ODC

MAEPF-24339-O

Audio PA

U401

ABACUS II

Interface

J401-4

J401-2 J401-1

J401-8

ODC is a clock ABACUS provides to the ADSIC. Most internal ADSIC functions are clocked by this ODC signal at a rate of 2.4MHz and is available as soon as power is supplied to the circuitry . This signal may initially be 2.4 or 4.8MHz after power-up. It is programmed by the ADSIC through the SBI signal to 2.4MHz when the ADSIC is initialized by the MCU through the SPI bus. For any functionality of the ADSIC to exist, including initial programming, this reference clock must be present. SBI is a programming data line for the ABACUS. This line is used to conﬁgure the operation of the ABACUS and is driven by the ADSIC. The MCU programs many of the ADSIC operational features through the SPI interface. There are 36 conﬁguration registers in the ADSIC of which four contain conﬁguration data for the ABACUS. When these particular registers are programmed by the MCU, the ADSIC in turn sends this data to the ABACUS through the SBI.

Page 50

DIN and DIN* are the data lines in which the I and Q data words are transferred from the ABACUS. These signals make up a deferentially encoded current loop. Instead of sending TTL type voltage signals, the data is transferred by ﬂowing current one way or the other through the loop. This helps reduce internally generated spurious emissions on the transceiver board. The ADSIC contains an internal current loop decoder which translates these signals back to TTL logic and stores the data in internal registers.

In the fundamental mode of operation, the ADSIC transfers raw IF data to the DSP. The DSP can perform IF ﬁltering and discriminator functions on this data to obtain a baseband demodulated signal. However, the ADSIC contains a digital IF and discriminator function and can provide this baseband demodulated signal directly to the DSP , this being the typical mode of operation. The internal digital IF ﬁlter is programmable up to 24 taps. These taps are programmed by the MCU through the SPI interface.

The DSP accesses this data through its SSI serial port. This is a 6 port synchronous serial bus. It is actually used by the DSP for both transmit and receive data transferal, but only the receive functions will be discussed here. The ADSIC transfers the data to the DSP on the SRD line at a rate of 2.4MHz. This is clocked synchronously by the ADSIC which provides a 2.4MHz clock on SC0. In addition, a 20kHz interrupt is provided on SC1 signaling the arrival of a data packet. This means a new I and Q sample data packet is available to the DSP at a 20kHz rate which represents the sampling rate of the received data. The DSP then processes this data to extract audio, signaling, etc. based on the 20kHz interrupt.

In addition to the SPI programming bus, the ADSIC also contains a parallel conﬁguration bus consisting of D8-D23, A0-A2, A13-A15, RD*, and WR*, This bus is used to access registers mapped into the DSP memory starting at Y:FFF0. Some of these registers are used for additional ADSIC conﬁguration controlled directly by the DSP. Some of the registers are data registers for the speaker D/A. Analog speaker audio is processed through this parallel bus where the DSP outputs the speaker audio digital data words to this speaker D/A and an analog waveform is generated which is output on SDO (Speaker Data Out). In conjunction with the speaker D/A, the ADSIC contains a programmable attenuator to set the rough signal attenuation. However, the ﬁne levels and differences between signal types is adjusted through the DSP software algorithms. The speaker D/A attenuator setting is programmed by the MCU through the SPI bus.

The ADSIC provides an 8kHz interrupt to the DSP on IRQB for processing the speaker data samples. IRQB is also one of the DSP mode conﬁguration pins at start up. This 8kHz signal must be enabled through the SPI programming bus by the MCU and is necessary for any audio processing to occur.

For secure messages, the analog signal data may be passed to the secure module prior to processing speaker data for decryption. The DSP transfers the data to and from the secure module through it's SCI port consisting of TXD and RXD. The SCI port is a two wire duplex asynchronous serial port. Conﬁguration and mode control of the secure module is performed by the MCU through the SPI bus.

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The ADSIC contains four general purpose I/O labeled GCB0 -GCB3. These are connected to the AUDIO PA and are used for enabling the speaker and microphone ampliﬁers in the IC and for steering the speaker and microphone audio paths from internal to external. These I/O are controlled by the DSP through the ADSIC parallel conﬁguration bus. The DSP then writes speaker data samples to the speaker D/A register through the parallel bus at an 8kHz rate and conﬁgures the AUDIO PA enable lines by writing the same bus to the register controlling the I/O.

The audio PA provides about 20dB of gain and a dual ended differential output; SPKR_COMMON, and EXT_SPKR or INT_SPKR. Internal or external speaker drive is achieved by changing the phase of the outputs on INT_SPKR and EXT_SPKR to be either in phase or out of phase with SPKR_COMMON. The signal which is out of phase with SPKR_COMMON will be driven.

Since all of the audio and signaling is processed in DSP software algorithms, all types of audio and signaling follow this same path.

TX Signal Path The transmit signal path follows some of the same design structure as

the receive signal path described above in section D (refer to Figure 7). It is advisable to read through the section on RX Signal Path prior to this section.

IRQB

DSP56001

U405

SSI

SERIAL

SC0

SC1

SC2 SCK SRD

STD

8KHz

D8-D23

A0-A2,A13-A15,RD*,WR*

2.4 MHz Receive Data Clock 20 KHz RX Data Interrupt

48KHz TX Data Interrupt

1.2 MHz Tx Data Serial Clock Serial Receive Data

Serial Transmit Data

IRQB

SCKR RFS

TFS SCKT

RXD

TXD

ADSIC

U406

MAI

VVO

SBI

DIN

DIN-

IDC

GCB0-GCB3

MODIN

SBI

Data In

Data In*

ODC

MAEPF-24340-O

Audio PA

U401

J401-15

ABACUS II

Interface

J401-4 J401-2

J401-1

J401-8

Figure 7 . DSP RSSI Port - TX Mode

The ADSIC contains a microphone A/D with a programmable attenuator for coarse level adjustment. As with the speaker D/A attenuator, the microphone attenuator value is programmed by the MCU through the SPI bus. The analog microphone signal from the Audio PA (U401) is input to the A/D on MAI (Mic Audio In). The microphone A/D converts the analog signal to a series of data words and stores them in internal registers. The DSP accesses this data through the parallel data bus parallel conﬁguration bus consisting of D8-D23, A0-A2, A13-A15, RD*, and WR*. As with the speaker data

Page 52

samples, the DSP reads the microphone samples from registers mapped into it's memory space starting at Y:FFF0. The ADSIC provides an 8kHz interrupt to the DSP on IRQB for processing these microphone data samples.

As with the received trunking low speed data, low speed data is processed by the MCU and returned to the DSP at the DSP SCLK port connected to the MCU port PA0.

For secure messages, the analog signal may be passed to the secure module for encryption prior to further processing. The DSP transfers the data to and from the secure module through it's SCI port consisting of TXD and RXD. Conﬁguration and mode control of the secure module is performed by the MCU through the SPI bus.

The DSP processes these microphone samples and generates and mixes the appropriate signaling and ﬁlters the resultant data. This data is then transferred to the ADSIC IC on the DSP SSI port. The transmit side of the SSI port consists of SC2, SCK, and STD. The DSP SSI port is a synchronous serial port. SCK is the 1.2MHz clock input derived from the ADSIC which makes it synchronous. The data is clocked over to the ADSIC on STD at a 1.2MHz rate. The ADSIC generates a 48kHz interrupt on SC2 so that a new sample data packet is transferred at a 48kHz rate and sets the transmit data sampling rate at 48Ksp. These samples are then input to a transmit D/A which converts the data to an analog waveform. This waveform is actually the modulation out signal from the ADSIC port VVO and is connected directly to the VCO. The transmit side of the transceiver is virtually identical to a standard analog FM radio.

Also required is the 2.4MHz ODC signal from the ABACUS IC. Although the ABACUS IC provides receiver functions it is important to note that this 2.4MHz reference is required for all of the ADSIC operations.

Page 53

Controller Bootstrap and Asynchronous Buses

The SB9600 bus is an asynchronous serial communications bus utilizing a Motorola proprietary protocol. Its purpose is a means for the MCU to communicate with other hardware devices. In the ASTRO Digital SABER radio, it communicates with hardware accessories connected to the universal connector.

The SB9600 bus utilizes the UART internal to the MCU operating at 9600 baud. The SB9600 bus consists of a LH_DATA (J201-4) and SB9600_BUSY (J201-6) signals. LH_DATA is actually the SCI TXD and RXD ports (U204 - PD0 and PD1) tied together through the MUX U208 (see Figure 8). This makes the bus a simplex single-wire system. SB9600_BUSY (U204 - PA3) is an active low signal, which is pulled low when a device wants control of the bus.

J201-15

SB9600_BUSY

J201-4

LH_DATA/BOOT_DATA_OUT

J201-15

RS232_DATA_OUT/BOOT_DATA_IN

J201-8

RS232_DATA_IN

J201-14

CTSOUT*

J201-10

RTS_IN*

U208

SLIC IV

U206

BOOT_DATA_OUT

BOOT_DATA_IN

PA3

HC11F1

U204

PD1 (TXD)

PD0 (RXD)

SLIC IV

U206

RXDIN

PJ3

RTSBIN

Figure 8 . Host SB9600 and RS232 Ports

MAEPF-24341-O

The same UART internal to the MCU is used in the controller bootstrap mode of operation. This mode is used primarily in downloading new program code to the FLASH ROMs on the VOCON board. In this mode, the MCU accepts special code downloaded at 7200 baud through the SCI bus instead of operating from program code resident in its ROMs. It however must operate in a two wire duplex conﬁguration.

A voltage applied to J201-13 (Vpp) of greater than 10 Vdc will trip the circuit consisting of Q203, Q204, and VR207. This circuit sets the MODA and MODB pins of the MCU to bootstrap mode (logic 0,0) and conﬁgures the MUX, U208 to separate the RXD and TXD signals of the

Page 54

MCU SCI port. Now if the Vpp voltage is raised to 12Vdc required on the FLASH devices for programming; the circuit comprised of VR208, Q211, and Q208 will trip supplying Vpp to the FLASH devices U205, U210, and U404. One more complication exists in that the BOOT_DATA_IN signal, RXD is multiplexed with the RS232 data out signal RS232_DATA_OUT. This multiplex occurs in the SLIC IV U206, which must also be properly conﬁgured.

The ASTRO Digital SABER radio has an additional asynchronous serial bus which utilizes RS232 bus protocol. This bus utilizes the UART in the SLIC IC (U206). It is comprised of RS232_DATA_OUT (15), RS232_DATA_IN (J201-8), CTSOUT* (J201-14), and RTSIN* (J201-10). It is a two wire duplex bus used to connect to external data devices.

Vocoder Bootstrap The DSP has two modes of bootstrap; from program code stored in the

FLASH ROM U404 or retrieving code from the host port. During normal modes of operation, the DSP executes program code

stored in the FLASH ROM U404. Unlike the MCU, however, the DSP moves the code from the FLASH ROM into the three SRAMs U402, U403, and U414 where it is executed from. Since at initial start-up, the DSP must execute this process before it can begin to execute system code, it is considered a bootstrap process. In this process, the DSP fetches 512 words, 1536 bytes, of code from the FLASH ROM starting at physical address $C000 and moves it into internal P memory. This code contains the system vectors including the reset vector. It then executes this piece of bootstrap code which basically in turn moves additional code into the external SRAMs.

A second mode of bootstrap allows the DSP to load this initial 512 words of data from the host port, being supplied by the MCU. This mode is used for FLASH programming the DSP ROM when the ROM may initially be blank. In addition, this mode may be used for downloading some diagnostic software for evaluating that portion of the board.

The bootstrap mode for the DSP is controlled by three signals; MODA/ IRQA*, MODB/IRQB*, and D23 (kit number NTN8250D), or MODC (kit numbers NTN8250E and NTN8250F). All three of these signals are on the DSP (U405). MODA and MODB conﬁgure the memory map of the DSP when the DSP reset become active. These two signals are controlled by the ADSIC (U406) during power-up, which sets MODA low and MODB high for proper conﬁguration. Later these lines become interrupts for analog signal processing. D23/MODC controls whether the DSP will look for code from the MCU or will retrieve code from the FLASH ROM. D23 high, or MODC low out of reset, will cause the DSP to seek code from the FLASH ROM (U404). For the second mode of bootstrap, the MCU drives BOOTMODE low , causing D23 to go low and MODC to go high.

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SPI Bus Interface This bus is a synchronous serial bus made up of a data, a clock, and an

individual IC unique select line. It's primary purpose is to conﬁgure the operating state of each IC. ICs programmed by this include; display module, ADSIC, Fractional N Synthesizer, Pendulum Reference Oscillator, DAIC, and if equipped, the secure module.

The MCU (U204) is conﬁgured as the master of the bus. It provides the synchronous clock (SPI_SCK), a select line, and data (MOSI [Master Out Slave In]). In general the appropriate select line is pulled low to enable the target IC and the data is clocked in. Actually the SPI bus is a duplex bus with the return data being clocked in on MISO (Master In Slave Out). The only place this is used is when communicating with the secure module. In this case, the return data is clocked back to the MCU on MISO (master in slave out).

Universal Connector and Option Selects

1. Speaker Common

2. External Speaker

3. LH data/ Boot data out

4. External MIC

5. CTSOUT*

6. SB9600 Busy

7. Option Select 1

8. Opt B+/ Boot Sel/ Vpp

9. RTSIN*/ Keyfail

10. Opt sel2 (Keyload)

11. RS232 data out/ Boot data in

12. RS232 data in

VOCON BOARD CONNECTOR

J201-1 N.C J201-2 N.C. J201-3 N.C. J201-4 LH_DATA/BOOT_DATA_OUT J201-5 Ext Mic J201-6 SB9600_BUSY J201-7 Option Select 1 J201-8 RS232_DATA_IN J201-9 Option Sel 2 (Keyload*) J201-10 RTSIN*/KEYFAIL* J201-11 Speaker Common J201-12 External Speaker J201-13 OPTB+/Boot Sel/Vpp J201-14 J201-15 RS232 Data Out/ Boot Data In

The universal connector is located on the back of the radio. It is the external port or interface to the outside and is used for programming and interfacing to external accessories. The signals are outlined in the following diagram. The universal connector connects to the VOCON board at J201 through a ﬂex circuit routed down the back of the external housing. Connections to the universal connector and J201 on the VOCON board are shown in Figure 9 and Figure 10.

SIGNAL NAMES

10 11

VIEW FROM BACK OF

RADIO

MAEPF-24343-O

Figure 9 . Universal Connector

214

115

CTSOUT*

MAEPF-24344-O

Figure 10 . VOCON Board Connector - J201

Page 56

Most of the signals are extensions of circuits described in other areas of this manual. However there are two option select pins used to conﬁgure special modes; Option Select 1 and Option Select 2. These pins are controlled by accessories connected to the universal connector. The following table outlines their functions as deﬁned at the universal connector:

Table 1 . Option Select Functions

Opt Sel 1 Opt Sel 2

Keyload 10 No Function 1 1 External PTT 01

Keypad and Display Module

The front cover assembly contains the internal speaker, and internal microphone. An optional integral 2 line by 14 character LCD display is available with either a 3 x 2 keypad or 3 x 6 keypad. This unit is not considered ﬁeld repairable.

The internal speaker and microphone are connected to the VOCON connector J701 through a ﬂex circuit. This ﬂex circuit along with J701 also contain the keypad control lines. The keypad is read though a row and column matrix made up of ROW1, ROW2, ROW3, ROW4, ROW5, ROW6, and COL1, COL2, and COL3. These signals are input to I/O ports on the SLIC (U206) and individually pulled to a high state through resistors. When a key is pressed the respective signals for a single row and a single column are set to logic zero. The MCU reads these ports through the SLIC parallel registers, provides for key debounce, and determines which key has been pressed.

The display is controlled by the MCU which programs the display through the SPI bus, DISP_EN* (select) and DISP_RST*. In addition display backlighting is provided by two white LEDs controlled by the BL_EN signal. SW_B+ routed to the display is used to power these LEDs. All other circuitry on the display is powered by 5Vdc provided by the VOCON board. The display is connected to the VOCON board at J601 through a separate ﬂex circuit.

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Controls and Control Top Flex

The control top controls include an on/off switch, volume, 16 position mode select switch with two position toggle, and ergo code/clear mode switch with additional emergency switch. The side controls include three momentary push button switches (monitor, RAT1, RAT2) and PTT. These components are connected through a ﬂex circuit to the controller at J901, see Figure 11.

To Controller

J901

UNSW_B+ (1)

+5V (5)

PROG_SWITCH (2)

VOL (3)

EMERG (4)

B+_SENSE (10)

GREEN_LED (8)

RED_LED (12)

INT_PTT* (6)

RTA0 (11) RTA1 (13) RTA2 (15)

RTA3 (7)

A/B SWITCH (9)

DGND (14)

S901

ON/OFF

1 2

Zone/Channel

4 8 B

CCA

S902

Select

R901 VOL

CR902

GREEN

CR901

PTT

Figure 11 . Control Top Flex

S903 TOP BUTTON

RED

R902

91K

R903

68K

R904 150K

MAEPF-24345-O

SB1

(MON)

SB2

SB3

UNSW_B+ is routed through S901 to provide the B+_SENSE signal which provides radio power control. Refer to the power distribution section for further details.

Volume control is provides by R901 which is a potentiometer biased between +5Vdc and ground. The VOL signal is a voltage level between +5Vdc and 0Vdc dependent on the position of the rotary knob. VOL is an input to an A/D port on the MCU (U204). The MCU sends the appropriate message to the DSP to adjust speaker volume based on this setting.

Switch S903 is the two-position programmable switch typically used for code or clear mode selection. It is an input to a control I/O with a pull up resistor so the logic defaults high. Selecting clear mode pulls this signal to a logic low. Appropriate operation is conﬁgured by the MCU. In addition, this switch contains an additional momentary button typically used for emergency. This button is connected along with the PTT, and programmable side buttons on a resistor divider network biased between +5Vdc and ground. This network made up of R902, R903, and R904 provides a voltage level to an A/D port on the MCU dependent on which button is pressed. The MCU determines which button is pressed based on the value at the A/D port.

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S902 is a binary coded switch. The output pins from this switch are connected to I/O ports on the controller. It provides a 4 bit binary word to the MCU indicating which of the 16 positions the rotary is set to. This switch provides an additional output, A/B_SWITCH, which effectively doubles its range by providing decoding for two sets of 16 positions. A/B_SWITCH is also read by the MCU on an I/O port.

Controller Memory Map

Figure 12 depicts the controller section memory map for the parallel data bus as used in normal modes of operation. There are three maps available for normal operation, but map 2 is the only one used. In bootstrap mode, the mapping is slightly different and will be addressed later.

The external bus for the host controller (U204)) consists of one 32Kx8 SRAM (U202), one 32Kx8 EEPROM (U201), two 256Kx8 FLASH ROMs (U205, U210), and SLIC (U206) conﬁguration registers. In addition the DSP host port is mapped into this bus through the SLIC address space. The purpose of this bus is to interface the MCU (U204) to these devices.

The MCU executes program code stored in the FLASH ROMs. On a power-up reset, it fetches a vector from $FFFE, $FFFF in the ROMs and begins to execute code stored at this location. The external SRAM along with the internal 1Kx8 SRAM is used for temporary variable storage and stack space. The internal 512 bytes of EEPROM along with the external EEPROM are used for non volatile storage of customer speciﬁc information. More speciﬁcally the internal EEPROM space contains transceiver board tuning information and on power-down some radio state information is stored in the external EEPROM.

The SLIC is controlled through sixteen registers mapped into the MCU memory at $1400 - $14FF. This mapping is achieved by the following signals from the MCU: R/W*, CSIO1*, HA0-HA4,HA8, HA9. Upon power-up, the MCU conﬁgures the SLIC including the memory map by writing to these registers.

The SLIC memory management functions in conjunction with the chip selects provided by the MCU provide the decoding logic for the memory map which is dependent upon the “map” selected in the SLIC. The MCU provides a chip select, CSGEN*, which decodes the valid range for the external SRAM. In addition CSI01* and CSPROG* are provide to the SLIC decoding logic for the external EEPROM and FLASH ROM respectively . The SLIC provides a chip select and banking scheme for the EEPROM and FLASH ROM. The FLASH ROM is banked into the map in 16KB blocks with one 32KB common ROM block. The external EEPROM may be swapped into one of the banked ROM areas. This is all controlled by EE1CS*, ROM1CS*, ROM2CS*, HA14_OUT, HA15_OUT, HA16, and HA17 from the SLIC (U206) and D0-D8 and A0-16 from the MCU (U204).

The SLIC provides three peripheral chip selects; XTSC1B, XTCS2B, and XTCS3B. These can be conﬁgure to drive an external chip select when it's range of memory is addressed. XTSC1B is used to address the host port interface to the DSP. XTSC2B is used to address a small portion of

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external SRAM through the gate U211. XTSCB3 is used as general purpose I/O for interrupting the secure module.

In bootstrap mode the memory map is slightly different. Internal EEPROM is mapped at $FE00-$FFFF and F1 internal SRAM starts at $0000-$03FF . In addition a special bootstrap ROM appears in the ROM space from $B600-$BFFF. For additional information on bootstrap mode refer to the section Controller Bootstrap and Asynchronous Buses.

MAP 2

NON-MUX 32K COMMON

$0000

$1000

$2000

$3000

$4000

$5000

$6000

$7000

$8000

$9000

$A000

$B000

$C000

External

RAM

Int EE

F1 REGS

INT RAM

SLIC REG

HOST PORT

Ext RAM

External

RAM

$0000

$0E00 $1000 $1060

$1400 $1500

$1600

$1800

$3fff

$D000

$E000

$F000

$FFFF

SLIC III REGISTER $1400 - $14FF

F1 REGISTERS AND MEMORY:

COMMON ROM

BANKED ROM/EEPROM

CONTROLLED BY SLIC

RAM

EXTERNAL EEPROM CONTROLLED BY F1

INT RAM: $1060-$13FF INT EE: $0E00-$0FFF REGISTERS: $1000-$105F

MAEPF-24346-O

Figure 12 . Controller Memory Mapping

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Vocoder Memory Map

In bootstrap mode the memory map is slightly different. Internal EEPROM is mapped at $Fe00-$FFFF and F1 internal SRAM starts at $0000-$03fff. In addition a special bootstrap ROM appears in the ROM space from $B600-$BFFF. For additional information on bootstrap mode refer to the section Controller Bootstrap and Asynchronous Buses.

The vocoder (DSP) external bus consists of three 8k x 24 SRAMs (U402, U403, U414), one 256k x 8 FLASH ROM (U404), and ADSIC (U406) conﬁguration registers.

The DSP56001 (U405) has a 24 bit wide data bus (D0-D23) and a 16 bit wide address bus (A0 - A15). The DSP can address three 64k x 24 memory spaces: P (Program), Dx (Data X), and Dy (Data Y). These additional RAM spaces are decoded using PS* (Program Strobe), DS* (Data Strobe), and X/Y*. RD* and WR* are separate read and write strobes.

The ADSIC provides additional memory decoding logic for the RAMs in the form of RSEL* used in decoding U403. RSEL* provides the logic A13 x A14. U415 provides logic in the form of A13 + A14 for decoding U414. RSEL* logic is programmed by the MCU through the SPI bus interface.

The ADSIC also provides memory decoding for the FLASH ROM (U404). EPS* provides the logic A15 x (A14 ≈ A13) and is use as a select for the ROM. The ADSIC provide three bank lines for selecting 16k byte banks from the ROM. This provides decoding for 128K bytes from

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$FFFF

$E000 $DFFF

DyDxP

ADSIC

Registers

ADS Vectors

$A000

$9FFF

$8000

$7FFF

$2000

$1FFF

External ROM

16KB Physical

Banks

$00000-1FFFF

External

RAM

U402

External ROM

16KB Physical

Banks

$20000-3FFFF

External

RAM

U403

External

RAM

U414

$1000

$0FFF $0200 $01FF $0000

ADS P Ram

Internal P Ram

ADS Dx Ram

Internal X Rom

Internal Dx Ram

ADS Dy Ram

Internal Y Rom

Internal Dy Ram

Figure 13 . Vocoder Memory Mapping

the ROM in the P: memory space. PS* is used to select A17 to provide an additional 128k bytes of space in Dx: memory space for the ROM.

The ADSIC internal registers are decoded internally and start at $E000 in Dy:. These registers are decoded using A0-A2, A13-15, and PS* from the DSP. The ADSIC internal registers are 16 bit wide so only D8-D23 are used.

The DSP program code is stored in the FLASH ROM U404. During normal modes of operation, the DSP moves the appropriate program code into the three SRAMs U402, U403, and U414 and internal RAM for execution. The DSP never executes program code from the FLASH ROM itself. At power-up after reset, the DSP downloads 512 words (1536 bytes) from the ROM starting at $C000 and puts it into the internal RAM starting at $0000 where it is executed. This segment of

Page 62

program code contains the interrupt vectors and the reset vector and is basically an expanded bootstrap code. When the MCU messages the DSP that the ADSIC has been conﬁgured, the DSP overlays more code from the ROM into external SRAM and begins to execute it. Overlays occur at different times when the DSP moves code from the ROM into external SRAM depending on immediate mode of operation, such as changing from transmit to receive.

MCU System Clock The MCU (U204) system clock is provided by circuitry internal to the

MCU and is based on the crystal reference, Y201. The nominal operating frequency is 7.3728MHz. This signal is available as a clock at 4XECLK on U204 and is provided to the SLIC (U206) for internal clock timing. The MCU actually operates at a clock rate of 1/4 the crystal reference frequency or 1.8432MHz. This clock is available at ECLK on U204.

The MCU clock contains a crystal warp circuit comprised of L201, Q205, and C228. This circuit is controlled by an I/O port (P A6) on the MCU. This circuit moves the operating frequency of the oscillator about 250ppM on certain receive channels to prevent interference from the MCU bus noise.

DSP System Clock The DSP (U405) system clock, DCLK, is provided by the ADSIC (U406).

It is based off the crystal reference, Y401, with a nominal operating frequency of 33.0000MHz. ADSIC contains an internal clock divider circuit which can divide the system clock from 33MHz to 16.5 or

8.25MHz operation. The DSP controls this divider by writing to the ADSIC parallel registers. This frequency is determined by the processes the DSP is running and is generally conﬁgured to the slowest operating speed possible to reduce system power consumption.

The additional circuitry of CR402, L403, C459, C467, C491, and C490 make up a crystal warp circuit. This circuit is controlled by the OSCw signal from ADSIC which is conﬁgured by the host through the SPI bus. This circuit moves the operating frequency of the oscillator about 400ppM on certain receive channels to prevent interference from the DSP bus noise.

Radio Power-Up/ Power-Down Sequence

Radio power-up begins when the user closes the radio on/off switch on the control top. This enables 7.5Vdc on the B+_SENSE signal. This signal enables the pass element Q207 through Q206 enabling SW_B+ to the VOCON board and transceiver board. B+_SENSE also enables the +5Vdc regulator U409. When +5Vdc has been established, it is sensed by the supervisory IC U407. U407 disables the system reset through the delay circuit R481 and C482.

When the MCU comes out of reset, it fetches the reset vector in ROM at $FFFE, $FFFF and begins to execute the code this vector points to. It conﬁgures the SLIC through the parallel bus registers. Among other things it enables the correct memory map for the MCU. It conﬁgures all the transceiver devices on the SPI bus. The MCU then pulls the ADSIC out of reset and after a minimal delay the DSP also. It then conﬁgures the ADSIC through the SPI bus conﬁguring among other

Page 63

things, the DSP memory map. While this is happening, the DSP is fetching code from the ROM U404 into internal RAM and beginning to execute it. It then waits for a message from the MCU that the ADSIC has been conﬁgured, before going on.

During this process, the MCU does power diagnostics. These diagnostics include verifying the MCU system RAM and verifying the data stored in the internal EEPROM, external EEPROM, and FLASH ROMs. The MCU queries the DSP for proper status and the results of DSP self tests. The DSP self tests include testing the system RAM, verifying the program code in ROM U404, and returning the ADSIC conﬁguration register checksum. Any failures cause the appropriate error codes to be sent to the display. If everything is OK, the appropriate radio state is conﬁgured and the unit waits for user input.

On power-down, the user opens the radio on/off switch removing the B+_SENSE signal from the VOCON board. This does not immediately remove power as the MCU holds this line active through B+_CNTL. The MCU then saves pertinent radio status data to the external EEPROM. Once this is done, B+_CNTL is released shutting off SW_B+ at Q207 and shutting down the 5Vdc regulator U409. When the regulator slumps to about 4.6Vdc, the supervisory IC U407 activates a system reset to the SLIC which in turn resets the MCU.

Page 64

Secure Modules

Introduction The secure modules are designed to digitally encrypt and decrypt voice

and ASTRO data in ASTRO SABER™ radios. This section covers the following secure modules:

• NTN7770 • NTN1152

• NTN7771 • NTN1153

• NTN7772 • NTN1158

• NTN7773 • NTN1147

• NTN7774 • NTN1367

• NTN7329 • NTN1368

• NTN7332 • NTN1369

• NTN7331 • NTN1370

• NTN3330 • NTN1371

• NTN7370 • NTN8967

• NTN1146 NOTE: The secure modules are NOT serviceable. The

information contained in this chapter is only meant to help determine whether a problem is due to a secure module or the radio itself.

The secure module uses a custom encryption integrated circuit (IC) and an encryption key variable to perform its encode/decode function. The encryption key variable is loaded into the secure module, via the radio’s universal (side) connector, from a hand-held, key variable loader (KVL). The encryption IC corresponds to the particular encryption algorithm purchased. The encryption algorithms and their corresponding kit numbers are:

KITS:

DVP NTN7770 DES NTN7771 DES-XL NTN7772 DVI-XL NTN7773 DVP-XL NTN7774 DVI-XL & DVP NTN7329 DES-XL & DVP NTN7332 DES-XL & DVP-XL NTN7731 DVP & DVP-XL NTN7330 DVP-XL & DVI-XL NTN7370 All, except DVP

NTN8967

TANAPAS:

DVP DES NTN1152 DES-XL NTN1153 DVI-XL NTN1158 DVP-XL NTN1147 DVI-XL & DVP NTN1367 DES-XL & DVP NTN1368 DES-XL & DVP-XL NTN1369 DVP & DVP-XL NTN1370 DVP-XL & DVI-XL NTN1371

NTN1146

Page 65

Circuit Description The secure module operates from three power supplies (UNSW_B+,

SW_B+, and +5V). The +5V and the SW_B+ are turned on and off by the radio’s on/off switch. The UNSW_B+ provides power to the secure module as long as the radio battery is in place.

Key variables are loaded into the secure module through connector J601, pin 15. Up to 16 keys (depending on the type of encryption module) can be stored in the module at a time. The key can be inﬁnite key retention or 30-seconds key retention, depending on how the code plug is setup.

The radio’ s host processor communicates with the Secure Module on the Serial Peripheral Interface (SPI) bus. The host processor is the master on this bus, while the secure module is a slave on the bus. The SPI bus consists of ﬁve signal lines. Refer to Table 1 for signal information. A communications failure between the host processor and the secure module will be indicated as an “EE on the radio display.

EERRRRRRRROOOORRRR 00009999////11110000

” message

Troubleshooting Secure Operations

Error 09/10, Error 09/90

Refer to the Basic Service Manual, Motorola publication number 68P81076C05 for disassembly and reassembly information. A key variable loader (KVL) and oscilloscope are needed to troubleshoot the secure module.

NOTE: The secure module itself is not serviceable. If the

secure module is found to be defective, it must be replaced.

The ASTRO Digital XTS 3000 radio automatically performs a self test on every power-up. Should the radio fail the self tests, the display will show “EE If the display shows “EE the secure power-up tests and the host microcontroller was unable to communicate with the secure module via the SPI bus. Turn the radio off and back on. If the radio still does not pass the self tests, then a problem exists with the secure operations of the radio.

Troubleshooting information for “EE Troubleshooting Charts.

EERRRRRRRROOOORRRR 00009999////11110000

EERRRRRRRROOOORRRR 00009999////99990000

” or “EE

EERRRRRRRROOOORRRR 00009999////11110000

” accompanied by a short beep.

EERRRRRRRROOOORRRR 00009999////99990000

” or “EE

EERRRRRRRROOOORRRR 00009999////11110000

,” the radio failed

” is found in

Keyload When the keyloading cable is attached to the ASTRO Digital XTS 3000

radio and “KK the radio has not gone into KEYLOAD mode. For troubleshooting “KEYLOAD” failure, refer to Troubleshooting Chart, “Key Load Fail.”

KKEEEEYYYYLLLLOOOOAAAADDDDIIIINNNNGGGG

” is not displayed on the radio’s display, then

NOTE: ASTRO Digital SABER radios need a keyloader

that has the ability to keyload an ASTRO Digital SABER radio. The keyloader must be either a “T -

- - - CX” or a “T - - - - DX” keyloader.

Page 66

Troubleshooting

Procedures 9

Introduction The purpose of this section is to aid in troubleshooting a malfunctioning

ASTRO Digital SABER radio. It is intended to be detailed enough to localize the malfunctioning circuit and isolate the defective component.

Most of the ICs are static sensitive devices. Do not attempt to troubleshoot or disassemble a board without ﬁrst

C a u t i o n

referring to the following Handling Precautions section.

Handling Precautions

Complementary metal-oxide semiconductor (CMOS) devices, and other hightechnology devices, are used in this family of radios. While the attributes of these devices are many , their characteristics make them susceptible to damage by electrostatic discharge (ESD) or high-voltage charges. Damage can be latent, resulting in failures occurring weeks or months later. Therefore, special precautions must be taken to prevent device damage during disassembly, troubleshooting, and repair. Handling precautions are mandatory for this radio, and are especially important in low-humidity conditions. DO NOT attempt to disassemble the radio without observing the following handling precautions.

1. Eliminate static generators (plastics, Styrofoam, etc.) in the work area.

2. Remove nylon or double-knit polyester jackets, roll up long sleeves, and remove or tie back loose hanging neckties.

3. Store and transport all static-sensitive devices in ESD-protective containers.

4. Disconnect all power from the unit before ESD- sensitive components are removed or inserted unless otherwise noted.

5. Use a static-safeguarded workstation, which can be accomplished through the use of an anti-static kit (Motorola part number 0180386A82). This kit includes a wrist strap, two ground cords, a staticcontrol table mat and a static-control ﬂoor mat. For additional information, refer to Service and Repair Note SRN-F1052, “Static Control

Page 67

Equipment for Servicing ESD Sensitive Products,” available from Literature Distribution.

Motorola Literature Distribution 2290 Hammond Drive Schaumburg, IL 60173 (708) 576-2826

6. Always wear a conductive wrist strap when servicing this equipment. The Motorola part number for a replacement wrist strap that connects to the table mat is 42-80385A59.

Voltage Measurement and Signal Tracing

It is always a good idea to check the battery voltage under load. This can be done by measuring the OPT_B+ pin at the universal connector on the back of the radio, with the radio keyed. The battery voltage should remain at or above 7.0Vdc. The battery should be recharged or replaced as necessary prior to analyzing the radio.

In most situations, the problem circuit may be identiﬁed using a dc voltmeter, RF millivoltmeter, and oscilloscope (preferably with 100MHz bandwidth or more). The “Recommended Test Equipment, Service Aids, and Tools” section in the ASTRO Digital SABER Portable Radios Basic Service Manual outlines the recommended tools and service aids which would be useful. Of special note is the REX-4200A Housing Eliminator, which allows the technician to open the radio to probe points while in operation.

In some cases dc voltages at probe points are shown in red on the schematics. In other areas diagrams are included to show time varying signals which should be present under the indicated circumstances. It is recommended that a thorough check be made prior to replacement of any IC or part. If the probe point does not have a signal reasonably close to the indicated one, a check of the surrounding components should be made prior to replacing any parts.

C a u t i o n

When checking a transistor or module, either in or out of circuit, do not use an ohmmeter having more than 1.5 volts dc appearing across test leads or use an ohms scale of less than x100.

Page 68

Power-Up Self-Check Errors

Each time the radio is turned on the MCU and DSP perform some internal diagnostics. These diagnostics consist of checking the programmable devices such as the FLASH ROMs, internal and external EEPROMs, SRAM devices, and ADSIC conﬁguration bus checksum. At the end of the power-up self-check routines, if an error exists, the appropriate error code is displayed on the display. For non-display radios, the error codes may be read using the Radio Service Software (RSS) from the SB9600 bus on the universal connector. The following lists valid checksums, the related failure, and a reference section for investigating the cause of the failure.

Error Description Page Code

01/81 Chart 6. 01/81 Host ROM Checksum Failure . . . . 10-5

01/82 Chart 7. 01/82 or 002, External EEPROM

Checksum Failure. . . . . . . . . . . . . . . . . . . 10-6

01/84 Chart 8. 01/84 SLIC Initialization Failure . . . . . . . 10-6

01/88 Chart 9. 01/88 MCU (Host µC)

External SRAM Failure . . . . . . . . . . . . . . . 10-7

01/92 Chart 10. 01/92, Internal EEPROM

Checksum Failure. . . . . . . . . . . . . . . . . . . 10-7

02/A0 Chart 11. 02/A0, ADSIC Checksum Faiure . . . . . . . 10-8

02/81 Chart 12. 02/81, DSP ROM Checksum Failure . . . . 10-8

02/88 Chart 13. 02/88, DSP External SRAM Failure U414. 10-9 02/84 Chart 14. 02/84, DSP External SRAM Failure U403. 10-9 02/82 Chart 15. 02/82, DSP External SRAM Failure U402 10-10 02/90 Chart 16. 02/90, General DSP Hardware Failure . . 10-10

09/10 Chart 17. 09/10, Secure Hardware Failure . . . . . . . 10-11

09/90 Chart 18. 09/90, Secure Hardware Failure . . . . . . . 10-11

001 Chart 31. VHF/UHF Frequency

Generation Unit (FGU) . . . . . . . . . . . . . 10-19

001 Chart 32. 800MHz Frequency

Generation Unit (FGU) . . . . . . . . . . . . . 10-20

002 Chart 7. 01/82 or 002, External EEPROM

Checksum Failure. . . . . . . . . . . . . . . . . . . 10-6

Power-Up Sequence Upon RESET* going active, the MCU begins to execute code which is

In the case of multiple errors, the codes are logically OR’d and the results displayed. As an example, in the case of an ADSIC checksum failure and a DSP ROM checksum failure, the resultant code would be 02/A1. Following is a series of troubleshooting ﬂowcharts which relate to each of these failure codes.

pointed to by the vector stored at $FFFE, $FFFF in the FLASH ROM. The execution of this code is as follows:

1. Initialize the MCU (U204). Green LED on.

2. Initialize the SLIC (U206).

3. CONFIG register check. If the CONFIG register is not correct, the

MCU will repair it and loop.

4. Start ADSIC/DSP:

- Bring the ADSIC reset line high.

- Wait 2ms.

- Bring the DSP reset line high.

Page 69

5. Start EMC:

- Set the EMC wake-up line low (emc irq line).

- Wait 5ms.

- Set the EMC wake-up line high.

- Wait 10ms.

- Set the EMC wake-up line low (emc irq line).

- Wait 5ms.

- Set the EMC wake-up line high.

6. Begin power-up self-tests.

7. Begin RAM tests:

- External RAM ($1800-3FFF).

- Internal RAM ($1060-$1300).

- External RAM ($0000-$0DFF).

- Display 01/88 if failure.

The radio will get stuck here if the internal RAM is defective. The radio uses the internal RAM for stack. The RAM routines use subroutines. Thus, if the internal RAM is defective, the radio will get lost testing the external RAM.

8. Display “Self Test” (these routines use subroutines too). It is almost impossible to display an error message if the internal RAM is defective.

9. Begin MCU (host µC) ROM checksum test.

- Fail 01/81 if this routine fails.

10. Begin DSP power-up tests. The MCU will try this ﬁve times before it fails the DSP test.

- Check for HF2. Fail 02/90 if 100ms.

- Program the ADSIC.

- Wait for the DSP power-up message.

- Fail 02/90 if 300ms.

- Fail 02/90 if wrong message from the DSP.

- Wait for the DSP status information.

- Fail 02/90 if 100ms.

- Fail 02/88 if DSP RAM (U414) fails.

- Fail 02/84 if DSP RAM U403 fails.

- Fail 02/82 if DSP RAM U402 fails.

Page 70

- Fail 02/81 if DSP RAM fails.

- Wait for the ADSIC checksum.

- Fail 02/90 if 100ms.

- Fail 02/90 if failure.

- Wait for the ﬁrst part of the DSP version number.

- Fail 02/90 if 100ms.

- Wait for the second part of the DSP version number.

- Fail 02/90 if 100ms.

11. Display errors if a fatal error exists at this point.

12. Checksum the codeplug.

- Test internal codeplug checksums.

- Fail 01/92 if failure.

- Test external codeplug checksums.

- Error 01/82 if non-fatal error; fail 01/82 if fatal error.

13. Power-up the EMC (if it is enabled in the codeplug).

14. Turn off the green LED.

15. Start up operating system.

Page 71

Standard Bias Table

Table 3, below, outlines some standard supply voltages and system clocks which should be present under normal operation. These should be checked as a ﬁrst step to any troubleshooting procedure.

Table 2 . Standard Operating Bias

Signal Name Nominal Value Tolerance Source

UNSW_B+ 7.5Vdc 6.0-9.0Vdc J401 SW_B+ 7.5Vdc 6.0-9.0Vdc Q207 +5V

+5VA RESET 5.0Vdc +0.7, - 1.0Vdc U407 POR* 5.0Vdc +0.7, - 1.0Vdc U206 DSP_RST*

ADSIC_RST* DCLK 33.0000MHz ODC 2.4MHz ±30ppM ABACUS ECLK

IRQB* +5V 5.0Vdc ±10% U202

RX_5V

5.0Vdc

1.8432MHz

8kHz

5.0Vdc ±10% U106

±10% ±10%

+0.7, -1.0Vdc +0.7, -1.0Vdc

±500ppM U406

±500ppM ±500ppM

U409 U410

U204 U204

U204 U406

a. This is number may vary due to the operating mode of the radio when

it is measured. The ADSIC contains a divider which may divide the clock by a modulus of 2. Therefore the actual frequency measured may be clock/2n. The most common frequency will be 16.5000MHz nominal.

b. This 8kHz clock will be present only after the MCU has successfully pro-

grammed the ADSIC after power-up. This is a good indication that the ADSIC is at least marginally operational.

c. Receive mode only.

Page 72

Troubleshooting

Waveforms 11

Introduction This section contains images of waveforms which may be useful in

verifying operation of certain parts of the circuitry. These waveforms are for reference only; the actual data depicted will vary depending upon operating conditions.

Waveforms

Tek stopped:

Ch1

103 Acquisitions

2.00V

W1: Switched Regulator Clock Out Trace 1 - (U409)LX measured with radio in standby mode with UNSW_B+ at 7.5VDC.

Figure 14 . Waveform W1

M 200us Ch1 -680mV

MAEPF-24376-O

Page 73

Tek stopped:

2893 Acquisitions

Ch1 Freq

19.991kHz Low signal amplitude

5.00V

Ch2

Ch1

Ch3

5.00V

Note 1: Typically SCKR is a 2.4 MHz clock. In low power modes, as shown here, SCKR is 600KHz.

5.00V

W2: DSP SSI Port RX mode. Receiving 1KHz tone @ 3KHz deviation, -60dBm. Trace 1 - RFS Trace 2 - RXD Trace 3 - SCKR (2.4/0.600MHz)

M 20.0us Ch1 2.2 V

Figure 15 . Waveform W2

Tek stopped:

2836 Acquisitions

MAEPF-24377-A

Ch1 Freq

47.856kHz Low signal amplitude

Ch1 Ch2

5.00V

Ch3

5.00V

M 5.00us Ch1 2.2 V

W3: DSP SSI Port TX mode CSQ. Trace 1 - SC2 Trace 2 - STD Trace 3 - SCK (1.2MHz)

Figure 16 . Waveform W3

MAEPF-24378-A

Page 74

Tek stopped:

Ch1

2.00V

13 Acquisitions

Ch1 Freq

74.610kHz

M 10.0us Ch1 2.2 V

Tek stopped:

W4: ABACUS programming captured during mode change. Trace 1 - (ADSIC) SBI

Figure 17 . Waveform W4

34513 Acquisitions

MAEPF-24379-O

Ch1 Freq

2.251920 MHz Low resolution

Ch1 Ch2

Ch3

2.00V

500mV

M 5.00us Ch1 2.2 V

500mV

W5: ABACUS/ADSIC Interface. Receiving 1KHz tone @ 3KHz deviation,

-60dbm. Trace 1 -IDC (2.4MHz) Trace 2 - DOUT

TRACE 3 - DOUT*

Note 2: Since these signals are a differential current loop these voltages are very low.

Figure 18 . Waveform W5

MAEPF-24380-A

Page 75

Tek stopped:

18 Acquisitions

Ch1 Freq

= Hz

No period

found

Ch1 Ch3

Tek stopped:

Ch2

5.00V

Ch1

5.00V

M 50ns Ch1 2.2 V

5.00V W6: SPI Bus Programming ADSIC.

Trace 1 - ADSIC_SEL* Trace 2 - SPI_SCK Trace 3 - MOSI Note: These waveforms are typical to any device on the SPI bus.

Figure 19 . Waveform W6

103 Acquisitions

MAEPF-24381-A

Ch1 Freq

7.9118kHz Low signal amplitude

5.00V

Ch1

2.00V

Ch3

Note 3: Actual level is dependent upon volume setting.

Ch2

Ch4

200mV

2.00V

M 200us Ch1 2.20 V

W7: Receive audio: Receiving 1KHz tone @ 3KHz deviation, -60dBm. Trace 1 - IRQB @ DSP (8KHz) Trace 2 - SD0 @ C404 Trace 3 - SPKR_COMMON Trace 4 - INT_SPKR

Figure 20 . Waveform W7

MAEPF-24382-A

Page 76

Tek stopped:

507 Acquisitions

Ch1 Freq

7.9872kHz Low signal

amplitude

Ch1 Ch3

5.00V

20.0mV

Ch2

Ch4

500mV 500mV

M 200us Ch1 1.5 V

MAEPF-24383-A W8: Transmit Audio. 1KHz Tone which provides 3KHz deviation. Trace 1 - IRQB @ DSP (8KHz) Trace 2 - MODIN Trace 3 - EXT MIC @ node C484/R408 Trace 4 - MAI @ node R492/U401 MICAMPOUT

Figure 21 . Waveform W8

Tek stopped:

Ch1

1 Acquisitions

2.00V Ch2

2.00V

W9: Power Down Reset. Trace 1 - +5V @ U407 (VDD) Trace 2 - Reset @ U407 (OUT)

M1.00ms Ch1 4.52 V

Figure 22 . Waveform W9

MAEPF-24384-O

Page 77

Tek stopped:

Ch1

493 Acquisitions

2.00V

W10 ADSIC 2.4 MHz Reference Trace 1 - IDC @ U406

M 200ns Ch1 1.64 V

Figure 23 . Waveform W10

MAEPF-24385-O

Ch1 Freq

2.4038MHz

Page 78

Troubleshooting

Diagrams 12

Introduction to This Section

This section contains troubleshooting diagrams necessary to isolate a problem to the component level. Use these diagrams in conjunction with the theory of operation, troubleshooting procedures, charts, and waveforms.

Table 3 . J201

VOCON Board to Universal Connector

J201

Pin #

1 2 3 4 5 6 7

8 9 10

13 14 15

Description To/From

Removed n/c n/c LH DATA/BOOT DATA OUT U208-1 3 EXT MIC U411-6 4 SB9600 BUSY U204-J3 6 OPT SEL 1 U206-G3

(EXT PTT)

Q210 RS232 DATA IN U206-B2 12 OPT SEL2 (KEYLOAD*) U206-C6 10 KEYFAIL*/RTSIN* U206-J8

J801-15 SPKR COMMON U401-A3

U204-B3

J701-14 EXT SPKR U401-A5

U204-C4 OPTB+/BOOT SEL/VPP* CR201/Q21 8 CTSOUT* U206-B6 5 RS232 DATA OUT/BOOT DATA IN U206-A5 11

Pin #

Page 79

Table 4 . J601

VOCON Board to Display Board

J601 Pin # Description

MOSI U204-J6

To/

From

J801-8 J401-9

SPI SCK U204-G5

J801-9 J401-10

4 DISP EN*/

SW B+ J401-17

U206-G8

LATCH SEL* 5 DISP RST* U204-F5 6 BL EN U206-E7 7 +5V U409-12 8 n/c 9 +5V U709-9

Table 5 . J701

VOCON Board to Keypad

J701 Pin # Description To/From

1 ROW 5/5V-EN* U206-F8 2 GROUND/MIC

RETURN 3 ROW 2/SPK EN U206-G4 4 INT MIC U411-2 5 COL2 U206-D5 6 COL3/MOB IRQ* U206-B4 7 GROUND 8 n/c 9 ROW4/TXPA EN* U206-G9 10 COL1 U206-A7 11 ROW3/BUSY OUT U206-K8 12 ROW6/MIC EN U206-G7 13 ROW1 U206-J3 14 SPKR COMMON U401-A3

J201-11 U401-A3 U204-B3

15 INT SPKR U401-B2

Table 6 . J1/J401

Transceiver Board to VOCON Board

J1/

J401

Description

Transceievr

Board

VOCON

Board

1 DOUT* U401-4 U406-H3 2 DOUT U401-5 U406-K3 3 GROUND 4 SBI U401-6 U406-J3 5 GROUND 6 POR*RSSI U305-5

U407-1

U503-19

7 DA SEL* DA

U503-16 U204-H5

CE 8 ODC 2.4MHz U401-7 U406-F3 9 MOSI DATA U503-18

U302-2 U304-25

10 SPI SCK* U503-17

U204-G5 U302-3 U304-22 (CLOCK)

11 ROSC/PSC CE* U304-24

U204-F6 (REF OSC EN)

12 GROUND 13 LOCK DET* U302-41

U206-K2 CR502

14 SYN SEL* U302-4

U204-H7 (SYN CE)

15 MOD IN U302-5 U406-B2 16 GROUND 17 SW B+ U305-8 U409,

J801-1,

Q206

18 GROUND 19 UNSW B+ J3-1

U409-1 U105-5 U502-6 (RAW B+)

20 UNSW B+ J3-1

U105-5

U409-1

Q207 U502-6 (RAW B+) J801-20

Page 80

Table 7 . J801

VOCON Board to Encryption Board

J801 Pin # Description To/From

1 SW B+ J401-17 2 SW B+ J401-17 3 EMC RXO U405-B7 4 EMC TXO U405-A7 5 n/c 6 GROUND 7 MISO U204-H6 8 MOSI U204-J6

J601-1

9 SPI SCK U204-G5

J601-2 10 EMC EN* U206-D6 11 EMC REQ* U206-H3 12 EMC MAKEUP* U206-K7 13 n/c 14 n/c 15 KEYFAIL*/RTSIN* U206-J8 16 n/c 17 n/c 18 n/c 19 n/c 20 UNSW B+ J401-19 21 GROUND 22 GROUND 23 n/c 24 n/c 25 n/c

Table 8 . J901

VOCON Board to Control Top Flex

J901 Pin # Description To/From

1 UNSW B+ J401-19 2 TG1/PROG SWITCH U204-D3 3 VOL U204-C3 4 EMERG U204-A3 5 +5V U409-12 6 INT PTT* U204-H2 7 RTA3 U206-H1 8 GRN LED DRIVER U206-E8 9 TG2 A/B SWITCH* U204-A2 10 B+ SENSE 11 RTA0 U206-F3 12 RED LED DRIVER U206-H9 13 RTA1 U206-F4 14 GROUND 15 RTA2* U206-F2 16 n/c 17 n/c 18 n/c 19 n/c 20 UNSW B+ J401-19 21 GROUND 22 GROUND 23 n/c 24 n/c 25 n/c

Page 81

Notes

Page 82

*6881076C10*

68P81076C10-A

Motorola 8000 West Sunrise Boulevard Fort Lauderdale, Florida 33322

Page 83

10-1

Troubleshooting Charts

This section contains detailed troubleshooting ﬂowcharts. These charts should be used as a guide in determining the problem areas. They are not a substitute for knowledge of circuit operation and astute troubleshooting techniques. It is advisable to refer to the related detailed circuit descriptions in the theory section prior to troubleshooting a radio.

Most troubleshooting charts end up by pointing to an IC to replace. It is not always noted, but is

good practice to verify supplies and grounds to the affected IC and to trace continuity to the malfunctioning signal and related circuitry before replacing any IC. For instance, if a

clock signal is not available at a destination IC, continuity from the source IC should be checked before replacing the source IC.

Description Page

Chart 1. 800MHz Radio Main Troubleshooting Chart................................................. 10-2

Chart 2. VHF/UHF Radio Main Troubleshooting Chart............................................... 10-2

Chart 3. Radio Power-Up Fail ....................................................................................... 10-3

Chart 4. Bootstrap Fail .................................................................................................. 10-4

Chart 5. DC Supply Failure........................................................................................... 10-5

Chart 6. 01/81 Host ROM Checksum Failure ............................................................... 10-5

Chart 7. 01/82 or 002, External EEPROM Checksum Failure....................................... 10-6

Chart 8. 01/84 SLIC Initialization Failure .................................................................... 10-6

Chart 9. 01/88 MCU (Host µC) External SRAM Failure ............................................... 10-7

Chart 10. 01/92, Internal EEPROM Checksum Failure................................................... 10-7

Chart 11. 02/A0, ADSIC Checksum Faiure..................................................................... 10-8

Chart 12. 02/81, DSP ROM Checksum Failure............................................................... 10-8

Chart 13. 02/88, DSP External SRAM Failure U414........................................................ 10-9

Chart 14. 02/84, DSP External SRAM Failure U403........................................................ 10-9

Chart 15. 02/82, DSP External SRAM Failure U402...................................................... 10-10

Chart 16. 02/90, General DSP Hardware Failure.......................................................... 10-10

Chart 17. 09/10, Secure Hardware Failure.................................................................... 10-11

Chart 18. 09/90, Secure Hardware Failure.................................................................... 10-11

Chart 19. Key Load Fail................................................................................................. 10-12

Chart 20. Button Test.................................................................................................... 10-12

Chart 21. Keypad Error................................................................................................. 10-13

Chart 22. Volume Set Error........................................................................................... 10-13

Chart 23. Zone/Channel Select Error ........................................................................... 10-14

Chart 24. Top/Side Button Error................................................................................... 10-14

Chart 25. No Display.................................................................................................... 10-15

Chart 26. No TX Modulation ....................................................................................... 10-16

Chart 27. 800MHz No TX Deviation............................................................................ 10-17

Chart 28. VHF/UHF No TX Deviation.......................................................................... 10-17

Chart 29. No RX Audio................................................................................................. 10-18

Chart 30. VHF/UHF/800MHz Receiver RF.................................................................... 10-19

Chart 31. VHF/UHF Frequency Generation Unit (FGU).............................................. 10-19

Chart 32. 800MHz Frequency Generation Unit (FGU)................................................ 10-20

Chart 33. VHF/UHF Voltage Controlled Oscillator (VCO)........................................... 10-21

Chart 34. 800MHz Voltage Controlled Oscillator (VCO)............................................. 10-22

Chart 35. 800MHz DC Switch...................................................................................... 10-22

Chart 36. VHF/UHF DC Switch.................................................................................... 10-23

Chart 37. 800MHz Transmitter RF................................................................................ 10-24

Chart 38. VHF/UHF Transmitter RF.............................................................................. 10-25

Chart 39. VHF/UHF Only, VCO Crossover Frequency Tune........................................ 10-26

Page 84

10-2

Chart 1 . 800MHz Radio Main Troubleshooting Chart

MAEPF-24396-A

Good Power-

Up Self

Test?

Is There

TX Power?

Is TX

Deviation

OK?

YES

Receive

Audio?

Poor

SINAD?

END

START

Button's

Functioning?

Radio Keyload Failure?

Go to No Receiver Audio Chart C.29

See Button Test

Chart C.20

Error

Message?

Display Model?

Go to No Transmit

Audio Chart C.26

Go to Transmitter

Chart C.37

YES

See Keyload Failure Chart

C.19

YES

Go to No Receiver

RF Chart C.30

Go to DC Switch

Chart C.35

YES

Is R5 on?

See Table T1; Power-up Self

Check Error Codes

Use RSS to

display

Error Messages

Error Message on RSS?

Either Bad Display.

(See Chart C.25), or

Radio Power-Up Failure

(See Chart C.3)

Chart 2 . VHF/UHF Radio Main Troubleshooting Chart

MAEPF-24395-A

Is There

TX Power?

Is TX

Deviation

OK?

START

YES

Error

Message?

Display Model?

YES

See Table T1; Power-up Self

Check Error Codes

Use RSS to

display

Error Messages

Error Message on RSS?

Either Bad Display.

(See Chart C.25), or

Radio Power-Up Failure

(See Chart C.3)

Good Power-Up/ Self Test?

YES

Go to No Transmit

Audio Chart C.26

Go to Transmitter

Chart C.38

YES

Receive

Audio?

Poor

SINAD?

END

Button's

Functioning?

Radio

Keyload Failure?

Go to No Receiver Audio Chart C.29

See Button Test

Chart C.20

YES

See Keyload

Failure Chart

C.19

Go to No Receiver

RF Chart C.30

Go to DC Switch

Chart C.36

YES

on?

Page 85

10-3

Chart 3 . Radio Power-Up Fail

Radio Power-Up

Failure.

Verify standard

bias per table

Table 3 pertaining

to host µC.

Yes

Standard

Isolate and

repair problem.

See chart C.5

bias OK?.

Using RSS,

verify radio is

not inhibited.

Signal @ U206 Source OE* U204 WE* U204 HD0-HD7 U204 4XECLK U204 HA0-HA4, HA14_IN, HA15_IN, HA16,HA17 U204 CSIO1* U204 CSPROG* U204

Verify Host Port: Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U202 Source HA0-HA13 U206 HD0-HD7 U204 MEMR/W* U206 OE* U206 CS* U211

Signal @ U211 Source IN_B U204 IN_A U206

Synopsis This failure assumes the radio fails to power up correctly and does not send any Power up failure messages via the display or serial bus. Some basic failure modes:

1) Radio is inhibited.

2) Battery voltage is low.

3) A problem exists with a supply or system clock.

4) Host µC code is corrupted.

5) Host FLASH or RAM is faulty.

6) Corrupted host µC configuration register.

7) Host µC or SLIC is faulty.

Radio is

not inhibited or

unable to

check?

Use RSS to clear radio

inhibit.

YesNo

ReFLASH host

µC code.

Error

ReFLASHING

host µC code?

Reverify inital

problem.

Initial

problem

persists?

Yes

End.

Error in

Bootstrapping

host µC?

Yes

Refer to section

on Failure to

Bootstrap.

Chart C.4

Refer to host µC ROM checksum

error (FAIL 01/81).

Chart C.6

When reFLASHing

host code, there

are two

fundamental modes

of failure: 1) The

host µC fails to

respond or 2)

reports an error

in programming.

During radio power-up

Self-Test, verify

activity (transisitons

from high to low) on U202 OE* and WE*.

Using RSS,

reinitialize host

µC

configuration

reverify initial

problem. Note:

if this requires

writing the

internal EE, the

radio must be

realigned.

Power up

failure fixed?

Yes

End.

Connections

good?

Repair

connections.

Yes No

Signals

verfied?

Replace U206.

During radio power-up

Self-Test, verify

activity (transisitons

from high to low) on

U202 CS*.

Yes

Signals verfied?

Replace U202.

Verify operation of

U211 and logic AND

gate. During radio power

up Self-Test, verify activity (transisitons from high to low) on

U211 IN_B.

No Yes

MAEPF-24419-A

Signals

verfied?

Replace U211.

Replace U204.

Page 86

10-4

Chart 4 . Bootstrap Fail

Note: This

configuration indicates the

µC is in

Bootstrap

mode waiting

for data.

Host µC

Bootstrap Failure.

Synopsis The host µC bootstrap mode is used during reprogramming of the host µC and DSP FLASH ROMs. Refer to appropriate Theory of operation section for description of bootstrap operation. Since the operating code is downloaded through the serial bus instead of from the ROM and is initially executed in the µC internal RAM, this is a good method of verifying operation of the µC. Basic failure modes:

1) Necessary supplies, grounds, system clocks not present.

2) Vpp voltage not set to correct voltage for bootstrap mode select or FLASH programming.

3) Improper configuration of mode select pins.

4) Improper operation of RESET

to the host µC.

5) Improper configuration/operation of the host µC serial bus.

Verify standard

bias per table

Table 3.

Isolate and repair problem. See Chart C.5.

Yes

Standard

bias OK?

Verify voltage at VR207

(OPTB+/BOOT_SEL/VPP)

is: 10VDC≤VPP≤12.7VDC.

VPP is

correct?

Isolate open

and repair or

adjust VPP as

required.

Yes

Verify MODA and MODB of U204 are pulled to a logic

low state (< .8VDC).

MODA and MODB are

correct?

Repair inverter

circuit consisting

of VR207 and

Q204.

With the host µC out of reset and prior to any

downloading through the

serial bus:

Verify U204-PD1

(BOOT_DATA_OUT) is logic

low and U204-PD0 is logic

high (BOOT_DATA_IN).

Yes

PD0 and PD1 are correct?

Verify

BOOT_DATA_IN and

BOOT_DATA_OUT

are isolated by

MUX U208.

Yes

In some

circumstances

additional code is

downloaded and

placed in external

RAM. In this case, a failure of the external RAM

could look like a

boostrap failure.

Initiate download

and verify the

data on

BOOT_DATA_IN is

echoed out on

BOOT_DATA_OUT

Signals are

isolated?

Verify MUX

control on Pin

4 of U208 is

low.

YesNo

Control voltage

correct?

Repair inverter

circuit

composed of

VR207 and

Q203.

Replace U208.

Yes

Data echoed?

Replace U204.

MAEPF-24420-A

Yes

Verify continuity

of BOOT_DATA_IN

from J201-15 to

U204-PD0.

Signal good?

Yes

Verify U204 ECLK

is 1.8432 MHZ

±200ppM.

Replace Y201.

Verify download

baud rate is 7200.

Baud rate correct?

ECLK frequency

correct?

Isolate and

repair open.

Fix baud rate.

Yes

Page 87

10-5

Chart 5 . DC Supply Failure

Is the

output on

U410-3

+5VDC?

Verify control

voltage at

Q207-4 is logic

low.

Control voltage

correct?

Check inverter

circuit of Q206

and R244.

Replace Q207.

Yes

Connect supply or

battery (B+) to radio

and turn

ON/OFF/VOLUME

CONTROL knob on.

Is B+ at

Q207-2?

DC Supply Failure

Synopsis This failure implies a problem with the DC power distribution. It may relate to a battery supply or one of the regulated supplies. Basic failure modes are as follows:

1) Fuse S1 blown.

2) Open in Battery contacts or from flex circuit through J401.

3) Defective switch Q207.

4) Open in B+_SENSE through control top switch or B+_SENSE not detected by µC.

5) Defective +5V regulator.

Check fuse S1.

Replace fuse.Fuse good?

Locate and repair

open between

battery and VOCON

board.

Yes

Verify B+ at

Q207-5.

Is B+ at

Q207-5?

Is +5VDC ± 5%

at C470?

Yes

Verify U409-2

> 2VDC.

U409

switched

on?

Yes

Check

continuity of

B+SENSE to

U409 and R423

pull-up.

Verify L402 continuity

< 1 Ω and solder

connection to board.

Yes

Verify Lx signal per

Fig. W1.

U409 running?

Yes

Verify integrity of

CR403, C470, C463

and R436.

L402 good?Replace L402.

Replace U409.

Yes

End

Yes

Verify SW_B+

at input to

U202 and

RESET signal is

logic low.

Signals verified?

Replace U202.

Repair connections

back to the vocon

board through J401.

Yes

Verify SW_B+

at input to

U410.

Replace U410.

Repair connections .

Yes

MAEPF-24399-O

Is the

output on

U202

+5VDC?

Signals verified?

Chart 6 . 01/81 Host ROM Checksum Failure

Synopsis This failure indicates the Host ROM program code is incorrect. It is implied that the host processor found and executed enough valid code at power up to get to the point of verifying the rest. Basic failure modes are as follows:

1) The contents of U205/U210 have been corrupted.

2) The decoding logic comprised of U204 and U206 is not working properly due possibly to circuit opens or shorts or that a failure of one or more of these ICs has occurred.

3) U205 or U210 has failed. Due to the fact that the Host µC successfully initialized, a failure in one of the ICs is not likely.

Repair opens.

Fail 01/81

Host ROM Checksum

Failure

Connections

good?

Yes

Visually inspect all

leads to U205 and

U210 with a 5x glass.

Check for operation of U204 and U206 as follows: During radio power up Self-Test, verify activity (transisitons from high to low) on U205/U210 ROM1CS*/ROM2CS*, and OE*.

Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U205/U210 Source HD0-HD7 U204 HA0-HA13 U204 HA14OUT,HA15OUT U206 HA16,HA17 U206 ROMCS1*,ROMCS2* U206 OE*,MEMR/W* U206 VCC +5V VSS GND

Replace

U205/U210.

MAEPF-24421-A

Yes

Host ROM

ReFLASH

passed?

Yes

Connections

good?

Repair opens.

Yes

ReFLASH Host

ROM

End

Initial

operation

checks

Good?

Refer to section on

Power-up Failure C.3

and/or Fails to Bootstrap C.4.

Page 88

10-6

Chart 7 . 01/82 or 002, External EEPROM Checksum Failure

Reprogram

external EEPROM.

External

EEPROM

reprogrammed?

End

Yes

Repair opens.

Connections

good?

Yes

Verify operation of

Power-Down Reset Per

Fig. W9.

Reset

Functional?

Replace U407.

Yes

Fail 01/82 or 002

External EEPROM

Checksum Failure

Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U201 Source HD0-HD7 U204 HA0-HA13 U204 HA14OUT U206 EE1CS* U206 OE*,MEMR/W* U206 RESET* U407 VCC +5V VSS GND

Check for operation of U204 and U206 as follows: During radio power up Self-Test, verify activity (transisitons from high to low) on U201 EE1CS*, and OE*.

Replace

U201.

Yes

MAEPF-24415-A

Initial

operation

checks

Good?

Refer to section on

Power-up Failure C.3

and/or Fails to Bootstrap C.4.

Synopsis This failure indicates the External EEPROM data containing mostly customer specific channel/mode information is incorrect. Basic failure modes are as follows:

1) The contents of U201 has been corrupted. A possible cause of this failure would be the improper operation of the RESET circuit during a radio power down sequence.

2) The decoding logic comprised of U204 and U206 is not working properly due possibly to circuit opens or shorts or that a failure of one or more of these ICs has occurred.

3) U201 has failed.

Chart 8 . 01/84 SLIC Initialization Failure

Fail 01/84

SLIC Init Failure

Verify standard

bias per table

Table 3 pertaining

to SLIC.

Isolate and

repair problem.

Yes

Standard bias OK?.

Verify Host/SLIC connections: Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U206 Source OE* U204 WE* U204 HD0-HD7 U204 4XECLK U204 HA0-HA4, HA14_IN, HA15_IN, HA16,HA17 U204 CSIO1* U204 CSPROG* U204

Synopsis This failure indicates a failure in verification of the data in the SLIC parallel programming registers Some basic failure modes:

1) Missing supply or ground to SLIC.

2) Open in parallel address bus, data bus or associated select lines between the host µC and the SLIC.

3) 4xECLK missing to the SLIC.

4) SLIC is faulty.

Verify 4xECLK on SLIC;

nominal 1.8432MHz square wave, 0-5V.

Connections

good?

Repair

connections.

MAEPF-24664-A

Yes No

Signals

verfied?

Yes

Replace U206.

Replace U204.

Page 89

10-7

Chart 9 . 01/88 MCU (Host µC) External SRAM Failure

Fail 01/88

Host µC External RAM

Failure.

Verify standard

bias per table

Table 3 pertaining

to host µC.

Isolate and

repair problem.

Yes

Standard bias OK?.

Signal @ U206 Source OE* U204 WE* U204 HD0-HD7 U204 4XECLK U204 HA0-HA4, HA14_IN, HA15_IN, HA16,HA17 U204 CSIO1* U204 CSPROG* U204

Verify Host RAM: Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U202 Source HA0-HA13 U206 HD0-HD7 U204 MEMR/W* U206 OE* U206 CS* U211

Signal @ U211 Source IN_B U204 IN_A U206

Synopsis This failure indicates a failure in the µC external SRAM at power up test. Some basic failure modes:

1) Missing supply or ground to SLIC.

2) Open in parallel address bus, data bus or associated select lines between the host µC and the SLIC and the SRAM.

3) 4xECLK missing to the SLIC.

4) SLIC is faulty.

5) Improper decoding logic due to open or failure of U211 AND logic gate.

6) SRAM is faullty.

Connections

good?

Repair

connections.

Yes

Signals

verfied?

During radio power up

Self-Test, verify activity (transisitons from high to low) on

U202 CS*.

Yes

Signals

verfied?

Replace U202.

MAEPF-24665-B

No Yes

Signals

verfied?

Replace U211.Replace U204.

Replace U206.

Verify operation of

U204 and U211 logic AND

gate. During radio power

up Self-Test, verify activity (transisitons from high to low) on

U211 IN_B.

During radio power up

Self-Test, verify

activity (transisitons

from high to low) on U202 OE* and WE*.

Chart 10 . 01/92, Internal EEPROM Checksum Failure

Replace U204.

Reprogram Internal

EEPROM.

Internal

EEPROM

reprogrammed?

End

Yes

Verify operation of

Power Down Reset Per

Fig. W9.

Reset

Functional?

Replace U407.

Yes

Fail 01/92

Internal EEPROM

Checksum Failure

Realign radio.

MAEPF-24407-B

Synopsis This failure indicates the Host µC interal EEPROM is incorrect. This data contains, among other things, radio tuning parameters. Basic failure modes are as follows:

1) The contents of the internal EEPROM have been corrupted. A possible cause of corrupted data may be improper operation of the power down RESET circuit U407.

2) An internal failure of U204 has occurred.

Page 90

10-8

Chart 11 . 02/A0, ADSIC Checksum Faiure

Synopsis The ADSIC calculates a checksum of the configuration bus data programmed through the Host µC SPI interface. This failure indicates some problem with the data. It should be noted that this is a non-fatal error as it happened. As the ADSIC controls some of the functions of the DSP memory mapping and interrupts, some aspects of ADSIC programming problems may cause a general DSP hardware failure. Some operation of the ADSIC can be determined by looking for the 8KHz @ IRQB. This signal is present only after the host µC has programmed the IC. Partial operation of the device may point to a missing supply connection. Basic failure modes are as follows:

1) An open or short in the DSP address or data bus and select lines may cause an error in reading the checksum.

2) Missing or improper 2.4 MHz clock reference.

3) Missing signal in the Host µC SPI programming interface.

4) Open or missing analog or digital supply at one or more IC pads.

5) General IC failure.

Fail 02/A0

ADSIC Checksum

Failure

Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U406 Source D8-D23 U405 A0-A2,A13-A15 U405 PS*,RD*,WR* U405 SELx,RSTx U204 SPD,SCLK U204 1

VDDD,VDD1,VDD2, VDD3 +5V VDDAb,VDDA +5VA VSSD,VSS1,VSS2, VSS3 GND 2

VSSA,VSSAb AGND ABI R402

Note: Finding an open at VDDx may be difficult because of low isolation between supply pins. 2

Also measure continuity between GND and AGND through jumper JU407.

Connections

good?

Repair opens.

Verify 2.4MHz

reference clock at

U406 IDC per Fig.

W10

Clock

Present?

Verify SPI

programming signals per Fig. W6. initiated by

mode change.

Programming

signals

verified?

Verify U406-

RSTx goes high on

initial power up.

Reset high?

Replace U406.

Verify clock at

ABACUS source and/or fix connection.

Verify SPI operation

by verifying

programming of

synthesizer IC

initiated by a channel

change. If pass find

connection problems to

U406. A failure indicates a software problem or hardware

fault with U204.

Yes

MAEPF-24416-A

Yes

Replace U204.

Chart 12 . 02/81, DSP ROM Checksum Failure

At radio power up,

verify U404

A14,A15,A16

transisiton to a high

logic state. Verify

activity(transitions

from high to low)

on U404 - CE*.

Use ohmmeter to

electrically verify

following signal

connections to source IC: Signal @ U404 Source D0-D7 U405 A0-A13,A17 U405 A14-A16 U406 CE* U406 OE*,WE* U405 VCC +5V VSS GND

Replace U404

ADSIC Good?

Replace U406

Yes

DSP ROM ReFLASH

passed?

End

Yes

Repair opens.

Fail 02/81

DSP ROM Checksum

Failure

Visually inspect all leads to U404 with

a 5x glass.

Connections

good?

Yes

Connections

good?

Repair opens.

Yes

Go to section

on ADSIC

Checksum

Failure (02/A0).

Chart C.11

ADSIC Good?

Yes

MAEPF-24417-A

ReFLASH DSP

ROM

Synopsis This failure indicates the DSP ROM program code is incorrect. It is implied that the DSP found and executed enough valid code at power up to get to the point of verifying the rest. Basic failure modes are as follows:

1) The contents of U404 has been corrupted.

2) The decoding logic comprised of U405 and U406 is not working properly due possibly to circuit opens or shorts or that a failure of one or more of these ICs has occurred.

3) U405 has failed. Due to the fact that the DSP successfully initialized, a failure in one of the ICs is not likely.

Page 91

10-9

Chart 13 . 02/88, DSP External SRAM Failure U414

R3SEL* appears

functional?

Yes

Replace U414.

Do all three

SRAMs

exhibit a

fault?

Replace U405.

Yes

MAEPF-24410-A

ADSIC

checksum

error?

Refer to

section on

FAIL 02/A0.

Chart C.11

Yes

During power

up Self-Test

verify E1~ on

U414 is enabled

by high to low

transitions of

R3SEL*.

During power-up verify operation

of U415 by looking for

transitions on

inputs IN_B and

IN_A.

Inputs to

U415

functional?

Replace U415.

Replace U405.

Yes

Synopsis On power-up the DSP writes data to the device and then verifies the data. This failure indicates the DSP SRAM failed this pattern/checksum test. U414 is selected by the DSP (U405) address bus with the addition of the OR logic gate U415. Basic failure modes are as follows:

1) Some problem exists (open/shorts) with the external address/data bus.

2) Possible failure of the DSP address/data bus or RD*/WR*/PS*/DS* signals used in selecting this part. Since the other two DSP SRAMs share this bus as well as other ICs, this is not a likely failure.

3) Operational failure of the OR logic of gate U415.

3) Open in supply or ground to the IC.

4) Failure of the IC.

Fail 02/88

DSP SRAM U414

Failure

Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U414 Source D0-D23 U405 A0-A12 U405 WR*,RD* U405 E1* U415-OUT E2 U406-A15 X/Y*,V/S* GND VCC +5V VSS GND Signal @ U415 Source IN_A U405-A14 IN_B U405-A13

Connections

good?

Repair opens.

Yes

Check for

ADSIC

programming

checksum

error.

Chart 14 . 02/84, DSP External SRAM Failure U403

Fail 02/84

DSP SRAM U403

Failure

Synopsis On power-up the DSP writes data to the device and then verifies the data. This failure indicates the DSP SRAM failed this pattern/checksum test. Besides utiling decoding logic from the DSP (U405), U403 has additional logic in the form of RSEL from the ADSIC (U406). A problem with the ADSIC in the form of a programming or hardware fault will cause a problem with the operation of this part. Basic failure modes are as follows:

1) Some problem exists (open/shorts) with the external address/data bus.

2) Some problem exists with the ADSIC memory select (RSEL) which may include an ADSIC programming problem (SPI bus) or possibly a failed ADSIC.

3) Possible failure of the DSP address/data bus or RD*/WR*/PS*/DS* signals used in selecting this part. Since the other two DSP SRAMs share this bus as well as other ICs, this is not a likely failure.

4) Open in supply or ground to the IC.

5) Failure of the IC.

Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U403 Source D0-D23 U405 A0-A12 U405 WR*,RD* U405 E1* U405-A15 E2 U406-RSEL X/Y*,V/S* GND VCC +5V VSS GND

RSEL

appears

functional?

Yes

Replace

U406.

Replace U403.

Do all three

SRAMs

exhibit a

fault?

Replace U405.

MAEPF-24409-B

Yes

Connections

good?

Repair opens.

Yes

Check for

ADSIC

programming

checksum

error.

ADSIC

checksum

error?

Refer to

section on

FAIL 02/A0.

Chart C.11

Yes

During power up Self-Test verify E2 on

U403 is enabled

by low to high transitions of

RSEL.

Page 92

10-10

Chart 15 . 02/82, DSP External SRAM Failure U402

Does a fault

exist with

U403?

MAEPF-24408-B

Yes

Refer to a

Fail 02/84.

Replace U402.

Do all three

SRAMs

exhibit a

fault?

Replace U405.

Yes

Connections

good?

Repair opens.

Yes

Check for

ADSIC

programming

checksum

error.

Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U402 Source D0-D23 U405 A0-A12 U405 WR*,RD* U405 E1* U405-A15 E2 U405-A13 X/Y*,V/S* GND VCC +5V VSS GND

Synopsis On power up the DSP writes data to the device and then verifies the data. This failure indicates the DSP SRAM failed this pattern/checksum test. U402 decoding logic consists entirely of address lines from the DSP (U405). A failure in this part would point to the part itself or with the DSP. However the possibility exists for a decoding logic problem to cause one of the other SRAMs to overwrite U402. This is particularly the case with U403 which is selected with the RSEL signal from ADSIC (U406). This problem should be investigated before replacing any parts. Basic failure modes are as follows:

1) Some problem exists (open/shorts) with the external address/data bus.

3) Open in supply or ground to the IC.

4) Failure of the IC.

Fail 02/82

DSP SRAM U402

Failure

ADSIC

checksum

error?

Refer to section on Fail 02/A0. Chart C.11

Yes

Due to the possibilityof a failure causing a RAM overlap

U403 should be

verified.

Chart 16 . 02/90, General DSP Hardware Failure

Fail 02/90

DSP Hardware

Failure

Verify standard

bias per table

Table 3.

Isolate and

repair problem.

See Chart C.5

Yes

Standard bias OK?.

Reflash DSP

code.

Unable to

Reflash

DSP code?

Fail

02/90

persists?

Verify Host Port: Use ohmmeter to electrically verify following signal connections to source IC: Signal @ U405 Source H0-H7 U204 HA0-HA2 U204 HR/W* U204 HEN* U204 RESET U204

On power up, verify transitions on HEN* from high to low indicating DSP is being selected.

Synopsis On power-up the host µC sends several handshake commands through the host interface to the DSP system to coordinate the power up programming of the ADSIC and detect any DSP power up status messages.. This error indicates the host never received a response from the DSP. The power up code is downloaded from U404 and executed internally in the DSP. This is a wide ranging problem which may be difficult to isolate without special tools. Some basic failure modes:

1) Some fundamental system clocks or supplies are not operational.

2) Improper operation of the ADSIC memory mapping functions.

3) Corrupted DSP FLASH program code.

4) Hardware problem with host µC/DSP interface.

5) Improper configuration of MODA and MODB by ADSIC.

6) DSP_RST* not operating correctly.

7) ADSIC not functional due to missing 2.4MHz reference.

Yes

End.

Verify D23 is

pulled high through R404 at power up..

Replace U405.

D23 is high?

Yes

Repair problem

with R404.

FLASH

programming

error

generated?

Refer to

section on DSP

ROM failure (Fail 02/81).

Chart C.12

Yes

At power up

verify state of

MOD select pins on DSP

when RESET

goes high: MODA High MODB Low.

MOD pins

correct?

Yes

Verfiy operation and continuity of

RSTx on U406.

On power up, Signal should

transition

from low to

high.

ADSIC RESET

functional?

Replace U204.

Yes

Verify 2.4

MHz reference

on U406-IDC per Fig W10.

*Note

frequency may

be off, if

sequence was

aborted before

ABACUS was

programmed.

Reference

present?

Yes

MAEPF-24414-A

Replace U406.

Verify

operation of ABACUS IC

and repair as

necessary.

Host port operation

verfied?

Repair opens

as necessary.

No activity

exists on

pins when

measured on

U204 at power

up may

indicate a bad

µC. If this is

the case

replace U204.

Replace U405.

Yes

Page 93

10-11

Chart 17 . 09/10, Secure Hardware Failure

Repair opens.

Fail 09/10

Secure Hardware

Failure

Verify connections

to secure module

through J801.

Connections

good?

Yes

Synopsis This failure relates only to secure equipped radios and indicates a power up self-test failure for the secure module. More specifically this failure indicates a failure in communications between the Host µC and secure module. The secure module is not considered field repairable so troubleshooting is limited to verifying a problem with the module and replacing. Typical failure modes would be:

1) Open between secure module and vocon board at J801.

2) The host µC communicates with the secure module via the SPI bus (Refer to Fig. S1). A failure of this bus.

3) Failure to get proper supplies and grounds to J801.

Replace module

with known

good one and

retest.

Is known

good module

available?

Yes

Radio

functions

with known

good

module?

Replace secure

module.

Yes

Use ohmmeter to electrically verify following signal connections to source IC: Signal @ J801 Source MOSI,MISO,SPI_SCK U204 EMC_WAKEUP* U206 EMC_EN* U206 EMC_REQ U206 Pins 6,21,22 GND

Verify bias of following signals Signal@J801 Nominal Bias UNSW_B+ 7.5VDC±1.0VDC SW_B+ 7.5VDC±1.0VDC GND GND

Connections

good?

Repair

connections.

Yes

Verify electrical activity at the following signals at power up: Signal @ J801 Source MOSI,MISO,SPI_SCK U204 EMC_WAKEUP* U206 EMC_EN* U206 EMC_REQ U206

Signals

good?

Yes

MAEPF-24411-A

Replace secure

module.

Replace

respective

source IC or

VOCON board.

Chart 18 . 09/90, Secure Hardware Failure

Signals

good?

Yes

Replace secure

module.

Replace

respective

source IC or

VOCON board.

Repair opens.

Fail 09/90

Secure Hardware

Failure

Verify connections

to secure module

through J801.

Connections

good?

Yes

Synopsis This failure relates only to secure equipped radios and indicates a power up self-test failure for the secure module. More specifically this failure indicates a failure in communications between the DSP and secure module. The secure module is not considered field repairable so troubleshooting is limited to verifying a problem with the module and replacing. Typical failure modes would be:

1) Open between secure module and vocon board at J801.

2) The DSP communicates with the secure module via the SCI/SSI bus (Refer to Fig. S1). A failure of this bus.

3) Failure to get proper supplies and grounds to J801.

Replace module

with known

good one and

retest.

Is known

good module

available?

Yes

Radio

functions

with known

good

module?

Replace secure

module.

Yes

Use ohmmeter to electrically verify following signal connections to source IC: Signal @ J801 Source EMC_RXD U405 EMC_TXD U405 Pins 6,21,22 GND

Verify bias of following signals Signal@J801 Nominal Bias UNSW_B+ 7.5VDC±1.0VDC SW_B+ 7.5VDC±1.0VDC GND GND

Connections

good?

Repair

connections.

Yes

MAEPF-24412-A

Verify electrical activity at the following signals at power up: Signal @ J801 Source EMC_RXD U405

Page 94

10-12

Chart 19 . Key Load Fail

Replace U206.

Repair

connection.

Verify and repair

connection of OPT_SEL2/KEYLOAD* from KVL to Universal

connector to J206.

Verify the use of the correct keyloader per the following table:

Secure Module Kit(s) KVL Kit(s) Encryption

NTN7770 T3010DX DVP NTN7771 T3011DX DES/DES-XL NTN7772 T3011DX DES/DES-XL NTN7773 T3012DX DVI-XL NTN7774 T3014DX DVP-XL NTN7329 T3012DX & T3010DX DVI-XL & DVP NTN7332 T3011DX & T3010DX DES-XL & DVP NTN7331 T3011DX & T3014DX DES-XL & DVP-XL NTN7330 T3014DX & T3010DX DVP-XL & DVP NTN7370 T3014DX & T3012DX DVP-XL & DVI-XL NTN8967 All except DVPKVL3000

Verify the use of the correct KVL cable as a TKN8506.

With KVL attached to

radio and radio on,

verify display

message "KEYLOAD"

Obtain correct KVL and cable.

Keyload

Failure

Synopsis This failure relates only to secure equipped radios and indicates a failure to load key with the KVL indicated by the message "x FAIL" and key fail tone. Typical failure modes would be:

1) Open between Pin 10 of the universal connector C which places radio in Keyload mode.

2) Use of wrong KVL or KVL cable for ASTRO Digital Saber radio.

3) Failure of secure module.

"KEYLOAD"

message

displayed?

Correct

equipment?

Yes

With KVL attached to

radio and radio on,

inititate a keyload by pressing P-T-T on the keyloader and look for

activity on J801-15.

Activity?

Yes

Verify connection of

RTSIN*/KEYFAIL* from the universal

connector pin 9

and from J206 to

J801-15.

Verify

connection

across J801.

Good

connection?

Good

connection?

Repair

connection.

Replace

secure module.

Yes

MAEPF-27147-O

Chart 20 . Button Test

Refer to

appropriate

troubleshooting

chart.

Button Table Button Code

Chart

C.24 C.24 C.24 C.24 C.24 C.24 C.23 C.22

PTT 1/ 0-1 Top Button 3/ 0-1 Top Side Button 96/ 0-1 Side Button 1 97/ 0-1 Side Button 2 98/ 0-1 A/B Switch 65/ A=0, B=1 Zone/Channel Select 4/ 0-15 Volume Control Knob 2/ 0-255

Synopsis This chart relates to a failure in the button functions. Basic Failure modes are as follows:

1) Failure in control top/ptt or Spkr/mic flex circuit.

2) Bad connection.

3) Defective switches or pads.

4) Defective A/D port in host µC.

Button

Test

Place radio in Test

Mode. Press Top

Side Button so

display reads CH.

This places radio in

button test mode. Verify key codes

displayed per Button

Table.

Keys

correct?

Yes

End

1 2ABC 3DEF

4GHI 5JKL

6MNO

7PRS 8TUV 9XYZ

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52/1 53/1 54/1

55/1 56/1 57/1

58/1 48/1 59/1

Keypad Table

See Chart C.21

MAEPF-24397-O

Page 95

10-13

Chart 21 . Keypad Error

PJ6 PJ1 PJ0

PL7

PL6

PL5

PL4

PL3

PL2

2ABC 3DEF

4GHI 5JKL 6MNO

7PRS

8TUV

9XYZ

HOME

R0W1

R0W2

ROW3

ROW4

ROW5

ROW6

COL1 COL2 COL3

U206

Verify keypad

model with RSS.

If model checks

good replace

U206.

Synopsis This chart relates to a failure in reading the keypad. Basic Failure modes are as follows:

1) Failure in flex circuit.

2) Bad connection.

3) Defective keypad.

4) Defective port in SLIC.

Keypad

Error.

Verify operation of

keypad per "Button

Check" flow chart C.20.

Signals

check good

at U206?

MAEPF-24398-O

By studying the

adjacent chart against

the keys which have

errors, one signal may

be determined to be in

error or verify logic

levels at U206

PJ0,PJ1,PJ6, and

PL2-PL7 for each

channel noting that the

key pressed provides a

logic low at on COLx

and one ROWx.

Yes

Replace keypad module

if J701 checks good.

Chart 22 . Volume Set Error

Synopsis This chart relates to a failure in volume set knob. Basic Failure modes are as follows:

1) Failure in control top/ptt flex circuit.

2) Bad connection.

3) Defective volume pot.

4) Defective A/D port in host µC.

5) Problem in receive audio circuit.

Volume Set

Error

Using voltmeter,

measure voltage at

U204-PE2 while

turning volume pot

from min to max.

Voltage should vary

from 0 to 5VDC.

Voltage

functional?

Verify connections

and control top/ptt

flex connections.

Yes

Measure resistance from pin 3 of R901

to GND. Value

should be 50KΩ. Measure resistance from pin 2 of R901

to GND while moving

volume pot through range; vlaue should vary from 50KΩ to

0KΩ.

Volume pot?

Replace S901.

Yes

MAEPF-24401-A

Replace U204.

Verify operation of

volume knob per

"Button Check" flow

chart C.20.

Refer to "No

Receive Audio"

flow chart C.29.

Yes

Volume checks

OK?

Page 96

10-14

Chart 23 . Zone/Channel Select Error

Verify codeplug

programming with RSS. If

codeplug checks

good replace

U206.

Channel RTA3 RTA2 RTA1

0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

RTA0

0 0

0 1

1 0

1 1

Synopsis

This chart relates to a failure in reading the zone/channel select knob. Basic Failure modes are as follows:

1) Failure in flex circuit.

2) Bad connection.

3) Defective switch.

4) Defective port in SLIC.

Zone/Channel Select

Error.

Verify operation of

zone knob per "Button

Check" flow chart C.20.

Signals

check good

at U206?

By studying the

adjacent chart against

the channel numbers

which have errors,

one signal may be

determined to be in

error or verify logic

levels at PH3-PH0 at

U206 for each

channel..

Yes

Verify similar

operation directly at

S902.

S902 checks

good?

Replace S902.

Repair flex or

connections as needed.

Yes

MAEPF-24402-A

Chart 24 . Top/Side Button Error

Synopsis This chart relates to a failure in reading the buttons: Top, Top Side, Side Button 1, or Side Button 2. Basic Failure modes are as follows:

1) Failure in flex circuit consisting of R902, R903, R904, R201.

2) Bad connection.

3) Defective switch.

4) Defective A/D port in host µC.

Use RSS to

enable button.

Top/Side Button

Error

Using RSS, verify

problem button is

enabled for function.

Button

enabled?

Yes

Using a voltmeter, measure the voltage at PE3 of U204 while depressing the following button: Button Nom. VDC Top 0.00 Top Side 2.38 Side 1 3.06 Side 2 3.77

Levels

correct?

Replace U204.

Verify connections

and control top/PTT

flex circuit

consisting of R902, R903 ,R904, R201 and repair as

necessary.

Yes

Verify operation of buttons S903, S905, S906,

and S907.

Buttons OK?

Replace frame

assembly.

Yes

MAEPF-24400-A

Verify operation of

buttons per "Button

Check" flow chart C.20.

Buttons

check good?

Yes

Page 97

10-15

Chart 25 . No Display

Replace U204.

Synopsis This chart relates to a failure in the display. The display is considered not field repairable and must be replaced as a uint. Basic Failure modes are as follows:

1) Non-display model radio.

2) Bad connection.

3) Defective µC.

No Display.

Verify display model

with RSS.

Verify signal activity on

J601-2 and J601-1

during mode select

changes.

Activity?

Verify J601

connections and bias.

Yes

Wrong model?

Fix with RSS.

Yes

J601 checks?Repair J601.

MAEPF-24403-A

Replace display

module.

Page 98

10-16

Chart 26 . No TX Modulation

Replace U406 if

continuity of

signals EXT/INT_SPKR and MICEN from

U401 to U406

verifies and PTT

was initiated

from external.

*Note: Q401 ia a

non-inverting

transistor buffer.

Synopsis This failure indicates a lack of transmit modulation with the fault lying with the vocoder. It assumes no power up fail codes were displayed. Since all modulation modes occur through the same path, this failure applies to digital/ PL,DPL, etc. Failure modes are as follows:

1) Error with host µC in which PTT is not detected.

2) Missing DSP IRQB interrupt.

3) Missing clock or data on SSI port from/to ADSIC.

4) Non functional control of or faulty Audio PA.

5) Damaged microphone or flex.

6) Faulty ADSIC IC.

Isolate and

repair problems.

See chart C.5.

No TX Modulation (Vocoder Failure)

Set radio to test mode CSQ.

Connect radio to R4005B test box

or equivalent and inject a 1KHz

mic signal with amplitude

sufficient to provide 3KHz

deviation (about 11mV RMS).

Standard bias OK?

Verify standard bias

per Table 3.

Yes

Verify signals per Figs. W8

and W10.

All signals

present?

Replace

Speaker/Mic/Flex

assembly after

verifying continuity

of signal paths.

Fig. W8Trace 1

present?

Replace U406.

Fig. W8-

Trace 3

present?

Yes

Fig. W8-

Trace 4

present?

Yes

Verify signals at U401 are: Signal Logic EXT/INT_SPKR 0 MICEN 1

Control signals

correct?

Verify 1KHz

signal at U401-

EXTMICIN.

Yes

Replace U401.

Audio signal

present at

input to

U401?

Yes

Verify MUX control voltages: Signal Logic U408-4 0 U412-4 1

MUX control

voltages

check?

Check and repair

Q402 inverter

circuit as

necessary.

Yes

MAEPF-24418-A

Verify operation

of MUXs U408 and

U412.

MUXs verify?

Replace as

necessary.

Yes

Repair limiter

circuit comprised

of U411 and

associated

circuitry.

If signal is present

during this test, but

not under normal

conditions (internal

mic.) check MUX

circuitry of U408

and U412 and

microphone bias

elements

R434/R406 and

R430/R408.

Maybe

Fig. W8-Trace 2

present?

Yes

Fault lies with

transceiver board.

Refer to appropriate

chart. "No Transmit

Deviation" V/U - C.28

800MHz - C.27

Verify signals per

Fig. W3 at indicated

points.

Fig. W3-Trace 2

present?

Fig. W3-

Traces 1 and

3 present?

Replace U406.

Replace U405.

Yes

PTT radio using external

PTT switch. Verify signals

per Figs. W8 and W10.

Verify LED on top of radio is

lit RED.

Trace PTT (int/ext)

from switch to

U206 and correct

opens. If no

problems found,

replace U206.

Yes

Replace U406.

Fault lies with

transceiver board.

Refer to appropriate

chart. "No Transmit

800MHz - C.27

Page 99

10-17

Chart 27 . 800MHz No TX Deviation

Replace J401

header.

No TX Deviation

800MHz Transceiver

Audio at pin

15 of J1?

Set radio to test mode CSQ.

Connect radio to R4005B test box

or equivalent and inject a 1KHz

mic signal with amplitude

sufficient to provide 3KHz

deviation (about 11mV RMS).

PTT radio using external

PTT switch. Verify signals

per Figs. W8 and W10.

Yes

Check

continuity

between pin

15 of J1 and

pin 5 of U302.

MAEPF-24405-O

Yes

Audio at pin 5

of U302?

Audio at pin 30

of U302?

Replace U302.

Check components

C316,

C315,R305,C324,

and R314.

Chart 28 . VHF/UHF No TX Deviation

No TX Deviation

VHF/UHF Transceiver

Audio at pin

15 of J1?

Set radio to test mode CSQ.

Connect radio to R4005B test box

or equivalent and inject a 1KHz

mic signal with amplitude sufficient to provide 3KHz

deviation (about 11mV RMS).

PTT radio using external

PTT switch. Verify signals

per Figs. W8 and W10.

Yes

Audio & voltage at U204-5?

Check C303 &

continuity of

J1.

Replace U204.

Yes

Audio & voltage at

U204-30?

Check

continuity of

J1.

Audio &

voltage

between C231

& C233?

Check solder

joint and for

broken runner.

Yes

Suspect R208.

VSF* at

R208?

Check U204.

Voltage

between R207

& R208?

*VSF = Voltage from Super Filter

(U204, pin 19) 4.6VDC.

Yes

Voltage at

CR202?

Audio between

R207 &

R208?

Yes

MAEPF-24404-O

C225 OK?

Suspect R207

or C231.

Replace C225.

Suspect

L218.

Yes

Page 100

10-18

Chart 29 . No RX Audio

Synopsis This failure indicates a lack of received audio with the fault lying with the vocoder. It assumes a functional transceiver board and no power up fail codes were displayed. Since all received signal modes occur through this same path, this failure applies to digital/ PL,DPL, etc. Failure modes are as follows:

1) Missing DSP IRQB interrupt.

2) Lack of 2.4 REF clock and/or data from ABACUS.

3) Missing clock or data on SSI port from ADSIC.

4) Non functional control of or faulty Audio PA.

5) Damaged speaker or speaker flex.

6) Faultu ADSIC.

Isolate and

repair problems.

See chart C.5.

No Receive Audio (Vocoder Failure)

Set radio to test mode

CSQ. Inject a 1KHz

modulated signal at the

carrier frequency at

-60dBm level with 3KHz deviation.

Standard bias OK?

Verify standard bias

per table Table 3.

Yes

Verify signals

present at ADSIC

(U406) per Fig. W10

and Fig. W5. Note

DOUT and DOUT* are

low level voltage

signals.

Signals

present?

During a mode

change, verify an

ABACUS

programming

sequence occurs

per Fig. W4

probing on the

ABACUS carrier.

ABACUS is

programmed

Verify SBI signal

connection

between ADSIC and

ABACUS ICs.

Repair as

necessary. If

connection good,

replace U406.

Yes

Fault lies with

transceiver board. Refer to appropriate section. Chart C.30

Verify signals per

Fig. W7 at points

indicated.

Signals

present?

Replace

Speaker/Flex

assembly after

verifying continuity

of signal paths.

Fig. W7-

Trace 1

present?

Yes

Replace U406.

Fig. W7-

Trace 2

present?

Yes

Verify signals per Fig.

W2 at points

indicated.

Signals

present?

Replace U406.

Yes

Fig. W7-

Trace 3 or 4

not present or

in phase?

Verify signals

EXT/INT_SPKR

and AMPEN at

U401 are logic

high.

Replace

Speaker/Flex

assembly after

verifying continuity

of signal paths.

Yes

Control signals

correct?

Replace U401.

Yes

MAEPF-24406-A

Replace U406 if continuity

of signals EXT/INT_SPKR and AMPEN from U401 to

U406 verifies..

At this point the fault could lie with a faulty

ADSIC, or it could be

the DSP does not

see/service the IRQB

or SC1 interrupt from

ADSIC!

Check for continuity

between U405 and

U406 of the signals

depicted in Fig. W2

and the 8KHz IRQB.

Connections

good?

Repair

connections.

Yes

Perform radio

function which

causes an alert

tone to be

generated.

Alert tone

audible?

Replace U405.

Replace U406.

Yes

Make sure no

external

mic/speaker is

attached to

universal

connector which

would cause the radios to select

EXT_SPKR.

Yes

Motorola ASTRO Digital Saber, ASTRO R Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual