Mosel Vitelic V62C2164096L-70T, V62C2164096L-70BI, V62C2164096L-70B, V62C2164096LL-85TI, V62C2164096LL-85T Datasheet

MOSEL VITELIC

1

V62C2164096
256K x 16, 0.17 µm CMOS STATIC RAM

PRELIMINARY

V62C2164096 Rev.1.0 November 2001

Features

■ High-speed: 70, 85 ns

■ Ultra low CMOS standby current of 4µA (max.)

■ Fully static operation

■ All inputs and outputs directly TTL compatible

■ Three state outputs

■ Ultra low data retention current (V

CC

=1.2V)

■ Operating v oltage: 2.3V – 3.0V

■ Packages

– 44-pin TSOP (Standard)
– 48-Ball CSP BGA (8mm x 10mm)

Description

The V62C2164096 is a 4,194,3 04-bit sta tic
random-access memory organized as 262,144
words by 16 bits. Inputs and three-state outputs are
TTL compatible and allow for direct interfacing w ith
common system bus structures.

Device Usage Chart

Operating

Temperature

Range

Package Outline Access Time (ns) Power

Temperature

MarkTB7085LLL

0°Cto70°C• ••••• Blank

–40°Cto+85°C• • • • • I

Functional Block Diagram

Row

Decoder

1024 x 4096

Memory Array

Input
Data

Circuit

Column I/O

Column Decoder

Control

Circuit

V

CC

GND

A

0

A

8

A

9

A

7

A

6

I/O

1

I/O

16

LBE

OE

WE

UBE

A

10

A

17

CE

1

CE

2

2

V62C2164096 Rev.1.0 November 2001

MOSEL VITELIC

V62C2164096

Pin Descriptions

A0–A

17

Address Inputs

These 18 address inputs select one of the 256K x
16 bit segments in th e RAM.

CE

1

,CE2* Chip Enable Inputs

CE

1

is active LOW and CE2is active HIGH. Both
chip enabl es must be active to read from or write to
the device. If either chip enable is not active, the
device is deselected and i s in a s tandby power
mode. The I/O pins will be in the high-impedance
state when deselected.

OE

Output Enable Input

The output enable input is active LOW. With chip
enabled, when OE

is Low and WE High, data will
be presented on the I/O pins. The I /O pins w ill be in
the high impeda nc e state when OE

is High.

UBE

,LBE Byte Enable

Active low inputs. These inputs are used to enable
the upper or lower dat a byte.

WE

WriteEnable Input

The write enable in put is active LOW and controls
read and write operations. With the chip enabled,
when WE

is HIGH and OE is LOW, out put data will

be present at the I/O pins; when WE

is LOW and
OE is HIGH, the data present on the I/O pins will be
written into the selected memory locations.

I/O

1

–I/O

16

Data Input and Data Output Ports

These 16 bidirectional ports are used to read data
from and write data into the RAM.

V

CC

Power Supply

GND Ground

Pin Configurations (Top View)

44-Pin TSO P-II (Standard)

48 BGA

A4
A3
A2
A1
A0

CE

1

I/O1
I/O2
I/O3
I/O4

VCC

GND

I/O5
I/O6
I/O7
I/O8

WE
A15
A14
A13
A12
A16

A5
A6
A7
OE
UBE
LBE
I/O16
I/O15
I/O14
I/O13
GND
VCC
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
A17

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

A

123456 1

Note: NC means no connect.

23456

B
C
D
E
F
G

H

TOP VIEW

TOP VIEW

A

BLE
I/O9

I/O10

B
C
D
E

F
G
H

VSS

VCC
I/O15
I/O16

NC

OE

BHE
I/O11
I/O12
I/O13
I/O14

NC

A8

A0
A3

A5

A17

NC
A14
A12

A9

A1
A4

A6
A7

A16
A15
A13
A10

A2

CE

1

I/O2
I/O4
I/O5
I/O6

WE

A11

CE

2

I/O1

I/O3
VCC
VSS

I/O7

I/O8

NC

*CE2is available on BGA package only.

MOSEL VITELIC

V62C2164096

3

V62C2164096 Rev.1.0 November 2001

Part Number Information

Absolute Maximum Ratings

(1)

NOTE:

1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation ofthe device at these or any otherconditions above those indicatedin the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Symbol Parameter Commercial Industrial Units

V

CC

Supply Voltage -0.5 to VCC+ 0.5 -0.5 to VCC+0.5 V

V

N

Input Voltage -0.5 to VCC+ 0.5 -0.5 to VCC+0.5 V

V

DQ

Input/OutputVoltage Applied VCC+0.3 VCC+0.3 V

T

BIAS

Temperature Under Bias -10 to+125 -65 to +135 °C

T

STG

Storage Temperature -55 to +125 -65 to +150 °C

SRAM

FAMILY

C = CMOS PROCESS

62 = STANDARD

21 = 2.3V–3.0V

OPERATING

VOLTAGE

4096K

ORGANIZATION

PKGSPEED

62 C 1621 4096 –

MOSEL-VITELIC

MANUFACTURED

V

16 = 16-bit

70 ns
85 ns

TEMP.

BLANK = 0°C to 70°C
I = -40°C to +85°C

T = TSOP STANDARD
B = BGA

DENSITY

PWR.

L = LOW POWER
LL = DOUBLE LOW POWER

Capacitance* T

A

=25°C, f = 1.0MHz

NOTE:

1. This parameter is guaranteed and not tested.

Symbol Parameter Conditions Max. Unit

C

IN

Input Capacitance VIN=0V 6 pF

C

OUT

Output Capacitance V

I/O

=0V 8 pF

Truth Table

NOTE:

X=Don’t Care, L= LOW, H = HIGH

Mode CE1CE2OE WE UBE LBE

I/O

9-16

Operation

I/O

1-8

Operation

Standby H X X X X X High Z High Z

Standby X L X X X X High Z High Z
Output Disable L H X X H H High Z High Z
Output Disable L H H H X X High Z High Z

Read L H L H L L D

OUT

D

OUT

Read L H L H L H D

OUT

High Z

Read L H L H H L High Z D

OUT

Write L H X L L L D

IN

D

IN

Write L H X L L H D

IN

High Z

Write L H X L H L High Z D

IN