Mosel Vitelic V62C21164096LL-85TI, V62C21164096LL-85T, V62C21164096LL-85BI, V62C21164096LL-85B, V62C21164096LL-70TI Datasheet

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MOSEL VITELIC
V62C21164096 256K x 16, 0.20 µm CMOS STATIC RAM
PRELIMINARY

Features

High-speed: 70, 85 ns
Fully static operation
All inputs and outputs directly TTL compatible
Three state outputs
Ultra low data retention current (V
CC
=1.2V)
Operating voltage: 2.3V – 3.0V
Packages
– 44 -p in TSOP (Standard) – 48 -Bal l CSP BGA (8mm x 10m m)

Functional Block Diagram

A
0
A
6
A
7
A
8
A
9
Row
Decoder

Description

The V62C21164096 is a 4,194,304-bit static random-access memory organized as 262,144 words by 16 bits. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.
V
CC
1024 x 4096
Memory Array
GND
I/O
I/O
UBE
LBE
OE
WE CE CE
1
Input Data
Circuit
16
Control
Circuit
1 2
Column I/O
Column Decoder
A
10
A
17

Device Usage Chart

Operating
Temperature
Range
0°Cto70°C• ••••• Blank
–40°Cto+85°C• • • • I
Package Outline Access Time (ns) Power
Temperature
MarkTB7085LLL
V62C21164096 Rev.1.6 October 2001
1
MOSEL VITELIC

Pin Descriptions

A0–A
17
These 18 address inputs selec t one of the 256K x 16 bit segments in the RAM .
,CE2* Chip Enable Inputs
CE
1
CE
is active LOW and CE2is active HIGH. Both
1
chip enables must be active to read from or write to the device. If either chi p ena ble is not active, the device is deselected and i s in a standby p ower mode. The I/O pins will be in the high-imped anc e state when deselected.
OE
The output enable input is active LOW. With chip enabled, when OE be pres ented on the I/O pins. The I/O pins will be in the high impedance state when OE
*CE2is available on BGA package only.
Address Inputs
Output Enable Input
is Low and WE High, data will
is High.

Pin Configurations (Top View)

A4
1 2
A3
3
A2
4
A1
5
A0
CE I/O1 I/O2 I/O3 I/O4
VCC
GND
I/O5 I/O6 I/O7 I/O8
WE
A15
A14
A13
A12
A16
6
1
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
44-Pin TSOP-II (Standard)
V62C21164096
UBE
,LBE Byte Enable
Active low inputs. These inputs are used to enable the up per or lower data byte.
WE
The write enable input is active LOW and controls read and write operations. With the chip enabled, when WE be present at the I/O pins; when WE OE is HIGH, the data present on the I/O pins will be written into the selected memory locations.
–I/O
I/O
1
These 16 bidirectional ports are used to read data from and write data into the RAM.
V
CC
GND Ground
WriteEnable Input
is HIGH and OE is LOW, output data will
is LOW and
Data Input and Data Outp ut Ports
16
Power Supply
A5
44 43
A6
42
A7
41
OE
40
UBE
39
LBE
38
I/O16
37
I/O15
36
I/O14
35
I/O13
34
GND
33
VCC
32
I/O12
31
I/O11
30
I/O10
29
I/O9
28
NC
27
A8
26
A9
25
A10
24
A11
23
A17
A B C D E F G
H
V62C21164096 Rev.1.6 October 2001
48 B GA
123456 1
BLE
A
I/O9
B
I/O10
C
VSS
D
VCC
E F
I/O15
G
I/O16
NC
H
Note: NC means no connect.
TOP VIEW
2
23456
OE
BHE I/O11 I/O12 I/O13 I/O14
NC
A8
A0
A1
A3
A4
A5
A6
A17
A7
NC
A16
A14
A15
A12
A13
A9
A10
TOP VIEW
A2 CE I/O2 I/O4
I/O5 I/O6
WE A11
CE I/O1
1
I/O3 VCC VSS
I/O7
I/O8
NC
2
MOSEL VITELIC

Part Number Information

62 C 1621 4096
V
V62C21164096
MOSEL-VITELIC
MANUFACTURED
62 = STANDARD
C = CMOS PROCESS
SRAM
FAMILY
21 = 2.3V–3.0V
Absolute Maximum Ratings
OPERATING
VOLTAGE
16 = 16-bit
(1)
DENSITY
4096K
ORGANIZATION
PWR.
70 ns 85 ns
L = LOW POWER LL = DOUBLE LOW POWER
TEMP.
PKGSPEED
BLANK = 0°C to 70°C I = -40°C to +85°C
T = TSOP STANDARD B = BGA
Symbol Parameter Commercial Industrial Units
V
CC
V
N
V
DQ
T
BIAS
T
STG
NOTE:
1. Stresses greater than those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. This is a stress rating only and functional operation of thedevice atthese or any other conditions above those indicated in the operational sectionsof this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Supply Voltage -0.5 to VCC+ 0.5 -0.5 to VCC+0.5 V Input Voltage -0.5 to VCC+ 0.5 -0.5 to VCC+0.5 V Input/Output Voltage Applied VCC+0.3 VCC+0.3 V Temperature UnderBias -10 to+125 -65 to+135 °C Storage Temperature -55 to +125 -65 to +150 °C

Capacitance* T
=25°C, f = 1.0MHz
A
Symbol Parameter Conditions Max. Unit
C
IN
C
OUT

Input Capacitance VIN=0V 6 pF Output Capacitance V

=0V 8 pF
I/O
NOTE:
1. This parameter is guaranteed and not tested.

Truth Table

I/O
Mode CE1CE2OE WE UBE LBE
9-16
Operation

Standby H X X X X X High Z High Z

Standby X L X X X X High Z HighZ Output Disable L H X X H H High Z High Z Output Disable L H H H X X Hi gh Z High Z

Read L H L H L L D Read L H L H L H D

OUT OUT

Read L H L H H L High Z D Write L H X L L L D Write L H X L L H D

IN IN

Write L H X L H L High Z D

NOTE:
X=Don’t Care, L =LOW, H = HIGH
I/O
Operation
D

High Z

D

High Z

1-8
OUT
OUT
IN
IN
V62C21164096 Rev.1.6 October 2001
3
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