Mosel Vitelic V62C18164096LL-85B, V62C18164096LL-100B, V62C18164096L-85BI, V62C18164096L-85B, V62C18164096L-100B Datasheet

MOSEL VITELIC

1

V62C18164096
256K x 16, CMOS STATIC RAM

PRELIMINARY

V62C18164096 Rev. 1.2 June 2000

Features

■

High-speed: 85, 100 ns

■

Ultra low CMOS standby current of 2 µ A (max.)

■

Fully static operation

■

All inputs and outputs directly TTL compatible

■

Three state outputs

■

Ultra low data retention current (V

CC

= 1.0V)

■

Operating voltage: 1.8V – 2.3V

■

Packages
– 48-Ball CSP BGA (8mm x 10mm)

Description

The V62C18164096 is a 4,194,304-bit static
random-access memory organized as 262,144
words by 16 bits. Inputs and three-state outputs are
TTL compatible and allow for direct interfacing with
common system bus structures.

Device Usage Chart

Operating Temperature

Range

Package Outline Access Time (ns) Power

Temperature

MarkB 85 100 L LL

0 °

C to 70 ° C • • • • • Blank

–40 ° C to +85 ° C••• •I

Functional Block Diagram

Row

Decoder

1024 x 4096

Memory Array

Input
Data

Circuit

Column I/O

Column Decoder

Control

Circuit

V

CC

GND

A

0

A

8

A

9

A

7

A

6

I/O

1

I/O

16

LBE

OE

WE

UBE

A

10

A

17

CE

1

CE

2

2

V62C18164096 Rev. 1.2 June 2000

MOSEL VITELIC

V62C18164096

Pin Descriptions

A

0

–A

17

Address Inputs

These 18 address inputs select one of the 256K x
16 bit segments in the RAM.

CE

1

, CE

2

Chip Enable Inputs

CE

1

is active LOW and CE

2

is active HIGH. Both
chip enables must be active to read from or write to
the device. If either chip enable is not active, the
device is deselected and is in a standby power
mode. The I/O pins will be in the high-impedance
state when deselected.

OE

Output Enable Input

The output enable input is active LOW. With the
chip enabled, when OE is Low and WE High, data
will be presented on the I/O pins. The I/O pins will
be in the high impedance state when OE is High.

UBE, LBE Byte Enable

Active low inputs. These inputs are used to enable
the upper or lower data byte.

WE Write Enable Input

The write enable input is active LOW and controls
read and write operations. With the chip enabled,
when WE is HIGH and OE is LOW, output data will
be present at the I/O pins; when WE is LOW and
OE is HIGH, the data present on the I/O pins will be
written into the selected memory locations.

I/O

1

–I/O

16

Data Input and Data Output Ports

These 16 bidirectional ports are used to read data
from and write data into the RAM.

V

CC

Power Supply

GND Ground

Pin Configurations (Top View)

48 BGA

A

123456 1

Note: NC means no connect.

23456

B
C
D
E

F

G
H

TOP VIEW

TOP VIEW

A

BLE
I/O9

I/O10

B
C
D
E

F
G
H

VSS

VCC
I/O15
I/O16

NC

OE

BHE
I/O11
I/O12
I/O13
I/O14

NC

A8

A0
A3

A5

A17

NC
A14
A12

A9

A1
A4

A6
A7

A16
A15
A13
A10

A2

CE

1

I/O2
I/O4
I/O5
I/O6

WE

A11

CE

2

I/O1

I/O3
VCC
VSS

I/O7

I/O8

NC

MOSEL VITELIC

V62C18164096

3

V62C18164096 Rev. 1.2 June 2000

Part Number Information

Absolute Maximum Ratings

(1)

NOTE:

1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Symbol Parameter Commercial Industrial Units

V

CC

Supply Voltage -0.5 to V

CC

+ 0.5 -0.5 to V

CC

+ 0.5 V

V

N

Input Voltage -0.5 to V

CC

+ 0.5 -0.5 to V

CC

+ 0.5 V

V

DQ

Input/Output Voltage Applied V

CC

+ 0.3 V

CC

+ 0.3 V

T

BIAS

Temperature Under Bias -10 to +125 -65 to +135

°

C

T

STG

Storage Temperature -55 to +125 -65 to +150

°

C

SRAM

FAMILY

C = CMOS PROCESS

62 = STANDARD

18 = 1.8V – 2.3V

OPERATING

VOLTAGE

4096K

ORGANIZATION

PKGSPEED

62 C 1618 4096 –

MOSEL-VITELIC

MANUFACTURED

V

16 = 16-bit

85 ns
100 ns

TEMP.

BLANK = 0°C to 70°C
I = -40°C to +85°C

B = BGA

DENSITY

PWR.

L = LOW POWER
LL = DOUBLE LOW POWER

Capacitance*

T

A

= 25 ° C, f = 1.0MHz

NOTE:

1. This parameter is guaranteed and not tested.

Symbol Parameter Conditions Max. Unit

C

IN

Input Capacitance V

IN

= 0V 6 pF

C

OUT

Output Capacitance V

I/O

= 0V 8 pF

Truth Table

NOTE:

X = Don’t Care, L = LOW, H = HIGH

Mode CE

1

CE

2

OE

WE UBE LBE

I/O

9-16

Operation

I/O

1-8

Operation

Standby H X X X X X High Z High Z

Standby X L X X X X High Z High Z
Output Disable L H X X H H High Z High Z
Output Disable L H H H X X High Z High Z

Read LHLHL L D

OUT

D

OUT

Read LHLHL H D

OUT

High Z

Read LHLHH L High Z D

OUT

Write L H X L L L D

IN

D

IN

Write L H X L L H D

IN

High Z

Write L H X L H L High Z D

IN