MOSEL VITELIC
1
V62C1804096
512K X 8, CMOS STATIC RAM
PRELIMINARY
V62C1804096 Rev.1.0 October 2001
Features
■ High-speed: 85, 100 ns
■ Ultra low standby current of 2µA (max.)
■ Fully static operation
■ All inputs and outputs directly compatible
■ Three state outputs
■ Ultra low data retention current (V
CC
=1.0V)
■ Operating voltage: 1.8V–2.3V
■ Packages
– 36-Ball CSP BGA (8mm x 10m m)
Description
The V62C1804096 is a very low power CMOS
static RAM organized as 524,288 words by 8 bits.
Easy memory expansion is provided by an active
LOW CE1
, and active HIGH C E2, an activ e LOW
OE, and t hree static I/O’s. This device has an
automatic power-down mode feature when
deselected.
Device Usage Chart
Operating
Temperature
Range
Package
Outline Access Time (ns) Power
Temperature
MarkB85100LLL
0°C to 70 °C • • • • • Blank
–40°C to +85°C • • • • I
Functional Block Diagram
Row Decoder
Sense Amp
1024
x
4096
Column Decoder
Input Buffer
Control
Circuit
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A10A11A12A13A14A15A
16
I/O1
I/O
8
OE
WE
CE1
CE2
A17A
18
2
V62C1804096 Rev.1.0 October 2001
MOSEL VITELIC
V62C1804096
Pin Descriptions
A0–A
18
Address Inputs
These 19 address inputs select one of the 512K x 8
bit segments in the RAM.
CE
1
,CE2Chip Enable Inputs
CE
1
is active LOW and CE2is active HIGH. Both
chip enables must be active to read from or write to
the device. If either chip enable is not active, the
device is deselected and is in a standby power
mode. The I/O pins will be in the high-impedance
state when deselected.
OE
Output Enable Input
The Output Enable input is active LOW. With chip
enabled, when OE
is LOW and WE HIGH, data of
the selected memory location will be available on
the I/O pins. When OE
is HIGH, the I/O pins will be
in the high impedance state.
WE
WriteEnable Input
The write enable input is active LOW and control s
read and write operations. With the chip enabled,
when WE
is HIGH and OE is LOW, output data will
be present at the I/O pins; when WE
is LOW and
OE
is HI GH, the data presenton the I/ O pins will be
written into the sele cted memo ry locations.
I/O
1
–I/O8Data Input and Data Output Ports
These 8 bidirectional ports are used to read data
from and write data into the RAM.
V
CC
Power Supply
GND Ground
Pin Configurations (Top View)
36 BGA
A
123456 1
Note: NC means no connect.
NB means no ball.
2
TOP VIEW
TOP VIEW
3456
B
C
D
E
F
G
H
A
A0
I/O5
I/O6
B
C
D
E
F
G
H
VSS
VCC
I/O7
I/O8
A9
A1
A2
NB
NB
NB
NB
OE
A10
CE2
WE
NC
NB
NB
A18
CE1
A11
A3
A4
A5
NB
NB
A17
A16
A12
A6
A7
NB
NB
NB
NB
A15
A13
A8
I/O1
I/O2
VCC
VSS
I/O3
I/O4
A14
MOSEL VITELIC
V62C1804096
3
V62C1804096 Rev.1.0 October 2001
Part Number Information
Absolute Maximum Ratings
(1)
NOTE:
1. Stresses greater thanthose listed under “AbsoluteMaximumRatings”maycause permanentdamagetothe device. Thisis astress
rating only and functional operationof the device at these or any other conditions above those indicated in the operational sections
of this specificationis not implied. Exposure to absolutemaximum rating conditions for extendedperiods may affect reliability.
Symbol Parameter Commercial Industrial Units
V
CC
SupplyVoltage -0.5 to + VCC+ 0.5 -0.5to + VCC+0.5 V
V
N
Input Voltage -0.5 to + VCC+ 0.5 -0.5to + VCC+0.5 V
V
DQ
Input/OutputVoltage Applied VCC+0.3 VCC+0.3 V
T
BIAS
Temperature UnderBias -10 to +125 -65 to +135 °C
T
STG
Storage Temperature -55 to +125 -65 to +150 °C
SRAM
FAMILY
C = CMOS PROCESS
62 = STANDARD
18 = 1.8V–2.3V
OPERATING
VOLTAGE
4096K
ORGANIZATION
PKG
SPEED
62 C 818 4096 –
MOSEL-VITELIC
MANUFACTURED
V
8 = 8-bit
85 ns
100 ns
TEMP.
BLANK = 0°C to 70°C
I = -40°C to +85°C
L = LOW POWER
LL = LOW LOW POWER
T = TSOP STANDARD
B = BGA
DENSITY
PWR.
1
1
80
80
Capacitance*
TA=25°C, f = 1.0MHz
NOTE:
1. This parameter is guaranteed and not tested.
Truth Table
NOTE:
X=Don’t Care, L = LOW,H = HIGH
Symbol Parameter Conditions Max. Unit
C
IN
InputCapacitance VIN=0V 6 pF
C
OUT
Output Capacitance V
I/O
=0V 8 pF
Mode CE1CE2OE WE
I/O
Operation
Standby H X X X High Z
Standby X L X X High Z
OutputDisable L H H H HighZ
Read L H L H D
OUT
Write L H X L D
IN