Mosel Vitelic V61C518256-15T, V61C518256-15R, V61C518256-12T, V61C518256-10T, V61C518256-12R Datasheet

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MOSEL VITELIC

V61C518256
32K X 8 HIGH SPEED
STATIC RAM

Features

High-speed: 10, 12, 15 ns
Low Power Dissipation:
– CMOS Standby: 0.5 mA (Max.)
Fully static operation
All inputs and outputs directly compatible
Three state outputs
Ultra low data retention current (V
Single 5V
Packages
– 28-pin TSOP (Standard)
– 28-pin 300 mil SOJ

±

10% Power Supply

A

0

A

1

A

6

A

10

A

13

A

14

Description

The V61C518256 is a 262,144-bit static random
access memory organized as 32,768 words by 8
bits. It is built with MOSEL VITELIC’s high
performance CMOS process. Inputs and three­state outputs are TTL compatible and allow for
direct interfacing with common system bus

CC

= 2V)

structures.

Functional Block Diagram

Row

Decoder

512 x 512

Memory Array

PRELIMINARY

V

CC

GND

Device Usage Chart

Operating

Temperature

Range

°

C to 70

°

0

C •••••• Blank

I/O

I/O

CE
OE

WE

0

Input
Data

Circuit

7

Control

Circuit

Package Outline Access Time (ns)

Column I/O

Column Decoder

A

2

A

5

12

11

518256-01

Temperature

MarkT N R101215

A

A

V61C518256 Rev. 0.3 July 1998

1

MOSEL VITELIC

Pin Descriptions

A

–A

0

These 15 address inputs select one of the 32,768 x
8 bit segments in the RAM.

CE Chip Enable Inputs

CE is an active LOW input. Chip Enable must be
LOW when reading from or writing to the device.
When HIGH, the device is in standby mode with I/O
pins in the high impedance state.

OE Output Enable Input

The Output Enable input is active LOW. When OE
is LOW with CE LOW and WE HIGH, data of the
selected memory location will be available on the
I/O pins. When OE is HIGH, the I/O pins will be in
the high impedance state.

Pin Configurations (Top View)

Address Inputs

14

V61C518256

WE Write Enable Input

An active LOW input, WE input controls read and
write operations. When CE and WE inputs are both
LOW, the data present on the I/O pins will be
written into the selected memory location.

I/O

–I/O

0

These 8 bidirectional ports are used to read data
from and write data into the RAM.

V

CC

GND Ground

Data Input and Data Output Ports

7

Power Supply

A
A

A
A

A
A
A
A
A

A
I/O
I/O
I/O

GND

28-Pin SOJ 28-Pin TSOP (Standard)

OE

22

A9
A8

A7
A6
A5
A4
A3

23
24
25
26
27
28
1
2
3
4
5
6
7

1

14

2

12

3

7

4

6

5

5

6

4

7

3

8

2

9

1

10

0

11

0

12

1

13

2

14

28
27
26
25
24
23
22
21
20
19
18
17
16
15

518256-01

V

CC

WE
A

13

A

8

A

9

A

11

OE
A

10

CE
I/O
I/O
I/O
I/O
I/O

7
6
5
4
3

A11

A13

WE

VCC

A14
A12

21
20
19
18
17
16
15
14
13
12
11
10

518256-03

A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1

9

A2

8

V61C518256 Rev. 0.3 July 1998

2

MOSEL VITELIC

V61C518256

Part Number Information

61 C 851 256 –

V

MOSEL-VITELIC

MANUFACTURED

61 = STANDARD

C = CMOS PROCESS

Absolute Maximum Ratings

SRAM

FAMILY

51 = 5V

(1)

OPERATING

VOLTAGE

ORGANIZATION

8 = 8-bit

DENSITY

256K

PWR.

BLANK = STANDARD

10 ns
12 ns
15 ns

Symbol Parameter Commercial Units

TEMP.

PKGSPEED

BLANK = 0¡C to 70¡C

T = TSOP STANDARD
R = 300-mil SOJ

518256-05

V

CC

V

N

V

DQ

T

BIAS

T

STG

NOTE:

1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Capacitance*

T

= 25

A

Symbol Parameter Conditions Max. Unit

C

IN

C

OUT

NOTE:

* This parameter is guaranteed by design and not tested.

Supply Voltage -0.5 to +7 V
Input Voltage -0.5 to +7 V
Input/Output Voltage Applied V
Temperature Under Bias -55 to +85
Storage Temperature -55 to +125

+ 0.5 V

CC

Truth Table

°

C, f = 1.0MHz

Input Capacitance V
Output Capacitance V

= 0V 6 pF

IN

= 0V 8 pF

I/O

Mode CE

Standby H X X High Z

Read L L H D
Read L H H High Z
Write L X L D

NOTE:

X = Don’t Care, L = LOW, H = HIGH

OE WE

°

C

°

C

I/O

Operation

OUT

IN

V61C518256 Rev. 0.3 July 1998

3

MOSEL VITELIC

DC Electrical Characteristics

(over all temperature ranges, V

CC

= 5V

±

10%)

V61C518256

Symbol Parameter Test Conditions Min. Typ. Max. Units

= Max.

CC

MAX

(1,2)

(1)

(3)

IN

³

£

0.2V, V

= Max, V

CC

= Max, CE

CC

= Min, I

CC

= Min, I

CC

£

V

IL

– 0.2V,

V

CC

CC

-0.5 — 0.8 V

2.2 — 6 V

= 0V to V

IN

= V

= 8mA — — 0.4 V

OL

= -4mA 2.4 — — V

OH

CC

, V

IH

= 0V to V

OUT

CC

Output Open,

-5 — 5

-5 — 5

(4)

110 130 mA

25 40 mA

12mA

= Max.

Ind. Units

V
V

IH

I

IL

I

OL

V

OL

V

OH

Input LOW Voltage

IL

Input HIGH Voltage
Input Leakage Current V
Output Leakage Current V
Output LOW Voltage V
Output HIGH Voltage V

Symbol Parameter Com.

I

CC1

I

SB

I

SB1

NOTES:

1. These are absolute values with respect to device ground and all overshoots due to system or tester noise are included.

2. V

IL

3. f

MAX

4. Maximum values.

Average Operating Current, CE
V

= Max., f = f

CC

TTL Standby Current
CE

, V

³

V

IH

CMOS Standby Current, CE
V

– 0.2V or V

³

V

IN

CC

(Min.) = -3.0V for pulse width < 20ns.

= 1/t

.

RC

m

A

m

A

V61C518256 Rev. 0.3 July 1998

4