MOSEL VITELIC
1
V61C51161024
64K x 16 HIGH SPEED
STATIC RAM
PRELIMINARY
V61C51161024 Rev. 1.0 July 1998
Features
■
High-speed: 10, 12, 15 ns
■
All inputs and outputs directly TTL compatible
■
Three state outputs
■
Byte Control Pins
■
Single 5V
±
10% Power Supply
■
Packages
– 44-pin TSOP (Standard)
– 44-pin 400 mil SOJ
Description
The V61C51161024 is a 1,048,576-bit static
random-access memory organized as 65,536
words by 16 bits. Inputs and three-state outputs are
TTL compatible and allow for direct interfacing with
common system bus structures.
Device Usage Chart
Operating
Temperature
Range
Package Outline Access Time (ns)
Temperature
MarkT K 10 12 15
0
°
C • • • • • Blank
Functional Block Diagram
Row
Decoder
Memory Array
Input
Data
Circuit
Column I/O
Column Decoder
Control
Circuit
V
CC
GND
A
1
6151161024-01
A
9
A
8
A
7
I/O
0
I/O
15
LBE
OE
WE
UBE
A
0
A
10
A
15
CE
2
V61C51161024 Rev. 1.0 July 1998
MOSEL VITELIC
V61C51161024
Pin Descriptions
A
0
–A
15
Address Inputs
These 16 address inputs select one of the 64K x 16
bit segments in the RAM.
CE Chip Enable Input
CE is active LOW. It must be active to read from or
write to the device. If chip enable is not active, the
device is deselected and is in a standby power
mode. The I/O pins will be in the high-impedance
state when deselected.
OE Output Enable Input
The output enable input is active LOW. When OE
is Low with CE Low and WE High, data will be presented on the I/O pins. The I/O pins will be in the
high impedance state when OE is High.
UBE, LEB Byte Enable
Active low inputs. These inputs are used to enable
the upper or lower data byte.
WE Write Enable Input
The write enable input is active LOW and controls
read and write operations. With the chip enabled,
when WE is HIGH and OE is LOW, output data will
be present at the I/O pins; when WE is LOW and
OE is HIGH, the data present on the I/O pins will be
written into the selected memory locations.
I/O
0
–I/O
15
Data Input and Data Output Ports
These 16 bidirectional ports are used to read data
from and write data into the RAM.
V
CC
Power Supply
GND Ground
Pin Configurations (Top View)
44-Pin SOJ 44-Pin TSOP-II (Standard)
144
6151161024-02
2
43
3
42
441
540
6
39
7
38
837
936
10
35
11
34
12 33
13 32
14 31
15
30
16
29
A
3
A
4
A
2
A
1
A
0
CE
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
GND
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
6
A
7
OE
UBE
LBE
I/O
15
I/O
14
I/O
13
I/O
12
V
CC
GND
I/O
11
I/O
10
I/O
9
I/O
8
17
28
A
15
NC
18
27
A
14
A
8
19
26
A
13
A
9
20
25
A
12
A
10
21
24
NC
A
11
22
23
NC
A
5
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
VCC
GND
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
A12
NC
A5
A6
A7
OE
UBE
LBE
I/O15
I/O14
I/O13
I/O12
GND
VCC
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
6151161024-03
MOSEL VITELIC
V61C51161024
3
V61C51161024 Rev. 1.0 July 1998
Part Number Information
Absolute Maximum Ratings
(1)
NOTE:
1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Symbol Parameter Commercial Units
V
CC
Supply Voltage -0.5 to +7 V
V
IN
Input Voltage -0.5 to +7 V
V
DQ
Input/Output Voltage Applied V
CC
+ 0.5 V
T
BIAS
Temperature Under Bias -10 to +85
°
C
T
STG
Storage Temperature -65 to +150
°
C
SRAM
FAMILY
C = CMOS PROCESS
61 = HIGH SPEED
51 = 5V
OPERATING
VOLTAGE
1024K
ORGANIZATION
PKGSPEED
6151161024-04
61 C 1651 1024 –
MOSEL-VITELIC
V
16 = 16-bit
10 ns
12 ns
15 ns
TEMP.
BLANK = 0¡C to 70¡C
T = TSOP STANDARD
K = 400 mil SOJ
DENSITY
PWR.
BLANK = STANDARD POWER
Capacitance*
T
A
= 25
°
C, f = 1.0MHz
NOTE:
1. This parameter is guaranteed by design and not tested.
Symbol Parameter Conditions Max. Unit
C
IN
Input Capacitance V
IN
= 0V 6 pF
C
OUT
Output Capacitance V
I/O
= 0V 8 pF
Truth Table
NOTE:
X = Don’t Care, L = LOW, H = HIGH
Mode CE
OE WE UBE LBE
I/O
8-15
Operation
I/O
0-7
Operation
Standby H X X X X High Z High Z
Output Disable L X X H H High Z High Z
Output Disable L H H X X High Z High Z
Read L L H L L D
OUT
D
OUT
Read L L H L H D
OUT
High Z
Read L L H H L High Z D
OUT
Write L X L L L D
IN
D
IN
Write L X L L H D
IN
High Z
Write L X L H L High Z D
IN