Mosel Vitelic V53C806HK60, V53C806HK50, V53C806HK45, V53C806HK40 Datasheet
MOSEL VITELIC
1
V53C806H
HIGH PERFORMANCE
1M x 8 BIT FAST PAGE MODE
CMOS DYNAMIC RAM
PRELIMINARY
V53C806H Rev. 1.6 April 1998
HIGH PERFORMANCE 40 45 50 60
Max. RAS
Access Time, (t
RAC
) 40 ns 45 ns 50 ns 60 ns
Max. Column Address Access Time, (t
CAA
) 20 ns 22 ns 24 ns 30 ns
Min. Fast Page Mode Cycle Time, (t
PC
) 23 ns 25 ns 28 ns 40 ns
Min. Read/Write Cycle Time, (t
RC
) 75 ns 80 ns 90 ns 120 ns
Features
■
1M x 8-bit organization
■
Fast Page Mode for a sustained data rate of
43 MHz
■
RAS access time: 40, 45, 50, 60 ns
■
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh capability
■
Refresh Interval: 1024 cycle/16 ms
■
Available in 28-pin 400 mil SOJ package
■
Single +5V
±
10% Power Supply
■
TTL Interface
Description
The V53C806H is a ultra high speed 1,048,576 x
8 bit CMOS dynamic random access memory. The
V53C806H offers a combination of features: Fast
Page Mode for high data bandwidth, and Low
CMOS standby current.
All inputs and outputs are TTL compatible. Input
and output capacitances are significantly lowered to
allow increased system performance. Fast Page
Mode operation allows random access of up to
1024 x 8 bits within a row with cycle times as fast as
23 ns. Because of static circuitry, the CAS
clock is
not in the critical timing path. The flow-through column address latches allow address pipelining while
relaxing many critical system timing requirements.
The V53C806H is ideally suited for graphics, digital signal processing and high-performance computing systems.
Device Usage Chart
Operating
Temperature
Range
Package Outline Access Time (ns) Power
Temperature
Mark
K 40 45 50 60 Std.
0
°
C to 70
°
C • •••• • Blank
2
V53C806H Rev. 1.6 April 1998
MOSEL VITELIC
V53C806H
FAMILY DEVICE PKG
(t
RAC
)
SPEED
PWR.
V53C
40 (40 ns)
45 (45 ns)
50 (50 ns)
60 (60 ns)
TEMP.
BLANK (0¡C to 70¡C)
BLANK (NORMAL)
K (SOJ)
806H
808H-01
Description Pkg. Pin Count
SOJ K 28
28-Pin SOJ
PIN CONFIGURATION
Top View
Pin Names
V
CC
IO1
IO2
IO3
IO4
WE
NC
NC
A0
A1
A2
A3
1
2
3
4
5
6
8
9
10
11
12
13
28
27
806H-02
26
25
24
23
21
20
19
18
17
V
SS
IO8
IO7
IO6
IO5
CAS
A9
A8
A7
A6
A5
A4
16
RAS
V
CC
7
14
22 OE
V
SS
15
A
0
–A
9
Address Inputs
RAS
Row Address Strobe
CAS
Column Address Strobe
WE
Write Enable
OE
Output Enable
I/O
1
–I/O
8
Data Input, Output
V
CC
+5V Supply
V
SS
0V Supply
NC No Connect
Absolute Maximum Ratings*
Ambient Temperature
Under Bias..................................–10
°
C to +80
°
C
Storage Temperature (plastic)......–55
°
C to +125
°
C
Voltage Relative to V
SS
.................–1.0 V to +7.0 V
Data Output Current..................................... 50 mA
Power Dissipation.......................................... 1.4 W
*Note: Operation above Absolute Maximum Ratings can
adversely affect device reliability.
Capacitance*
T
A
= 25
°
C, V
CC
= 5 V
±
10%, f = 1 MHz
* Note: Capacitance is sampled and not 100% tested
Symbol Parameter Typ. Max. Unit
C
IN1
Address Input 3 4 pF
C
IN2
RAS
, CAS, WE, OE 45pF
C
OUT
Data Input/Output 5 7 pF
3
V53C806H Rev. 1.6 April 1998
MOSEL VITELIC
V53C806H
Block Diagram
A
0
A
1
A
8
A
9
SENSE AMPLIFIERS
REFRESH
COUNTER
V
CC
V
SS
10
I/O
1
ADDRESS BUFFERS
AND PREDECODERS
X0-X
ROW
DECODERS
1024
MEMORY
ARRAY
1024 x 1024 x 8
COLUMN DECODERS
DATA I/O BUS
Y
0
-Y
9
1024 x 8
I/O
BUFFER
I/O
2
I/O
3
I/O
4
OE CLOCK
GENERATOR
WE CLOCK
GENERATOR
CAS CLOCK
1M x 8
GENERATOR
RAS CLOCK
GENERATOR
OE
806H-03
WE
CAS
RAS
•
•
•
9
I/O
5
I/O
6
I/O
7
I/O
8
4
V53C806H Rev. 1.6 April 1998
MOSEL VITELIC
V53C806H
DC and Operating Characteristics
T
A
= 0
°
C to 70
°
C, V
CC
= 5 V
±
10%, V
SS
= 0 V, unless otherwise specified.
Symbol Parameter
Access
Time
V53C806H
Unit Test Conditions NotesMin. Typ. Max.
I
LI
Input Leakage Current
(any input pin)
–10 10
m
AV
SS
£
V
IN
£
V
CC
I
LO
Output Leakage Current
(for High-Z State)
–10 10
m
AV
SS
£
V
OUT
£
V
CC
RAS
, CAS at V
IH
I
CC1
V
CC
Supply Current,
Operating
40 220 mA t
RC
= t
RC
(min.) 1, 2
45 210
50 200
60 190
I
CC2
V
CC
Supply Current,
TTL Standby
4 mA RAS
, CAS at V
IH
other inputs
³
V
SS
I
CC3
V
CC
Supply Current,
RAS
-Only Refresh
40 220 mA t
RC
= t
RC
(min.) 2
45 210
50 200
60 190
I
CC4
V
CC
Supply Current,
Fast Page Mode
Operation
40 110 mA Minimum cycle 1, 2
45 100
50 90
60 80
I
CC5
V
CC
Supply Current,
Standby, Output Enabled
2.0 mA RAS
= V
IH
, CAS
= V
IL
other inputs
³
V
SS
1
I
CC6
V
CC
Supply Current,
CMOS Standby
2.0 mA RAS
³
V
CC
– 0.2 V,
CAS
³
V
CC
– 0.2 V,
All other inputs
³
V
SS
V
CC
Supply Voltage 4.5 5.0 5.5 V
V
IL
Input Low Voltage –1 0.8 V 3
V
IH
Input High Voltage 2.4 V
CC
+ 1 V 3
V
OL
Output Low Voltage 0.4 V I
OL
= 4.2 mA
V
OH
Output High Voltage 2.4 V I
OH
= –5 mA
5
V53C806H Rev. 1.6 April 1998
MOSEL VITELIC
V53C806H
AC Characteristics
T
A
= 0
°
C to 70
°
C, V
CC
= 5 V
±
10%, V
SS
= 0V unless otherwise noted
AC Test conditions, input pulse levels 0 to 3V
# Symbol Parameter
40 45 50 60
Unit NotesMin. Max. Min. Max. Min. Max. Min. Max.
1t
RAS
RAS
Pulse Width 40 75K 45 75K 50 75K 60 75K ns
2t
RC
Read or Write Cycle Time 75 80 90 110 ns
3t
RP
RAS Precharge Time 25 25 30 40 ns
4t
CSH
CAS Hold Time 40 45 50 60 ns
5t
CAS
CAS Pulse Width 12 13 14 15 ns
6t
RCD
RAS to CAS Delay 17 28 18 32 19 36 20 43 ns
7t
RCS
Read Command Setup Time 0000ns4
8t
ASR
Row Address Setup Time 0000ns
9t
RAH
Row Address Hold Time 7 8 9 10 ns
10 t
ASC
Column Address Setup Time 0000ns
11 t
CAH
Column Address Hold Time 5 6 7 10 ns
12 t
RSH (R)
RAS Hold Time (Read Cycle) 12 13 14 15 ns
13 t
CRP
CAS to RAS Precharge Time 5555ns
14 t
RCH
Read Command Hold Time
Referenced to CAS
0000ns5
15 t
RRH
Read Command Hold Time
Referenced to RAS
0000ns5
16 t
ROH
RAS Hold Time Referenced to OE 8 9 10 10 ns
17 t
OAC
Access Time from OE 12 13 14 17 ns
18 t
CAC
Access Time from CAS 12 13 14 17 ns 6, 7
19 t
RAC
Access Time from RAS 40 45 50 60 ns 6, 8, 9
20 t
CAA
Access Time from Column Address 20 22 24 30 ns 6, 7, 10
21 t
LZ
CAS to Low-Z Output 0000ns16
22 t
HZ
Output buffer turn-off delay time 060708010ns16
23 t
AR
Column Address Hold Time
from RAS
30 35 40 45 ns
24 t
RAD
RAS to Column Address 12 20 13 23 14 26 15 30 ns 11
Delay Time
25 t
RSH (W)
RAS or CAS Hold Time in Write
Cycle
12 13 14 15 ns
26 t
CWL
Write Command to CAS Lead Time 12 13 14 15 ns
27 t
WCS
Write Command Setup Time 0000ns12, 13
28 t
WCH
Write Command Hold Time 5 6 7 10 ns
29 t
WP
Write Pulse Width 5 6 7 10 ns
6
V53C806H Rev. 1.6 April 1998
MOSEL VITELIC
V53C806H
30 t
WCR
Write Command Hold Time
from RAS
30 35 40 45 ns
31 t
RWL
Write Command to RAS Lead Time 12 13 14 15 ns
32 t
DS
Data in Setup Time 0000ns14
33 t
DH
Data in Hold Time 5 6 7 10 ns 14
34 t
WOH
Write to OE Hold Time 6 7 8 10 ns 14
35 t
OED
OE to Data Delay Time 6 7 8 10 ns 14
36 t
RWC
Read-Modify-Write Cycle Time 110 115 130 170 ns
37 t
RRW
Read-Modify-Write Cycle RAS Pulse
Width
75 80 87 105 ns
38 t
CWD
CAS to WE Delay 30 32 34 40 ns 12
39 t
RWD
RAS to WE Delay in Read-Modify-
Write Cycle
58 62 68 85 ns 12
40 t
CRW
CAS Pulse Width (RMW) 48 50 52 65 ns
41 t
AWD
Col. Address to WE Delay 38 41 42 58 ns 12
42 t
PC
Fast Page Mode
Read or Write Cycle Time
23 25 28 40 ns
43 t
CP
CAS Precharge Time 5678ns
44 t
CAR
Column Address to RAS Setup
Time
20 22 24 30 ns
45 t
CAP
Access Time from Column
Precharge
23 25 27 34 ns 7
46 t
DHR
Data in Hold Time Referenced
to RAS
30 35 40 50 ns
47 t
CSR
CAS Setup Time CAS-before-RAS
Refresh
10 10 10 10 ns
48 t
RPC
RAS to CAS Precharge Time 0000ns
49 t
CHR
CAS Hold Time CAS-before-RAS
Refresh
8 101215ns
50 t
PCM
Fast Page Mode Read-Modify-Write
Cycle Time
60 65 70 85 ns
51 t
T
Transition Time (Rise and Fall) 3 50 3 50 3 50 3 50 ns 15
52 t
REF
Refresh Interval (1024 Cycles) 16 16 16 16 ms
# Symbol Parameter
40 45 50 60
Unit NotesMin. Max. Min. Max. Min. Max. Min. Max.
AC Characteristics
(Cont’d)
Loading...