MorethanIP Stratix II GX User Guide
Stratix II GX Embedded Gigabit Ethernet MAC / PHY
User's Guide
Version 1.0 - October 2005
Stratix II GX Embedded Gigabit
Ethernet MAC / PHY
User's Guide
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Stratix II GX Embedded Gigabit Ethernet MAC / PHY
User's Guide
Version 1.0 - October 2005
Contents
1 DESIGN KIT INSTALLATION.........................................................................................................3
1.1 PLATFORM SPECIFIC JAVA RUNTIME INSTALLATION ......................................................................3
1.2 DESIGN KIT INSTALLATION ............................................................................................................3
2 DESIGN FLOW................................................................................................................................4
3 GENERATING THE MAC/PHY CORE............................................................................................5
3.1 OVERVIEW ...................................................................................................................................5
3.2 CORE CONFIGURATION OPTIONS ..................................................................................................6
3.3 DESIGN KIT DATABASE .................................................................................................................7
3.4 SIMULATION ENVIRONMENT ..........................................................................................................7
3.5 RUNNING SIMULATION USING MODELSIM SE.................................................................................8
Overview..........................................................................................................................................8
Testbuilder Options..........................................................................................................................9
3.6 RUNNING SIMULATION USING MODELSIM PE OR MODELSIM AE....................................................13
Overview........................................................................................................................................13
Simulation Options.........................................................................................................................13
3.7 DESIGN IMPLEMENTATION WITH QUARTUS II ................................................................................16
3.8 VQM NETLIST GENERATION .......................................................................................................16
3.9 FULL TIMING GATE LEVEL SIMULATION........................................................................................17
4 CONTACT .....................................................................................................................................18
List of Figures
Figure 1: Design Flow Overview.............................................................................................................5
Figure 2: MAC Core Configuration Panel ...............................................................................................6
Figure 3: Testbench Setup Overview......................................................................................................8
Figure 4: Running Testbuilder Overview.................................................................................................9
Figure 5: Testbuilder Panel...................................................................................................................10
Figure 6: VQM Netlist Generation.........................................................................................................17
List of Tables
Table 1: Core Configuration Options ......................................................................................................7
Table 2: Design Kit Directory Structure...................................................................................................7
Table 3: Simulation Options..................................................................................................................10
Table 4: MAC Configuration Options....................................................................................................12
Table 5: Testbuilder Simulation Control................................................................................................13
Table 6: Simulation Options..................................................................................................................13
Table 7: MAC Configuration Options....................................................................................................15
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Stratix II GX Embedded Gigabit Ethernet MAC / PHY
User's Guide
Version 1.0 - October 2005
1 Design Kit Installation
1.1 Platform Specific JAVA Runtime Installation
To be able to run the MAC Design Kit delivery and configuration tool, a Java runtime must be
present on the system. The design kit needs the Java Runtime Environment Version 1.2.x
(JRE1.2) or later.
To determine if and which Java version is installed on your system, open a Shell and type "java
-version". If you get errors then the runtime is not installed. If the version is lower than 1.3.x a
newer package must be installed.
A platform specific package (The runtime standard edition 1.3, JRE 1.3, is sufficient) can be
downloaded from the Sum Microsystems WEB site:
http://java.sun.com/j2se.
To install the runtime environment, follow the instructions included in the download package:
• Windows platform: Execute the self-extracting archive.
• Solaris/Linux: Extract the package in a directory and add the bin directory to the PATH
environment variable.
1.2 Design Kit Installation
A single executable Java delivery and configuration utility, common to all platforms, is provided,
ethpack.jar. The utility generates all the required design files as well as the required scri pts for
simulation and implementation.
After unzipping the distribution in any directory
• Windows users:
1. Double-click on the ethpack.jar file found in the distribution top directory
• UNIX (Solaris/Linux) users:
1. Goto the installation directory: $> cd <installation directory>
2. Execute the Java application: $> java -jar ethpack.jar
1
, the Java application can be started immediately:
1
Use the extract feature of your unzip tool. Avoid using drag&drop as it does not preserve the directory structure.
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Stratix II GX Embedded Gigabit Ethernet MAC / PHY
User's Guide
Version 1.0 - October 2005
2 Design Flow
The different steps of the Embedded Gigabit Ethernet MAC-PHY Design are:
• Core generation
• RTL Simulation
• Synthesis
• Implementation using Quartus II
• Gate-Level Simulation – Not available with Evaluation License
The design kit provides scripts for ease of use, fast design and verification / implementation turnaround.
The tools primarily supported are:
• Simulation: Modelsim Version 5.7a or higher
• Synthesis: Altera Quartus II V5.1 or higher
• Implementation: Altera Quartus II V5.1 or higher
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Stratix II GX Embedded Gigabit Ethernet MAC / PHY
User's Guide
Version 1.0 - October 2005
3 Generating the MAC/PHY Core
3.1 Overview
After the Core configuration utility is installed, start the utility and when the panel is available:
1. Select the Core options on the panel
2. Press the "Generate HDL" button.
3. A new window appears prompting you for a key. Type LbNH-sC79 and press “Enter”.
4. A new window appears which can be used to navigate through the file system to select
an existing directory or create a new working directory. After pressing the "open" button
finally creates the database.
MorethanIP TestBuilder
Simulation
Control
Testbench
Configuration
VHO SDF
ModelSim
ModelSim
VHDL
Testbench
User Constraints
Constraint
Template
VHDL
Design FILES
Quartus
Quartus
Figure 1: Design Flow Overview
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Stratix II GX Embedded Gigabit Ethernet MAC / PHY
User's Guide
Version 1.0 - October 2005
3.2 Core Configuration Options
The Core is fully configurable and a user friendly GUI is provided to simplify configuration. To
optimize the core for the intended application environment, several options are available which can
be modified before the actual database is generated as described before.
Figure 2: MAC Core Configuration Panel
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