The RapidSE Module is a drop-in ZigBee Smart Energy solution.
Preloaded with MMB Research’s RapidSE ZigBee Smart Energy
application, it offers hardware vendors an easy way to integrate
a fully-implemented ZigBee Smart Energy platform into their
existing devices.
MMB Research offers a variety of hardware and software
development tools to facilitate integration. For more
information, please visit http://www.mmbresearch.com
Contents
1 | General Information 2
2 | Module Pinout 2
Rev 1.2
3 | Electrical Specications 3
3.1 | Absolute Maximum Ratings 3
3.2 | Recommended Operating Conditions 3
3.3 | DC Electrical Characteristics 3
4 | RF Specications 4
4.1 | Receive Specifications 4
4.2 | Transmit Specifications 5
4.3 | Synthesizer 5
5 | Functional Specications 6
5.1 | Serial Ports 6
5.2 | GPIO 7
5.3 | Analog to Digital Converter (ADC) 8
6 | Mechanical Specications 9
6.1 | Physical Dimensions 9
6.2 | Recommended Land Pattern (Surface Mount) 10
6.3 | Connector Specifications 11
6.4 | Labelling 11
7 | Regulatory Approvals 11
7.1 | FCC 11
1 | General Information
Note that some of the specifications refer to either EM250 or Module. Please note specifications cited as EM250 are taken
from the EM250 datasheet (this should also be noted where referred to). Module means measurements taken with our
production module.
Table 4.3 lists the key parameters of the integrated IEEE 802.15.4 receiver on the EM250. This information is taken from the Ember
EM250 Datasheet. Link to this document can be found in the References section.
Note: Receive Measurements were collected with Ember’s EM250 Lattice Balun Reference Design (Version B1) at 2440MHz and using
the EmberZNet software stack Version 3.0.1. The Typical number indicates one standard deviation above the mean, measured at room
temperature (25C). The Min and Max numbers were measured over process corners at room temperature.
ParameterTest ConditionMinimumTypicalMaximumUnits
Frequency range24002500MHz
Sensitivity (Boost mode)1% PER, 20 byte packet
-100-95dBm
defined by IEEE 802.15.4
Sensitivity1% PER, 20 byte packet
-99-94dBm
defined by IEEE 802.15.4
High-side adjacent channel rejectionIEEE 802.15.4 signal at -82dBm35dB
Low-side adjacent channel rejectionIEEE 802.15.4 signal at -82dBm35dB
2nd high-side adjacent channel rejection IEEE 802.15.4 signal at -82dBm43dB
2nd low-side adjacent channel rejectionIEEE 802.15.4 signal at -82dBm43dB
Channel rejection for all other channelsIEEE 802.15.4 signal at -82dBm40dB
802.11g rejection centered at +12MHz or
IEEE 802.15.4 signal at -82dBm35dB
-13MHz
Maximum input signal level for correct
0dBm
operation (low gain)
Image suppression30dB
Co-channel rejectionIEEE 802.15.4 signal at -82dBm-6dBc
Table 4.3 | Continued
ParameterTest ConditionMinimumTypicalMaximumUnits
Relative frequency error
(2x40 ppm required by IEEE 802.15.4)
Relative timing error
(2x40 ppm required by IEEE 802.15.4)
Table 4.5 lists the key parameters of the integrated synthesizer on the EM250. Taken from the EM250 datasheet.
ParameterTest ConditionMinTypicalMaxUnits
Frequency range24002500MHz
Frequency resolution11.7kHz
Lock timeFrom off, with correct VCO DAC setting100us
Relock timeChannel change or Rx/Tx turnaround (IEEE
802.15.4 defines 192μs turnaround time)
Phase noise at 100kHz-71dBc/Hz
Phase noise at 1MHz-91dBc/Hz
Phase noise at 4MHz-103dBc/Hz
Phase noise at 10MHz-111dBc/Hz
100us
5 | Functional Specications
5.1 | Serial Ports
Refer to the EM250 data sheet for functionality and associated GPIO pin outs.
Note: The module pin out table in section 2 of this document provides a cross reference between the MMB PA module
pins and the EM250 GPIO.
5.1.1 | SC1 (UART, SPI, I2C)
The SC1 module provides asynchronous (UART) or synchronous (SPI or I2C) serial communications.
• Selectable data shift direction (either LSB or MSB first)
• Master mode only
• Fixed 8 bit word length
• The following signals can be made available on the GPIO pins:
ʳMO (master out)
ʳMI (master in)
ʳMCLK (serial clock)
The SC1 I2C mode has the following features:
• Programmable clock frequency (400kHz max.)
• Supports both 7-bit and 10-bit addressing
• The SC1 I2C controller is only available in master mode.
• The I2C Master controller supports Standard (100kbps) and Fast (400kbps) I2C modes.
• Multiple master applications are not supported.
• The I2C signals are open-collector and external pull-up resistors are required.
• The following signals can be made available on the GPIO pins:
ʳMSDA (serial data)
ʳMSCL (serial clock)
5.1.2 | SC2 (SPI, I2C)
The SC2 module provides synchronous (SPI or I2C) serial communications.
The SC2 SPI mode has the following features:
• The SPI mode of the SC2 supports both master and slave modes.
• It has a fixed word length of 8 bits.
• Master and slave modes
• Full duplex operation
• Programmable master mode clock frequency (12MHz max.)
• Slave mode up to 5MHz bit rate
• Programmable clock polarity and clock phase
• Selectable data shift direction (either LSB or MSB first)
• Optional slave select input
• The following signals can be made available on the GPIO pins:
ʳMOSI (master out/slave in)
ʳMISO (master in/slave out)
ʳMSCLK (serial clock)
ʳnSSEL (slave select—only in slave mode)
The SC2 I2C mode has the following features:
• The SC2 I2C controller is only available in master mode.
• The I2C Master controller supports Standard (100kbps) and Fast (400kbps) I2C modes.
• Multiple master applications are not supported.
• The I2C signals are open-collector, and external pull-up resistors are required.
• Programmable clock frequency (400kHz max.)
• 7- and 10-bit addressing
• The following signals can be made available on the GPIO pins:
ʳSDA (serial data)
ʳSCL (serial clock)
5.2 | GPIO
The EM250 has 17 multi-purpose GPIO pins that can be configured in a variety of ways. All pins have the following
programmable features:
• Selectable as input, output, or bi-directional.
• Output can be totem-pole, used as open drain or open source output for wired-OR applications.
• Can have internal pull-up or pull-down.
5.3 | Analog to Digital Converter (ADC)
The ADC is a first-order sigma-delta converter sampling at 1MHz with programmable resolution and conversion
rate. the ADC Module supports both single-ended and differential inputs.
ParameterMinimumTypicalMaximumUnits
Conversion time324096µ S
VREF1.191.21.21V
VREF output current1mA
VREF load capacitance10nF
Minimum input voltage0V
Maximum input voltageVCCV
Single-ended signal range0VREFV
Differential signal range- VREF+ VREFV
Common mode range0VREFV
Input referred ADC offset-1010mV
Input impedance
When taking a sample1M Ohm
When not taking a sample10M Ohm
INL-0.50.5LSB
DNL-0.50.5LSB
6 | Mechanical Specications
6.1 | Physical Dimensions
R1R4
R2
L
A5
R3
A
N
T
E
N
N
A
W
0.6 mm
0.8 mm
2.6 mm
3222
21
12
111
A1
A2
A4
A3
SymbolDescriptionDistance
LLength of the module34.73 mm
WWidth of the module28.43 mm
HHeight of the moduleTBD
A1Pitch2 mm
A2Distance centre of pad to PCB edge2.59 mm
A3Distance center of pad to PCB edge5.22 mm
A4Distance pad edge to PCB edge0.29 mm
A5Distance center of via to PCB edge0.84 mm
R1Keep-out zone from corner of PCBTBD
R2Keep-out zone from corner of PCBTBD
R3Width of keep-out zoneTBD
R4Length of keep-out zoneTBD
6.2 | Recommended Land Pattern (Surface Mount)
3222
21
12
111
module outline
F1
F2
F4F3
0.854 mm
d = 0.8 mm
1.51 mm
SymbolDescriptionDistance
F1Distance pad edge to pad edge21.9 mm
F2Distance pad edge to pad edge1.523 mm
F3Distance pad center to pad center1.3 mm
F4Pitch2 mm
3.94 mm
Note: It is advised that for surface mount applications, through holes / vias should not be designed into the carrier board.
6.3 | Connector Specifications
6.3.1 | Edge Mount (USNAP) Connector
10 pin 2mm pitch right angle female header
6.3.2 | SIP Header / Socket
11 + 11 + 10 (if no USNAP populated) pin 2mm pitch 0.8mm diameter through hole footprint
6.4 | Labelling
0.75”
7 | Regulatory Approvals
7.1 | FCC
7.1.1 | FCC Notice
0.75”
This device (ZGB.MMB-PA.1.0/ZGB.MMB-PA-LNA.1.0) complies with Part 15 of the FCC rules. Operation is subject to the
following two conditions:
(1) This device may not cause harmful interference, and
(2) This device must accept any interference received, including interference that may cause undesired operation.
To comply with FCC RF Exposure requirements, users of this device must ensure that the module be installed and/or
configured to operate with a separation distance of 20cm or more from all persons.
7.1.2 | Modular Approval
This device (ZGB.MMB-PA.1.0/ZGB.MMB-PA-LNA.1.0) meets the requirements for modular transmitter approval as detailed in
the FCC public notice DA 00-1407.
It should be noted that:
“While the applicant for a device into which an authorized module is installed is not required to obtain a new authorization
for the module, this does not preclude the possibility that some other form of authorization or testing may be required for
the device (e.g., a WLAN into which an authorized module is installed must still be authorized as a PC peripheral, subject to
the appropriate equipment authorization).”
-- FCC Public Notice DA 00-1407
Caution:
Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority
to operate the equipment.
7.1.3 | Labeling Requirements
The user of this device is responsible for meeting the FCC labeling requirements. A clearly visible label on the exterior
enclosure of an incorporating device must list the MMB Research Inc. FCC ID “XFFMMBPA10” and the FCC Notice above
(section 7.1.1).
Devices intended for sale in the Canadian market should also include the Industry Canada (IC) ID “8365A-MMBPA10”
35 Prince Arthur Ave.
Toronto, Ontario, Canada
M5R1B2