MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21961-4S
TRANSFER-MOLD TYPE
INSULATED TYPE
PS21961-4S
INTEGRATED POWER FUNCTIONS
600V/3A low-loss RC-IGBT inverter bridge with N-side
three phase output DC-to-AC power conversion.
Open emitter type.
INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS
• For upper-leg IGBTS :Drive circuit, High voltage high-speed level shifting, Control supply under-voltage (UV) protection.
• For lower-leg IGBT
S : Drive circuit, Control supply under-voltage protection (UV), Short circuit protection (SC).
• Fault signaling : Corresponding to an SC fault (Lower-leg IGBT) or a UV fault (Lower-side supply).
• Input interface : 3V, 5V line (High Active).
•UL Approved : Yellow Card No. E80276
APPLICATION
AC100V~200V inverter drive for small power motor control.
Fig. 1 PACKAGE OUTLINES
QR
Code
20×1.778(=35.56 )
Type name
Lot No.
14×2.54(=35.56)
0.28
±0.2
1.778
171
2-R1.6
12
18
0.28
±0.2
2.54
0.5
HEAT SINK SIDE
38
35
3 MIN
±0.5
±0.3
0.50.5
A
16-0.5
(1)
±0.5
±0.5
24
33.7
25
8-0.6
0.5
4-C1.2
±0.5
9.5
±0.5
5.5
±0.5
29.2
±0.5
14.4
±0.5
18.9
(2.656)
(1.2)
B
0.4
±0.5
14.4
0.4
(1.2)
3.5
±0.05
1.5
(3.5)
0.8
2.5 MIN
DETAIL ADETAIL B
(3.3)
HEAT SINK SIDE
(0°~5°)
(2.756)
Dimensions in mm
TERMINAL CODE
1. (VNC)
2. VUFB
3. VVFB
4. VWFB
5. UP
6. VP
7. WP
8. VP1
9. VNC *
10. UN
11. VN
12. WN
13. VN1
14. FO
15. CIN
16. VNC *
17. NC
18. NW
19. NV
20. NU
21. W
22. V
23. U
24. P
25. NC
1.5min
*) Two VNCterminals (9 & 16 pin) are connected inside DIP-IPM, please connect either one to the 15V power supply GND outside and
leave another one open.
Mar. 2007
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21961-4S
TRANSFER-MOLD TYPE
INSULATED TYPE
MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted)
INVERTER PART
ConditionSymbolParameterRatingsUnit
CC
V
VCC(surge)
VCES
±IC
±ICP
PC
Tj
Supply voltage
Supply voltage (surge)
Collector-emitter voltage
Each IGBT collector current
Each IGBT collector current (peak)
Collector dissipation
Junction temperature
Applied between P-NU, NV, NW
Applied between P-NU, NV, NW
T
C = 25°C
C = 25°C, less than 1ms
T
C = 25°C, per 1 chip
T
(Note 1)
450
500
600
3
6
21.3
–20~+125
Note 1 : The maximum junction temperature rating of the power chips integrated within the DIP-IPM is 150°C (@ TC≤ 100°C). However, to
ensure safe operation of the DIP-IPM, the average junction temperature should be limited to Tj(ave)≤ 125°C (@ TC≤ 100°C).
CONTROL (PROTECTION) PART
ConditionSymbolParameterRatingsUnit
VD
VDB
VIN
VFO
IFO
VSC
Control supply voltage
Control supply voltage
Input voltage
Fault output supply voltage
Fault output current
Current sensing input voltage
Applied between V
Applied between VUFB-U, VVFB-V, VWFB-W
Applied between U
Applied between FO-VNC
Sink current at FO terminal
Applied between CIN-V
P1-VNC, VN1-VNC
P, VP, WP, UN, VN,
WN-VNC
NC
–0.5~V
–0.5~V
–0.5~V
20
20
D+0.5
D+0.5
1
D+0.5
V
V
V
A
A
W
°C
V
V
V
V
mA
V
TOTAL SYSTEM
SymbolRatingsUnit
V
CC(PROT)
TC
Tstg
Viso
Note 2: T
Self protection supply voltage limit
(short circuit protection capability)
Module case operation temperature
Storage temperature
Isolation voltage
C measurement point
IGBT chip position
FWD chip position
Parameter
Control terminals
11.6mm
Power terminals
D = 13.5~16.5V, Inverter part
V
Tj = 125°C, non-repetitive, less than 2µs
60Hz, Sinusoidal, 1 minute,
Between pins and heat-sink plate
3mm
Condition
C
point
T
Heat sink side
(Note 2)
DIP-IPM
400
–20~+100
–40~+125
1500
V
°C
°C
rms
V
Mar. 2007
2
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21961-4S
TRANSFER-MOLD TYPE
INSULATED TYPE
THERMAL RESISTANCE
Parameter
R
th(j-c)Q
Note 3 : Grease with good thermal conductivity should be applied evenly with about +100µm~+200µm on the contacting surface of DIP-IPM
Junction to case thermal
resistance (Note 3)
and heat-sink.
The contacting thermal resistance between DIP-IPM case and heat sink (R
conductivity of the applied grease. For reference, R
the thermal conductivity is 1.0W/m·k.
Inverter RC-IGBT part (per 1/6 module)
ConditionSymbol
th(c-f) (per 1/6 module) is about 0.3°C/W when the grease thickness is 20µm and
th(c-f)) is determined by the thickness and the thermal
Min.
ELECTRICAL CHARACTERISTICS(Tj= 25°C, unless otherwise noted)
INVERTER PART
Symbol
CE(sat)
V
VEC
ton
trr
tc(on)
toff
tc(off)
ICES
Parameter
Collector-emitter saturation
voltage
FWD forward voltage
Switching times
Collector-emitter cut-off
current
VD = VDB = 15V
VIN = 5V
Tj = 25°C, –IC = 3A, VIN = 0V
V
CC = 300V, VD= VDB= 15V
IC = 3A, Tj = 125°C, VIN = 0 ↔ 5V
Inductive load (upper-lower arm)
CE = VCES
V
Condition
I
C = 3A, Tj = 25°C
IC = 3A, Tj = 125°C
T
j = 25°C
Tj = 125°C
Min.Typ.Max.
0.50
Limits
Typ.Max.
——
Limits
—
—
—
1.70
1.80
1.50
0.95
—
—
—
—
—
—
0.30
0.35
1.40
0.50
—
—
4.7
2.20
2.30
2.00
1.50
—
0.60
2.00
0.80
1
10
Unit
°C/W
Unit
V
V
µs
µs
µs
µs
µs
mA
CONTROL (PROTECTION) PART
—
—
—
—
4.9
—
20
—
0.8
Limits
—
—
—
—
—
—
0.48
1.00
—
—
—
—
—
2.1
1.3
0.65
2.80
0.55
2.80
0.55
0.95
0.53
1.50
12.0
12.5
12.5
13.0
Symbol
I
D
VFOH
VFOL
VSC(ref)
IIN
UVDBt
UVDBr
UVDt
UVDr
tFO
Vth(on)
Vth(off)
Vth(hys)
ParameterCondition
Circuit current
Fault output voltage
Short circuit trip level
Input current
Control supply under-voltage
protection
Fault output pulse width
ON threshold voltage
OFF threshold voltage
ON/OFF threshold hysteresis
voltage
V
D = VDB = 15V
V
IN = 5V
V
D = VDB = 15V
V
IN = 0V
SC = 0V, FO terminal pull-up to 5V by 10kΩ
V
V
SC = 1V, IFO = 1mA
T
j = 25°C, VD = 15V (Note 4)
V
IN = 5V
Total of V
P1-VNC, VN1-VNC
VUFB-U, VVFB-V, VWFB-W
Total of V
P1-VNC, VN1-VNC
VUFB-U, VVFB-V, VWFB-W
Trip level
j ≤ 125°C
T
Reset level
Trip level
Reset level
(Note 5)
Applied between U
P, VP, WP, UN, VN, WN-VNC
Min.Typ.Max.
0.43
0.70
10.0
10.5
10.3
10.8
0.35
Note 4 : Short circuit protection is functioning only for the lower-arms. Please select the external shunt resistance such that the SC trip-level is
less than 1.7 times of the current rating.
5:Fault signal is asserted corresponding to a short circuit or lower side control supply under-voltage failure.
—
—
2.6
—
—
Unit
mA
V
V
V
mA
V
V
V
V
µs
V
V
V
Mar. 2007
3
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
MECHANICAL CHARACTERISTICS AND RATINGS
Parameter
Mounting torque
Weight
Heat-sink flatness
Note 6 : Plain washers (ISO 7089~7094) are recommended.
Note 7: Flatness measurement position
+–
Mounting screw : M3
Measurement position
(
Note 6
Condition
Recommended : 0.69 N·m
)
4.6mm
(
Note 7
PS21961-4S
TRANSFER-MOLD TYPE
INSULATED TYPE
Limits
Min.
0.59
—
)
–50
Typ.Max.
—
10
—
0.78
—
100
Unit
N·m
g
µm
DIP-IPM
Heat sink side
–
+
Heat sink side
RECOMMENDED OPERATION CONDITIONS
Parameter
CC
V
VD
VDB∆VD, ∆VDB
tdead
fPWM
IO
PWIN(on)
PWIN(off)
NC
V
Supply voltage
Control supply voltage
Control supply voltage
Control supply variation
Arm shoot-through blocking time
PWM input frequency
Allowable r.m.s. current
Allowable minimum input
pulse width
NC variation
V
Applied between P-NU, NV, NW
Applied between V
Applied between VUFB-U, VVFB-V, VWFB-W
For each input signal, T
T
C≤ 100°C, Tj ≤ 125°C
CC = 300V, VD = VDB = 15V,
V
P.F = 0.8, sinusoidal PWM,
j≤ 125°C, TC≤ 100°C (Note 8)
T
Between V
NC-
Note 8 : The allowable r.m.s. current value depends on the actual application conditions.
9:IPM might not make response if the input signal pulse width is less than the recommended minimum value.
ConditionSymbol
P1-VNC, VN1-VNC
C≤ 100°C
NU, NV, NW
(including surge)
PWM = 5kHz
f
PWM = 15kHz
f
(Note 9)
Limits
Min.Typ.Max.
0
13.5
13.0
–1
1.5
—
—
—
0.5
0.5
–5.0
300
15.0
15.0
—
—
—
—
—
—
—
—
400
16.5
18.5
1
—
20
2.0
1.5
—
—
5.0
Unit
V
V
V
V/µs
µs
kHz
Arms
µs
V
Mar. 2007
4
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
Fig. 2 THE DIP-IPM INTERNAL CIRCUIT
PS21961-4S
TRANSFER-MOLD TYPE
INSULATED TYPE
V
V
UFB
V
HVIC
V
V
P1
U
P
NC
CC
U
P
COM
UB
U
OUT
V
US
RC-IGBT1
DIP-IPM
P
U
RC-IGBT2
V
V
VFB
V
P
VB
V
V
P
OUT
V
VS
V
RC-IGBT3
V
V
WFB
W
P
WB
W
P
W
OUT
V
WS
W
RC-IGBT4
LVIC
U
OUT
V
N1
V
CC
RC-IGBT5
NU
V
OUT
U
U
N
V
N
W
N
Fo
V
NC
N
V
N
W
N
Fo
GND
RC-IGBT6
NV
W
OUT
CIN
V
NO
NW
CIN
Mar. 2007
5
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
TRANSFER-MOLD TYPE
Fig. 3 TIMING CHART OF THE DIP-IPM PROTECTIVE FUNCTIONS
[A] Short-Circuit Protection (Lower-side only with the external shunt resistor and CR filter)
a1. Normal operation : IGBT ON and carrying current.
a2. Short circuit detection (SC trigger).
a3. IGBT gate hard interruption.
a4. IGBT turns OFF.
O outputs (tFO(min) = 20µs).
a5. F
a6. Input “L” : IGBT OFF.
a7. Input “H” : IGBT ON.
a8. IGBT OFF in spite of input “H”.
PS21961-4S
INSULATED TYPE
Lower-side control
input
Protection circuit state
Internal IGBT gate
SET
a3
a7a6
RESET
a2
Output current Ic
Sense voltage of the
shunt resistor
a1
SC
a4
a8
SC reference voltage
CR circuit time
Error output Fo
a5
constant DELAY
[B] Under-Voltage Protection (Lower-side, UVD)
b1. Control supply voltage rising : After the voltage level reaches UVDr, the circuits start to operate when next input is applied.
b2. Normal operation : IGBT ON and carrying current.
b3. Under voltage trip (UVDt).
b4. IGBT OFF in spite of control input condition.
b5. FO outputs (tFO≥ 20µs and FO outputs continuously during UV period).
b6. Under voltage reset (UVDr).
b7. Normal operation : IGBT ON and carrying current.
Control input
Protection circuit state
Control supply voltage V
Output current Ic
Error output Fo
RESET
UV
Dr
D
b1
UV
b2
SET
Dt
b3
b4
RESET
b6
b7
b5
Mar. 2007
6
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21961-4S
TRANSFER-MOLD TYPE
INSULATED TYPE
[C] Under-Voltage Protection (Upper-side, UVDB)
c1. Control supply voltage rising : After the voltage level reaches UVDBr, the circuits start to operate when next input is applied.
c2. Normal operation : IGBT ON and carrying current.
c3. Under voltage trip (UVDBt).
c4. IGBT OFF in spite of control input signal level, but there is no FO signal outputs.
c5. Under voltage reset (UVDBr).
c6. Normal operation : IGBT ON and carrying current.
Control input
Protection circuit state
UVDBr
Control supply voltage V
DB
c1
Output current Ic
High-level (no fault output)
Error output Fo
Fig. 4 RECOMMENDED MCU I/O INTERFACE CIRCUIT
5V line
MCU
UV
DBt
c2c4
10kΩ
SETRESET
RESET
c5
c3
c6
DIP-IPM
P,VP,WP,UN,VN,WN
U
Fo
VNC(Logic)
3.3kΩ (min)
Note : The setting of RC coupling at each input (parts shown dotted) depends on the PWM control scheme and the
wiring impedance of the printed circuit board.
The DIP-IPM input section integrates a 3.3kΩ (min) pull-down resistor. Therefore, when using an external
filtering resistor, pay attention to the turn-on threshold voltage.
Fig. 5 WIRING CONNECTION OF SHUNT RESISTOR
DIP-IPM
V
NC
NU
NV
NW
Each wiring inductance should be less than 10nH.
Equivalent to the inductance of a copper
pattern in dimension of width=3mm,
thickness=100µm, length=17mm
Shunt resistors
7
Please make the GND wiring connection
of shunt resistor to the V
as close as possible.
NC
terminal
Mar. 2007
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
Fig. 6 AN EXAMPLE OF TYPICAL DIP-IPM APPLICATION CIRCUIT
C1: Electrolytic capacitor with good temperature characteristics C2,C3: 0.22~2µF R-category ceramic capacitor for noise filtering
C2C2
C1
C1C2C1
V
UFBVVFBVWFB
HVIC
V
V
C3
P1
U
P
V
P
UB
V
CC
U
P
U
OUT
V
US
V
VB
V
P
V
OUT
V
VS
DIP-IPM
P
U
V
PS21961-4S
TRANSFER-MOLD TYPE
INSULATED TYPE
Bootstrap negative electrodes
should be connected to U, V,
W terminals directly and
separated from the main output
wires.
M
V
W
COM
V
CC
U
N
V
N
W
o
F
GND
WB
W
OUT
P
V
WS
LVIC
OUT
U
V
OUT
N
W
OUT
CIN
V
NO
Long wiring here might
cause short-circuit.
CIN
Long wiring here might cause
SC level fluctuation and
malfunction.
A
+
-
+
-
OR Logic
+
-
Comparator
Vref
Vref
Vref
W
NU
NV
NW
B
R1
C4
B
R1
C4
R1
B
C4
C
Shunt resistors
N1
External protection circuit
Note 1 :
W
P
V
NC
MCU
V
5V line
15V line
C3
N1
U
N
V
N
W
N
Fo
V
NC
Long GND wiring here might
generate noise to input and
cause IGBT malfunction.
Input drive is High-Active type. There is a 3.3kΩ(min.) pull-down resistor integrated in the IC input circuit. To prevent malfunction, the wiring of each input should be as short as possible. When using RC coupling circuit, make sure the input signal level meet the turn-on and turn-off threshold voltage.
2:Thanks to HVIC inside the module, direct coupling to MCU without any opto-coupler or transformer isolation is possible.
3:FO output is open drain type. It should be pulled up to the positive side of a 5V power supply by a resistor of about 10kΩ.
4:To prevent erroneous protection, the wiring of A, B, C should be as short as possible.
5:The time constant R1C4 of the protection circuit should be selected in the range of 1.5-2µs. SC interrupting time might vary with the
wiring pattern. Tight tolerance, temp-compensated type is recommended for R1, C4.
6:All capacitors should be mounted as close to the terminals of the DIP-IPM as possible. (C1: good temperature, frequency character-
istic electrolytic type, and C2, C3: good temperature, frequency and DC bias characteristic ceramic type are recommended.)
7:To prevent surge destruction, the wiring between the smoothing capacitor and the P, N1 terminals should be as short as possible.
Generally a 0.1-0.22µF snubber between the P-N1 terminals is recommended.
8:Two VNC terminals (9 & 16 pin) are connected inside DIP-IPM, please connect either one to the 15V power supply GND outside and
leave another one open.
9:It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
10 : If control GND is connected to power GND by broad pattern, it may cause malfunction by power GND fluctuation. It is recommended
to connect control GND and power GND at only a point.
11 :
The reference voltage Vref of comparator should be set up the same rating of short circuit trip level (Vsc(ref): min.0.43V to max.0.53V).
12 : OR logic output high level should exceed the maximum short circuit trip level (Vsc(ref): max.0.53V).
Mar. 2007
8
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