Transmitter uses uncooled laser in a hermetic pigtail
coaxial module with drivered by specific integrated
circuit.
Receiver uses PIN preamp in a hermetic pigtail
coaxial module and integrated circuits for reshaping,
retiming and regenerating optical signal.
FEATURES
SONET,SDH system from intra-office to longleach application fully line up
Low cost and Low power consumption
Multisourced 20-Pin DIP with pigtail fiber
Single +5V power supply and P-ECL compatible
input and output
Operating case temperature range -40 to 85°C.
With clock recovery and digital alarm function
APPLICATION
Short haul and long haul telecommunication systems
for SDH STM-4 / SONET OC-12.
ABSOLUTE MAXIMUM RATINGS
Stress below listed absolute maximum rating may cause permanent damage to the module.
This is a stress only and functional operation of the module at these or any other conditions in excess of those
given in the operational sections of this data sheet.
Exposure to Absolute Maximum Rating for extended periods may affect module reliability.
Ta=25°C
ParametersSymbolRatingsUnit
Supply voltageVcc+6 to 0V
PECL high output current--50 to 0mA
PECL input voltage-0 to Vcc+0.4V
Storage temperatureTstg-40 to 85
Operating case temperatureTc-40 to 85
Soldering Temperature-+260
Soldering Time-10sec
Relative humidity(non condensation)-10 to 80%
Fiber bend radius from packagerF32mm
C
°
C
°
C
°
MITSUBISHI (OPTICAL DEVICES)
MF-622DS-T12-43x/45x/46x
MF-622DS-R13-24x
SONET/SDH TRANSMITTER & RECEIVER
ELECTRICAL CHARACTERISTICS
All parameters are specified over the operating case temperature.
Measurement conditions are at 622.08Mb/s+/-20ppm, NRZ PN2
The DATA input/output and CLOCK output signal levels are PECL compatible.
The transmitter disable input signal level is CMOS/TTL compatible.
The Signal Detect output signal level is PECL level compatible.
Transmitter
ParametersConditionSymbolMin.Typ.Max.Unit
Supply voltage-Vcc4.755.05.25V
Power consumption-Pc-0.751.5W
PECL input voltagenote 1-PECL-
Transmitter Disable voltagenote 2VdVcc-2.0V-VccV
23
-1 and 50%duty cycle data signal.
Transmitter Enable voltagenote 2Ve0-0.8V
Laser bias monitor voltagenote 3Vb0.01-0.70V
Laser backface monitor voltagenote 3Vbf0.01-0.20V
Receiver
ParametersConditionSymbolMin.Typ.Max.Unit
Supply voltageVcc4.755.05.25V
Power consumptionPc-1.21.5W
PECL input voltagenote 4,5-PECL-
Data/Clock external Loadnote 4RI50ohm
Data to clock phasenote 6Tcda-200-200psec.
Clock dutynote 6-45-55%
Jitter-ITU Rec.compliant-
Signal Detect Response Time:
Decreasing Light Input
Signal Detect Response Time:
Increasing Light Input
Photo Bias Current Responsitynote 8PBr0.6--A/W
note 5,7SDRTd--100us
note 5,7SDRTi--100us
OPTICAL CHARACTERISTICS
ParameterSpecificationUnit
ITU codeS-4.1L-4.1L-4.2
Optical Budget0171028.51029dB
Transmitter
Wavelength127413561280133514801580nm
Optical sourceMLMSLMSLMOptical power at pigtail-14-8-2.5+2-2+2dBm
Optical power when disable--45--45--45dBm
Spectral width(rms)-2.5----nm
Spectral width(-20dB)---1-1nm
10Photo Detector BiasIThis pin supplies th e bias for the PIN Photo Detector and it should be connecte d to
17,18,
19,20
GNDIThese pin are the module’s ground connections.
&
Signal Detect
NC-These pin are No user connection and should be left open.
They should be connected to a low impedance ground plane (0V).
It should be connected to +5.0V.
Recommended power supply decoupling.
Signal level of these pin are PECL level.
Refer to electrical interface in NOTE4.
Signal level of these pin are PECL level.
Refer to electrical interface in NOTE4.
OWhen the optical input signal fall bellow the SD threshold level, The Signal Detect
is deasserted and its output logic level changes form a PECL HIGH to PECL LOW.
Signal Detect pin is differential PECL output pin.
Refer to electrical interface in NOTE5.
+5.0V.
Ad dition ally, by usin g Exter nal Resi sto r in seri es with this pin, it is po ssible to
measure the photocurrent.
Refer to electrical interface in NOTE8.
MITSUBISHI (OPTICAL DEVICES)
MF-622DS-T12-43x/45x/46x
MF-622DS-R13-24x
SONET/SDH TRANSMITTER & RECEIVER
GENERAL OUTLINE DRAWING
Transmitter / Receiver (FC/PC, SC/PC and ST/PC connector are available)
NOTE: TOLERANCES UNLESS NOTED +/-0.5
DIMENSIONS ARE IN MILLIMETERS
L=900+/-100
BLOCK DIAGRAM
DRIVER IC
MF-622DS-T12-43x/45x/46x
LD Module
MITSUBISHI (OPTICAL DEVICES)
MF-622DS-R13-24x
SONET/SDH TRANSMITTER & RECEIVER
PDLD
Integrated device
OPT.OUT
DATA IN
DATA IN
OPT.IN
Driver
IC
A.P.C.
Curcuit
Transmitter Block Diagram
PD
Preamp
Rt
Amp
Laser-backface
monitor(+)
Laser-backface
monitor(-)
Laser-bias monitor(+)
Laser-bias monitor(-)
Transmitter disable
Clock recovery ICLimiting IC
DATA Out
Decider
DATA Out
CLK Out
CLK Out
PD-Preamp
Module
Receiver Block Diagram
Alarm
PLL
Signal Detect
NOTE
NOTE1: PECL Input Interface
MITSUBISHI (OPTICAL DEVICES)
MF-622DS-T12-43x/45x/46x
MF-622DS-R13-24x
SONET/SDH TRANSMITTER & RECEIVER
13Kohm
Data
PECL
NOTE2: Transmitter disable Interface
Td
HCMOS
51Kohm
Data
comparator
Transmitter
47Kohm
Transmitter
Disable Input
Optical Output
ON
Vcc
0V
OFF
The transmitter is normally enabled and only requires an external voltage to disable.