Mitsubishi Electric melsec-k Programming Manual

1

.

Introduction

..........................

Introduction

The MEESEC-K series is equipped with an instruction function convenient for machine control,

so

that even complicated control can be programmed easily. The program language uses language for sequence control (a combination and logic symbol words),

007B

and

008

is followed, but the symbols have been partly changed

Example

and sequence instructions and data handling instructions have been newly added. [Example: Universal shift, conditional jump, pulse instructions, addition and subtraction, magnitude comparison, data movement In this way, the series

study this manual carefully to master the programming methods, used efficiently. For

program input and output operations, refer

instructions for the programming unit”.

so

that language of the same system as for the conventional MELSEC-

(

Example

(1)

ANS - ANB,

(2)

Input/output device name:

i

K

is a programmable controller with a powerful program function. Please

ORS

(MOV),

-

ORB

I000

0000

etc.]

to

the “Handling

3

*

XOOO

YO00

of

relay symbol format

to

more general expressions,

7

so

that the functions can be

NOTES:

(1)

This programming manual covers the basic functions

(2)

The

K2CPU-S3

Refer to the “Instruction Manual

ming of the special functions.

(3)

The

KOJ

is provided with special functions. Refer to the “Instruction Manual the speicial functions.

is provided with special funcitons.

-

Special Functions of the

“

-

Special Functions of the

of

the

KOJ, KO,

K2CPU-S3”

KOJ”

K1,

K2,

KOE

and

K2E.

for the program-

for the programming

of

-1-

2,

Hardware

~~ltaap~~iti~nm

and

operation

The hardware outlines are described to deepen the understanding

2-1.

2-1-1.

Hardware Hardware

The units

compssiticsn

system

shown

comp~~iti~n

in the following figure are attached to the

system.

Peripheral units

P

o

for

programming.

base

unit

/output units

t0

compose the

Peripherai support base

K6PSB

Power supply

AC

100

V

DC

24V

I/O

cab1

K61CBL

Pu

-

K2CPU

MN6

1

‘\

2

Base

Unit

Fig.

2-1.

I I

4

Hardware

system

-2-

composition

2-1-2.

The

CPU

system

CPU

operation functons are shown in the following figure;

composition

$5

Peripherals

r-

--

User program

Memory

1

("O~memojy

PE

interface

CPU

KlROM 1s K2ROM 2s

K~ROM

KlROM

Instructions

I

register

is

2s

-

RAM memory

I

(KlRAM)

Data

rnernory

e----

---

--

_.

e---

-

(Base unit)

Notes:

1.

Program writing for the Simultaneous use

2.

The

CPU

system composition does not coincide with the hardware.

h

5

Y

.C

E:

u

a

I

-

T

of

-1

a

ca

I

Fig.

user

ROM

I,

I

CPU

1

I

system

Input/ oulput

inter

1

n

pu

t

control circuit

composition

I

2-2.

program memory uses the

and

RAM

is not possible.

/

face

ou

t

pu

t

KlRAM.

r

Logic

~b

processing Register

A

3.

A

discreet circuit is obtained

for

K2CPU.

-3-

2-2.

Logic operations

2-2-1.

Basic operation

for

instructions

of

the programmable

controller

The basic operation of the programmable controller is shown in the figure on the right.

a

This operation is the same as for of

the stored program method, and the hardware composition also is similar, called

a

programmable controller of the

computer

so

that this is

quasicom put er type.

@First, the contents

of

the program counter showing the program step number are given to the memory address, and the contents are read.

@

The read memory contents are translated, and discrimination is executed for

OR,

and other instructions as well as input

AND,

and output numbers.

@

According to the discriminated source

Fig.

2-3.

Basic logic operations

(logic input signal to be included) and the instructions, AND,

OR,

and other logic operations as well as output operation are executed.

@

1

is added to the program counter contents, and specification

of

the next step number is

ecuted.

The above

4

operations are executed for each

step number, Le. each instruction in the

Step

number

Memory

programmable controller, and sequential execution is executed in the sequence

of

the numbers for all step numbers stored in the memory. This is called scanning. The figure on the right shows the concept for scanning. The above

4

operations are executed in the sequence of the program numbers according to the program counter

contents, return to number the

END

instruction is reached, and then the

0

is

executed when

sequence is repeated. This operation is called scanning, and with one scanning, all inputs

'

written into the memory are taken in, logic

I

Fig.

--I_---___

2-4.

Scanning operation

----.--

operations are executed, and the logic operation results are put out to all outputs. The scanning speed about corresponds to the electromagnetic relay response speed, and this is called the logic operation speed.

ex-

As

shown in the above, serial arithmetic operations are executed in the programmable controller, but as the logic operation speed is high, all inputs are taken in, and logic operation results are put out to

all

outputs, the operation from the outside appears to be the same parallel arithmetic

operation as for electromagnetic relays.

-4-

2-2-2.

Arithmetic principle

The arithmetic principle is explained with the circuit shown in the figure on the right as an example. The program for this circuit is as follows with

MELSEC-K.

The execution process for the circuit example (a) is shown in

Step number Instructions number

(b).

InpuUoutput

(a) Circuit example

'\

XI

x2

x3

x4

XI

x2

x3

x4

0

1'

2

3

Input

(X)

0

iIL,

(XI

XI

+xz

LD

OR

AND

o

u

rr

)

0x3

x1

x2

x3

Y

14

Output

n

(

x1

sxz

/

Input of the on-off status of X1 Input of the on-off statusof X2 and

Xl.Xl+X2

Input of the on-off status of X3 and with (X1

Output of the operation result (X1 + X2) X3 to Y14.

(Y)

.

)

0x3,

.y

11

Y

12

y

13

Y

14

XI

x2

x3

x4

+

X2). (X1

+

X2).

OR

X3

I

'

1

OK'

operation with

AND

operation

x1

+x2

x2

.,

I1

'12

13

14

2

AND

Explanation

X3

.(b)

of

the arithmetic principle

X:

Input selection part

Y:

Output selection part

A: Register

B:

Register B (auxiliary register)

.LU:

Logic processing unit

IR:

Instructions register

A

Execution process

(answer register)

'Fig.

The execution process for this program and this hardware compostion

Step

0

LD

X1

@The program number 0 is read

from

the memory, the instruction

-5-

LD

3

OT!T

Y14

2-5.

Arithmetic principle

J

is

as follows.

is stored in the instructions

register

@

1

@

@ The contens

@

2

@

3

@

IW,

and the input/output number

*The same applies for subsequent program.

X1

is selected by the input selection part

The

on-off status of

ORX2

X2

is selected by the input selection part

The on-off status of

of

OR

operation This operation result the answer register.

ANDX3

X3

is selected The on-off status The contents

LU,

unit This operation result

OUTY14

Y14

is selected by the output selection part

The operation result

Y14

has an output register, where this operation result The above example treated unit

(LU),

and units for output of the operation results. These units seen from the

“devices”. There are the following types of devices:-

is

by

of

AND

X

and Y are preceding units providing conditions or data for logic processing

X1

is taken in, and

X2

is taken in and stored in register

X2

in register A and

executed, and the operation result for

(X1 + X2)

the input selection part

of

X3

is taken in and stored in register

(X1

+

X2) in register B and

operation is executed, and the operation result for

(X1

+

X2)

(XI + X2)

X

and Y as input and output, but seen from the logic processing

X1

is sent to the input selection part.

X.

it

is stored in register B via register

X.

X1

in register B are sent to the logic processing unit,

is sent to register

X.

X3

in register A are sent to the logic processing

X3

is sent to register

Y.

X3

from register

A.

(X1

+

X2)

By

where it is stored, Register B becomes

A.

By

where it is stored.

B

is

sent to output

is

stored and kept.

is obtained.

(Xl + X2)

Y14.

A.

X3

is obtained.

1

LU

are called

LU,

X

........

Y

.........

M

........

T

.........

C

.........

F

.........

D

........

K

.........

Input

output Temporary memory Timer Counter External failure memory Data register Constant

Input and output

Only input by the

by

LU.

the

LU.

-6-

2-3.

Program memory and

(1)

User program memory

data

memory

(2)

Data memory

Step

User program memory

I

,I

I

I'

I

1

MO

5

M

253

M

254

Temporary memory

(M)

254

points

Battery troublc

-

RUN

signal

.

------

Timer,

countel

(T

,C)

128 points

----

External Failure memorj

(

kl

)

100

points

[lata

regi5ter

(

1)

96 points

-

Note: The

EP-ROM

jointly for

(3)

Latch contents

No. Latchabel momory

I

1

lNone

21

MO - 253,

DO

Note:

Nos.

switch.

-

95

1

T.CO

-

5

XK

-

12;

are

socket

step and

of

is

2K

K2CPU

Unlatchabel memory MO

-

255,

DO - 95 MO - 127, 254, 255,

M254, 255,

DO

-

95

MO - 127, 254,, 255,

T.CO

-

63,

M254,

255

set with the selector

used

step.

T.

CO

T.CO

DO - 31

-

127

-7-

Notes:

1,

The timer stored

2.

Output of the present value

for

(4)

Total number

and

counter setting values are

in

the user program.

T,

C,

D,

of

pints for input and

output (hexadecimal symbol

Max.

256

points

Fig.

2-6.

Contents

of

the

is

possible

"#").

512

Max.

points

user memory

2-4.Temporary memory M (the same handling applies to the unused F and

Y)

+-

Refer to item

3-2.

The temporary memory corresponds to auxiliary relays without output to the outside. .There is

no

limitation on the number of times which this M can be used as an internal contact. The max. number for M is 254 points, but the external failure memory

F

and the unused output Y also can

be used in the same way.

M254

and

M255

have fixed applications. Do not use these

M

carelessly for other purposes.

@

M254

bzttery alarm

This becomes “1” when the battery voltage drops because of discharge. However,

as

there still sufficient time after this has become “l”, it is treated as an alarm, and the battery should be exchanged within of the output when

the

@MZ~

RUN

Y

battery

signal

When the CPU signal is required as be used for lead-out. However, in the same way as for

@In case

of

K2CPU, use “LATCH” as memory holding at the time

one

month. For the program, this is handled as a general

M,

and 1 point

should be used for lead-out as an external signal. As this becomes

is

removed,

M254

can not be used as a general M with EP-ROM operation,

an

external signal, 1 point of the output

M254,

use as a general

of

power failure. One half

A4

is not possible.

_l___l_-

“‘1”

Y

of the M (M128 to M253) can be used as latch memory when the “LATCH” switch is switched on. When the switch is set to OFF, it becomes a normal temporary memory. Resetting can be executed summarily with the CPU “RESET”’ switch. In case of KlCPU, there is no summary

as

resetting

described above. In this case, the latch function for 16 points/32 points/64 points

(setting by connectors in the unit) becomes possible by cdnnection of an ‘optional latch unit

I/O

(KL61) to the

put/output number and execute handling as a latch output Y”n” for the program. This Y can

-

unit connector for latching of the output

Y.

Add

“n”

to the respective in-

not be taken out directly to the outside. The latch contact is mom-ammed as Xn.

is

also

should

2-5.Timer, counter

T,

C

3

Refer to item

3-5.

Timer and counter can use 128 points together. The numbers 0 to 127 are specified consecutively in common for

T

and C. Setting value of T, C must be written in the step following the OUT in-

struction.

or

hata

C1

register

number

i

is1

OUT

TO

K

F]

j.

.i

+

P

or

data

register number

When the’above’i + 1 or The timer setting value can be set in units of 0.1 sec from

j

+

1

are omitted,

(INS.

SET ERR) occurs.

OUT

1

0.1

to 999.9 sec. The accuracy is 3 sec

in regard to the setting value.

1.

As

the setting for the min. unit of 0.1 sec varies from 0 to

0.1

sec, it may become 0 sec accroding

to the timing, In this case, set the setting value to 0.2.

a

2. For

setting in excess of 999.9 sec., execute the lower digits with the timer, and produce a timer

by driving

a

counter with frequency division for that timing.

.-

.

-8-

i‘

Example: Execute counter input by 1 min time up, and use the number of required minutes as the setting value.

3.

Timer resetting

I__

ON.

Counter setting values from 1 to structions. Output or arithmetic operations are possible for the present value

is

not possible. However, the present value is cleared to 0 at the time of power

9999

can be used. Intermediate resetting is possible by RST in-

of

timer and counter

by MOVand other data instructions.

2-6.

External failure memory

F

has the same function as the temporary memory, and when the optional external failure monitor unit cyclically and the

(KN61)

is connected to the (attachment position for the

F

number corresponding to the scan sequence position which has become

F

-+

Refer to item

3-4.

I/O

unit, F is scanned

“1

”

is

displayed numerically. When an external alarm is put out together with the display, the respective

F

is handled in the same way as a general

F

display of the after Fi When general

“0”,

no

M,

number of the external failure is cleared by the reset switch of the monitor surface

and the next Fj “1” is displayed.

external failure monitor is used, handling is executed exactly in the same way as for

so

that use as a temporary memory is possible.

M,

and alarm output can be executed via output

Y.

The

a

2-7.

Data register

2-8.

Input/output unit

D

-+

Refer

-+

Refer

to

item

to

item 3-9.

3-3.

-9-

3.

Sequence

3-1

Assignment

The assignment of the input/output numbers is decided depending on the

of

the base unit and the types and arrangement

As

an example, the decision of the input/sutput numbers will be shown for the following unit

until

programming

of

the input/output

numbers

I/O

connector numbers

of

the input/output units installed there.

composition.

Rase unit Basic

Extended

Power supply unit

CPU

unit

External failure manitor

(for

(DC

(AC

(AC (AC

data)

24

V)

100

V)

100

V)

Input unit

Output unit (for data) Input unit

Input unit

Output unit Output unit

Input/output composite unit Timer unit Latch unit (32 points switching)

R18B

K

6

8

H

K62f’

K

1

C

I’

U,

KN6

I

KX3

1

KY31

KX

3

0

KXlO

KYl1

KY22

Kf11

1

K‘L6

1

lJ

(32

points)

(32 points)

(16 points)

2 boards (16 points)

(16 points)

(8

points

(16

points)

(32 points)

+

8

points)

When the units are selected in this way, the unit arrangement becomes as shown in Fig. 3-2. for therbase unit K18B and K68B. (1)Unit arrangement

When the unit arrangement is entered into the “Unit arrangement table sheets Nos.l/2 and 2/2”, it becomes as shown in Fig. 3-3-1, 3-3-2. When the I/O units are arranged sequentially

0

from

on the number of points of each I/O unit is specified and entered on the lower left

of

the table, so that the number of required points according to the configuration is obtained. The

2

purpose of the input/output is entered in the application column and the upper I/O

number are entered. Use sequential numbering with left justification in units of 16 points,

Le.,

00,

01, 02, ...

OF.

Note: The input/output numbers are hexadecimal numbers. (Indication method:

0,

1,

2,

3,

4,

5,

6,

7,

8,

9,

A,

B,

C,

D,

E,

F

... The figure increases

by

one digit when F is reached.

digits of the

0 0

El#)

(2)Definition of the input/output numbers (drawing up of the input/output list)

When the 2,

...,

I/O

adress “OA” is decided as shown in Fig. 3-1 (decision in hexadecimal units as

to“OA”, the numbers for each input/output are necessarily defined on

a

1

point cor-

1,

respondence.

Lower

1

digit

Inevitable definition with

a

1

point correspondence.

,

Fig.

3-1.

Assignment in

the

unit

Under reference to Fig. 3-3., the input/output list is defined sequentially with respondence and complete the input/output list. (Execute entry with use

of

a

1

sheets

point cor-

2.)

Caution points for adress assignment: @Occupation of 16 points:16 points for the external failure monitor, timer, blank (only in the

case of intermediate blanks), and latch unit must be selected. Note: Note that the entire arrangement is shifted if a unit which occupies

32

points or 64

points is inserted into the blank afterwards.

@Occupation of

Select

32

Refer to the lower left

32

points or

64

points

points/64 points for multipoint storage input/output units, latch units

of

the unit arrangement table sheets.

3

(3)Cations for input assignment

There is no special principle, but when assignment is executed under consideration of the

,I

’\

following points, programming and checking will be facilitated and the arrangement of the wiring diagram will become easier. @Collect, for example, push button switches together, then limit switches, etc.

so that the in-

put are grouped in similar kind. @Assign sequentially according to the divice numbers within each type. @When there are remaining points, assign on device or machine per input unit. @For devices which can be connected externally, assign after connection. @Assign high noise inputs as far as possible from the CPU, i.e. with later numbers.

(4)Cautions for output assignment

In the same way for input assignment, there is no special principle, but attention should be paid

to the following points. @Collect output devices of the same type together.

-11-

@Assign in the sequence of device numbers for the same kind. @When there are remaining points, assign one device or machine per output unit. @Assign output devices with high noise as far as possible with later numbers. @Assign consecutive numbers

to

related output devices, e.g., motor forward-reverse contacts.

POWER

UNIT

CON

1

CPU

UNIT

CON 2

2

v

(KlCPIJ)

POWER

UNIT

l/O

UNIT0

CON

.v

KN61

00

2

OF

I/O

UN

I

TO

3

I/O

UNITl

CON4

22

~

x10

2

X2F

I/O

UNITl

I/O

UNIT2

CON

5

Y

30

2

Y4F

I/O

UNIT2

I/O

UN

I

T3

CON 6

X50

2

X5F

1,'o

UNIT3

I/O

UNIT4

CON7

X60

2

X6F

I/O

UNIT4

I/S

UNIT5

CON

8

22

~

X70

2

X7F

I/O

UNIT5

I/O

UNIT6

CON

9

Y

80

2

Y

8F

vo

UNIT6

I/O

UNIT7

CON

10

4

22

~

z

Y90

2

Y9F

I/O

UNIT7

CON

22

~

(K62P

CON3

1

22

~

KY

22

YAO

2

YAF

Fig.

CON

4

C!!N

5

A

lr

7-

22

I

22

1

22

V

KH

1

KT

Blank

BO

2

BF

3-2.

xco

2

xc7

Y

C8

2

YCF

Base unit connector arrangement

-12-

61

YDO

2

YDF

XDO

2

XDF

CON

7

CON8

22

J

II

2

CON

9

CON

10

22

I

'~

22

2

z

D

KL61

Y

EO

2

YEF XEO

c

XEF

Blank

MELSEC-M

--

Input/output

Base

(I/O

connector

nam

e)

Basic base

IK

18B

list

<

_.

Fig.

3-4-11,

---

Sample

system

Approved

Drawn

UP

Mitsubishi

80-

10

-10

No

ditto

(1)

(continued)

--IS-

Sheet

form

2

MELSEC-K

Input/output list

(continued)

Base

(I/O

name)

connecto

1/0

type name (number point dunit)

(KX3

unit

of

l),

.

Fig.

Input/output number

2

0

€3

1

2

3

$4

HCD

3-4-2.

Device number Name (Connection terminal wire

C

D

First

digit

/

I

J

Second digit

Sample

1

2

4

8

10

system

Input Data(1)

BCD x 2

Digital switch input

digits

/

Mitsubishi

Remarks

type, etc.)

Continued

,

ditto

(2)

KY31

(32

points)

5(

-_-

6

7

8

9

A

H

(1

I)

vp’

3

0

B C D

RCD

BCD

L

f

/L

/

I

digit

1

2

3

4

II

CD

5

First

digit

Second digit

First

Second dig?

20

-

40

80

1

2

4

8

10

20

40

130

1

2

4

8

10 20

V

Input Data(lI>

RCD

x

2

digits

Digital switch input

/

\

i

+

Output Data(IV)

BCD

x

2

digits

Numerical dirplay

I

,

Same

a\

abovc

(cont inued)

yF

(The following page for

6

7

9

A

13

C

I)

E

KY31

i

CD

B CD

is omitted.)

Second digit

First digigt

40

80

1

2

4

8

10

20

40

80

-16-

I

Output UatdV)

BCD

x

2

digits

To

the numerical setting unit

I

Sheet form

2

MELSECr-K

Input/output

-

Base

(110

name)

connect0

['O

[number points/ unit)

list

unit

name

of

-

Input/output

number

Fig.

3-4-3.

Device number Name

Sample

system

---'-I

F-f--i

Approved Drawn

(Connection terminal wire type, etc.)

up

Mitsubishi

Remarks

,""~NO.

ditto

(3)

-1

0

1

2

4

5

6

8

9

A I5

(1

1

I

PX

1

I'X

2

E"

3

f'X

5

YX

6

vx7

IpX

11

px

12

PX

13

PX

14

PX

15

Proximity switch for timing

Proximity switch

'for

7

for position detection

I

1

Proximity

I

Proximity switch for

J

switch

for

1

Proximity switch

\

for

position detection

of

axis

timing

B

of

axis

A

B

n

-

InstaHation

machine side

'

Proximity

(shielded cable)

I

1

I 1

On

the

switch

ditto

(4)

b'l

0

I

2

3

4

j

5

6

71

9

a

13

(!

I)

I

Pi3

PB

P

€3

I'B5

Y

1%

PI3

PR

PB

1

3

4

6

12

13

14

15

16

I

1

i

I

i

I

1

Axis A Start

Forward PB

Reversec PB

Manual

ON

Automatic ON

Axis B Start

Stop

,PB

Foward PB

Reverse PB

Manual

OM

Automatic

ON

PH

(S.W)

(SIN)

PB

(SW)

I

I I

I

i

To

the

monitoring

operation

(

1.25mi

panel

(U)

)

-117-

Sheet form

2

3-2.

Temporary memory

Enter the temporary memory list using “Sheet form 4”.

Assignment is not generally executed before the control circuit design, but at the time of deisgn

completion or at the time of programming. Normally, the temporary memory is decided during the circuit design,

after program completion, entry into the list should be executed for arrangement.

M

Since

used for the circuit

is common to the universal shift, assignment of numbers separated from the M numbers

so

is

M

that the design proceeds controlling the number of assignment points, and

convenient. In addition, the following two items are used in the same way as

M.

M254 (battery alarm) The alarm signal (“1”) is given when the

battery voltage drops below the specified value. The signal is “1”

no

when M255 (RUN signal) As this signal becomes “1” when the CPU is in RUN status, this is to be taken to the outside (RUN

For use as an external signal, execute programming for take-out via the output unit in the same way as for a general Also, as these M differ from general

3-3.

Data register D

Normally, a decision is made in the same way as for temporary memories while the program is being drawn up, but it should be decided in advance to use numbers close to each other for data of’ the same kind, and the details can be determined together with drawing up of the program. Enter the data register list using “Sheet form

1 data item consists of 16 bits. These data are handled either as binaries (BIN) or as binary coded decimals (BCD). Accordingly, the max. size for data of 16 bits is as follows: BCD:

BIN:

As these data consist For example, even when a other data. Even the smallest numerical value occupies 16 bits.

battery is used (normal voltage

M

is used as output signal path when the signal

M.

Binary coded decimals (decimal number of 4 digits x

Binary number (Binary number to the decimal number

of

16 bits each, 2 data con not be used jointly within 16 bits.

BCD

9999.)

is

a 2 digit number, the upper 2 digits can not be used jointly with

...

0,

down voltage ... 1).

...

1, STOP

M,

do not assign them erroneously as general

of

16 digits. However, the numbers handled here are up

5’’.

...

0).

4

bits)

Tndicating 1 BCD digit.

M.

3-4.

Externa failure memory

This is abbreviated as failure memory, and the ing is in the same as for is always possible to execute has been established on the external failure monitor. Use “Sheet form 6” for the failure memory list. As

fauilure points

contents are classified, and the,index numbers arranged

recognized directly from the number. After classification as described above, detailed entry into the list should be executed while programming the failure conditions. At the time of program completion, the list should be checked once again, and the numbers should be assigned in The handling method for the program will be described later.

FO

to

F99,

F

“F”

of failure is taken as the symbol. The handl-

M, but when an external failure monitor (KN61) is used in the case of F, it

a

search for

the use value will be increased when entry is made such that the failure

“F

=

1” and to display the F numbers for which “1”

a

large provision is made of 100 points for the

so

that the trouble contents can be

a

way convenient for trouble-shooting.

-18-

3-5.

Timer,

counter T,

C

(l)Timer, counter list

Use “Sheet form Accordingly, discrimination between timer and counter must be made with

7”.

The timer and counter are used jointly, and up to 127 points are possible.

T

or C in the

selection column of the list.

(2)Timer assignment

First assign the timers required by the control specifications. Next, assign the timers required at the time When the timer setting time is the same,

of

design of the control circuits.

a

timer can be used repeatedly, as long as the operation does not overlap. Accordingly, when the number of timer points is not sufficient, this technique should be used by employing the same setting time as far as possible. At the time of timer number assignment, also enter the setting time limit into the list. Time setting is executed in units of

0.1

sec.

TIC

P-2

(3)Counter assignment

Assign the counters required by the control specifications. In the same way as for timers, repeated use with the same value is possible as long

as

the operations do not overlap. It is con-

venient to enter both count input and reset input into the list.

-19-

4.

Instruction functions

4-1.

Instructions

list

Sequence instructions

instruction

!

I

Function

Logic

operation

start

Contact a

(

Operation

start

NOT

Logic

operation

Contact b Operation

(

start

1

ogical product

connection

NAND

Logic

Contact

(

Series. conneLtion

start

b

)

'

)

,vm bol(riari1t

Fl

Load

1-1)

Load inverst

Fl

AND

Fl

ANI)

inverst

Table

.

. . . .

. . .-

Drawing representation

I

X,Y,M,T,C,F

I

X,Y,M,T,C,F

4-1.

Sequence instructions list

nstruction

ymbol(namc

M

c

Maslei

contro!

lastcr contrc

I

c5et

s

E

I

~-

KST

Rew!

Set

1

'I'

1

Function

Master control start

Master control reset

I

ilp-

flop

counter rcset

Drawing representation

OR

Contact

(

Series

between blocks

1,ogic

€3

Jarallel connection xiween blocks

T

r

for

ilaiallel.

connection

Logic

[

::r:;:lt

connect

Logic

AND

Output

C.

Fl

OR

inverse

F]

AND

block

0

u

OK

block

0

IJ

ou

*

Constant

Data instructions

1

a

)

NOR

)

ioii

block

connection

bloch

OR

I I

Table

4-2.

Data instructions list

Drawing representation

g

€*"I-

n

Shift

rcinporary

memory

shltt

Conditional

I'ulw

No

procewng

--

'rogram

coinpletic

Instruction ymbol(name

a

f'lus

Function

4ddition

s

t

D

jump

t'

--

+I>

1

i

Program delete or for space

Be sure of enter the end of program

END

at

Larger

I

3

-

I

Notes:

1.

*1

indicates the source.

2.

*2

Indicates the destination.

3. *3

Negative numbers are not handled.

Smaller

Equal

I

-20-

a

Minus

R

0

BC

1-q

Binary

4.

5.

C'onverrion

c

1)

BIN

to

BCD

Conversion

D

S

to

BCD

to

Convcrsion BCD

to

BIN

Conversion from

S

to

BIN

to

As

input signal to start data operation,

indicated.

>, <,

=

are equivalent to a contact while other instructions are

equivalent to coils.

from

D

from

D

X,Y,T,C,M

or F is

4-2.

Types and composition

of

instruction words

(1)Instruction types

MELSEC

instructions are composed with a basic word length and according to the instruction type, there are the structions, and Corresponding to this, 1,

@

Sequence operation instructions

@

Output instructions

@

Data instructions

@

Others

3 step instructions.

2,

or 3 program memory steps are required.

LU

hlC,

MOV,

NOP,

LDI,

MCR

>,

END

AND,

SFT,

(,

=,

3

lengths

AN1,

PLS,

+,

-,

of

16

bits

(2

bytes = 1 word),

of

1 step instructions, 2 step in-

OR

ORI,

AN&

ORB

SET,

RST,

OUT,

CJ

RCD,

BIN

(2)Composition

(1 step instructions)

First step

(2

step instructions)

First step

of

the instruction words

Instruction code

S,FT,

ANB,

NOP,

MC,

PLS

-

ORE3

END

MClt

OU

T

T,

-

r

Instruction code

Input/output source

X.

Y,

M,

F

T,

c,

M

None

K

OU

‘r

c.

Input/output number

x\

yooo#- 1 FF#(

M

0-253

I

‘5’’

is

attached

C

J

8

OFB#(Kl)

None

for

index use.

K2

I

)

No

SET,

RST

for T.

No

I

i

8

SET for

=

0-6

T.

3

Second step

(3

step instructions)

First step

Second step

Third step

I

[I

I

7-

L

(2

step instructions)

OUT, CJ

Data instruction code

T,

MO

V,

?,

Source

Destination

C

(,

=,

+,

-,

I

[K

-21-

8

7

Same

as

instruction Instruction code

BCD,

B

(constant) or D (data register number)] (constant)

8

1

step

OUT

I

N

Auxiliary code (type)

or

K

(constant) or

(Data register number)

K

(jump destination step)

D (data register number)]

0

D

I

1

(3)

Instruction composition list

Instruction

L

1)

I,

I>

I

AND

AN

I

OR

OR1

Input/output

source (device)

Input/output numbei

F

-FF#

-253

-99

0-

F#

F

F#K2

1

FF.#K2)

127

)

"(7

O'(

0

1

-I?

1 FP#K2)

FF#

'(7

F

-253

-99

0-

127

F#

F#K2)

O#(

0

I

instruction

-1

OUT

ItST

--{

SFT

YLS

Input/output

1

source (device)

'

I

t

1

Y'

h4

Y M

C

F

M

[nput/output number

F F#

O'Tl

FF#K2)

0

-253

0

-

99

]

0-

127

I

0

-

253

0

-

99

PF#

O'Tl

E1F#K2)

0 - 253

0

-

63

0

-

99

0

-

o

253

-2253

--__-__I-

ANB

0

RB

MC

MCR

NOP

END

0

-253

0

-99

10-127

Index number

(Ki)

0

-

Fig.

4-3.

cJ

Notes:

1.

M254

Battery alarm

M255

RUN

Fixed. Handling

M.

2.

(

63

Instruction cornposition list

M2CPU.

3.

I]

1-1

-

I

signal

is

92

#

indicates the value for the

)

indicates a hexadecimal number.

Step number

0 - 2047

the same as

(4095

for

K2)

general

-22-

4-3.

Sequence instructioias

The instruction functions must be understood at of

programming.

the

time

Programming can be executed with electromagnetic relay symbols as well as logic symbols.

/'

4-3-1.

AND,

ANI

.e*

Series connection operation

AND has the operation function for series connection of the contact

a, and ANI has the operation function for

series connection for the contact b.

Both execute the series connection operation (AND) for the previous operation results. The figure shows the AND operation, and the operation

X3

with the bold line is indicated as

1

AND

X3

At this time, the

XO

X3

operation is executd by the instruction AND this case, the

XO

part has a series connection, but as there is no operation result before AND

XO.

The figure shows the

X3

operation is executed with

XO,

is the operation result up to this time. Also,

XO,

LD

XO

is obtained instead

ANI

operation, and the operation

of

and the

X3.

In

of.

of

Y75 with the bold line is indicated as

16

ANI

Y75

At this time, the Y75 operation is executed with X9, and the

-.

X9

Y75 operation is executed.

This operation takes the inversion of the specified number

a

(contact

becomes contact b), and then series connection

operation is executed.

Fig.

4-1.

Y19

Fig.

Symbols

=

xo

4-2.

AND

y'pjj

-zxg

for

8

..

x3

operation

s

k'n

'AND

and

ANI

/\

4-3-2.

OR

contact a, and

OR9

QRI

...

Parallel connection

Operation

has the operation function for parallel connection

OR1

has the operation function .for parallel

connection of contact b. Both execute the parallel connection operation

the previous operation result. In the figure, the connection

becomes

With this operation, and the operation

QW,

and it is indicated as

21

OR

X26

X5

X5 + X26

is the previous operation result,

of

the bold line

is executed.

(OR)

of

with

X26

Fig.

4-4.

Fig.

4-3.

ANI

Symbols

Y105

=

4-5.

operation

X5

+

OR

operation

for

X26

OR

and

OR1

-23-

The connection for

T7

in the figure becomes

ORI,

and

it

is

indicated as

25

OR1 T7

With this operation, the inversion of the specified number

is taken and parallel connection operation is executed.

4-3-3.

LD,

LDI

...

Operation start

LD has the operation function to start operation

of

contact a, and LDI has the function to start operation of contact b. At the time to start operation for the circuit block, there is no previous operation result,

so that the input signal is

taken in by this instruction, and it becomes the operation result. Accordingly, this instruction is always used first for a circuit block. In the figure, the bold line

of

X13 becomes this instruction,

and it is indicated by

30 LD X13

In this circuit, as can be seen from the logic expression,

+

Y71

Y88 is enclosed in brackets, and to calculate the equation, the contents of the brackets must be processed. Their operation start is executed newly from Y71 with operation

of

the bracket contents,

so

that an LD instruc-

tion is also used for Y71 as

31 LDY71

Since the LDI instruction effects operation start from con-

of

tact b, the contact C7

the figure becomes this command,

and it is indicated as

45

LDI C7

2%

Fig.

30

I

L

4-7.

Fig.

Symbols

x

13

(

Y

4-8.

LD

I

for

LD

and

LDH

74

71

+Y

88

operation

4-3-4.

ANB

...

Series connection operation between blocks

ANB has the function to operate a series connection bet-

ween blocks. In the case

of

the circuit shown in the figure,

AND must be executed between the two operation blocks

(X1-B

tion to execute this operation A

+

Y30) = A and (-1

+

m)

=

B. The instruc-

x

B becomes ANB, and it corresponds to the bold-line connection parts in the figure. This means that the ANB symbol is not a cootact symbol, but

a

connection symbol.

=

4-9.

-

C7'X2

LDI

operation

Y55

Fig.

[=I

Fig.

4-9.

Symbol

0

-

Y

30

=L

(X

1

Fig.

X2$-Y

4-1

.

1.

30

ANB

for

ANB

--

)

0

(

Y

Operation

31

+Y

33

)

-24-

4-3-5.

ORB

...

Paralle connection operation between

blocks

ORB has the function to operate a parallel connection bet-

ween blocks.

In the figure, tion blocks (X17 becomes the instruction

and it corresponds

OR

must be executed between the two opera-

.

Y90)

=

A

and (M33 * Y74)

to

execute this operation

to

the bold line in the figure.

=

B.

A

ORB

+

In

B,

this

figure, as X31 is only one block, the instruction for X31 becomes

OR and not

ORB.

x28

Figs

4-12.

ORB

I

II

Symbol

for

ORB

70

t

4-

4-3-6. As

effictent circuit switching sequence program by opening or

closing a common line

MC,

shown

MCR

...

Master control start, reset

in

the figure, master control permits establish an

of

the control circuit.

MC: Master control start

MCR: Master control reset

T-

Fig.

4-14.

MC,

MCR

I

1’

I

instructions

MC and

MCR

are handled by affixing the Ki index number. MCR Ki is always required in

regard to MC Ki.

X15

8

10

15

6

Fig.

4-15.

X

Examples

of

use

for

MC and MCR

-25-

(Coding)

x

0

1

2

3

4

5

6

7

8

9

10

11 12

I

l

18 14 15

L

rj

AN

1

.,

AND

h.1

c

LD

AN

1)

ou

fr

AN

I

LD

AND

LD

AND

ORB

AN

I

OUT

MC

R

10

xzo

x

21

K1

X

15

X

16

Y

30

Y

31

X

16

M

15

X

17

Y

31

Y32

Y

31

K1

4-3-7.

SET,

RST

...

Flip-flop set, reset

Flip-flop set and reset are effective for the following 3 types

of

devices:

output

Temporary memory

Failure memory

(However, reset is available

(Coding)

(1)

Output

(2)

Temporary memory

10

I1

12

13

10

11

12

(Y)

set, reset

LD SET

LD

RST

LD

ssrr

LD

XO2

YlO

Xo5

Yio

(M)

XO2

MOO

Xo5

Y

M

F

for

set, reset

counters

13

lot;

Fig.

4-16.

C.)

(3)

Failure memory (F) set, reset

10

11 12 13

LD

SET

LD

RST

XO2

FOO

XW

FOO

SET,

RST

instructions

Y

(C)

13

For

M,

Y,

RST

and

MOO

F,

self-holding circuits by normal sequence circuits are also possible, but the

functions may be understood more easily in the above way. Please compare with the normal

method.

(Coding).

Xo6

'PFig. :-17. :holding

r+

Fig. 4-17. Self-holding

YlO

ciy~

circuit

10 11

12

13

LD

OR

ANI

OTJT

x

02

Y

10

X05

YlO

When flip-flop holding is required at the time of power failure, output Y latchg becomes poss

ble

for

the decided range by connecting a latch unit to the input/output unit connector and selec-

16/32/64

ting

K2CPU

[Refer to

(3)

Counter ble by

points by switching. [Refer to

5-2-9.(1).]

is provided with a switch enabling to hold M collectively in the case of power failure.

5-2-9.(2).]

(C)

preset value resetting is also possi-

RST

instructions.

20

I

OUT

C

06

-

-26-

24

Fig.

1-

4-18.

RST

Counter circuit

Coding

of

Fig.

4-18.

20

21

22

23 24

4-3-8.

SFT

...

By application of an (M),

a

1 bit shift register can be composed.

By linked application of memory

(M),

LD

ow

K

.LD

RST

MO.3

CM

100

M

05

COS

Temporary memory shift

SFT

instruction to a temporary memory

SFT

instructions to a temporary

a

shift register

for

the number of links can be

established.

/"'

'?

When this memory has the function for processing consideration of the status of the preceding

a

shift signal

M.j

Mj

M02

is given to a temporary memory Mj,

as

follows under

Mj-1.

=

1

for

Mj

-

1 = 1

Mj-1 becomes 0 after

==

0

for Mj

-

1 = 0

i

Fig.

4-20.

SFT

-

SFT

instruction execution.

instructions

When this instruction

is

used, the number

sf

required steps

(M

link

number) must

use

consecutive

M.

Aslo, as the shift signal M02 may be continuous if seen with the programmable controller inside the seanning time, reverse arrangement as follows should be executed in regard to the sequence arrangement. Normally, the shift signal will use the pulse form

M

changed from input

X.

-27-

30

33

37

39

41

Fig.

4-21.

Notes:

1.

Do

not give SFT instructions to

tion also applies to

2.

For

M12

=

1,

it does not become 0 even when

quired.

Shift register

M254.

MO. M255

may be shifted to

M2

(shift pulse) is added. Resetting by

(Coding)

80

31

32

33

34

35

36

37

38

39

40

41

42

MO.

In the same way, this prohibi-

I,

1)

s

F1

s

I‘

1,

I>

H

s

IC

s

n

s

L

I>

s

ic

LD

€’

L,

LD

P

1,

‘I’

‘S

?‘

‘I‘

‘r

s

Mz

M

12

M

11

XO3

M

12

M

11

M

10

MO

M

IO

x

01

MO

xo

2

M2

X03

is re-

CJ

...

4-3-9.

Cornditiona!

When the condition

a

jump is executed to the sequence step ad-

150,

dress

and processing of the following

XO

jump

ON

is established,

‘

Step address

Fig.

for

4-22.

the

jump destination

CJ

command

step addresses is executed. (Coding CJ

K150)

A

jump to the upper step numbers (smaller

destination always has

a

larger step number

There are for example the following use methods:

@

Jump over temporarily unrequired circuits.

@

Separation of processing circuits in conditions of highspeed processing. Please pay attention, as the step number control is required Especially when program debugging, instruction inserting and deleting, care must because of the change of jump destination address.

4-3-10.

By sion of the program is formed for

PLS ... Pulse

XO

ON, a pulse signal of 1 round divi-

formation

Mol.

The temporary memory M is the object

device for pulse signal formation. This pulse formation is executed for internal program processing. Accordingly, leadout for use as an external pulse signal is not possible.

numbers) is not possible. Take care that the jump

than the number from which the jump starts.

at

the time of programming.

Limited to

Fig.

4-23.

PLS instruction

M.

be

taken

-28-

4-3-11.

OUT is the instruction for output

operation result ,up to. that time: The object

output devices are

At

OUT

the time of

...

Output

Y,

of

M,

Y,

F,

M,

and

of

the

F,

T, and

T,

this corresponds to coil drive, and at the time

C.

.-@-I

Fig.

4-24.

of

C,

counting input in regard to the counter. Without influence onto the operation result, an

OUT

instruction permits output to several ob-

jects as shown in the following, and consecutive execution of the next operation

(Coding)

c)

IJ

rr

OUT

instruction

it becomes the

is

also possible.

120

Fig.

4-25.

In the case of

OUT

Use example

C,

counting is executed during the rise time

for

change of the counting input to pulses

OUT

by

a

120

121 122

123

124

125

126

PLS

instruction is not required.

L

1)

AN

1

0

1-1

o

u

rr

OUT

AN1

0

U

T

of

the counting input, sothat

,

M

Y56

X

I3

Y

40

M9

X21

Y41

17

-29-

4-4.

Data ]handling instructions

In addition to sequence instructions by relay symbols and logic symbols, data handling instructions such as addition and subtraction, magnitude comparison, BCD/BIN conversion, etc. are included.

Data handling instructions are composed of

following figure.

Data

--

handling

instructions

3

steps, and their notation method is shown in the

a

+*

-

BCD,

Fig. handling instructions

4-4-1.

MOV'

Fig.

When

(Dl)

The possible operation S/D combinations are shown in the following table

XO

are transmitted to

BIN

4-26.

Composition

...

Data transmission

1

4-27.

MOV

becomes

ON,

II

//

of

the data

2

instruction

the data of

D

(D2).

Destination address Operation is executed with

of

D

the data

of

S,

stored in the address

Source address

This indicates the source the operation.

0

1,

D

3

S

by

circles.

I

2

3

MOV

and the data

and the result isa

D.

I

of

the data

XO

D1

02

for

'

Constant

According to the table

these data operations are possible.

--*

hI0

MOT

MOV MOV

MOV

v

on

the left,

K

Di

TorC

X

n

D

M

D

Dj

D

Y

M

D

T

or

c

(1)

Storage in DO of the cpnstant K (1

0

pL,+*===

2 3 4)

(Coding)

0

LD

1

MOV

Xo

Fig.

4-28.

Constant set

For storage of 1 2 3 4

after automatic conversion to binary numbers. Accordingly, it should be remembered that the data are handled as binary numbers (BIN) in the programmable controller. BCD/BIN conversion is executed in principle only with input and output of data via the input/output unit.

+

Refer to the items in regard to BIN, BCD conversion.

(2)

Take-in

By specifying bits (assumption of BCD

“X”

input

bits, is handled.

K

indicates the number (1 - 4)

Accordingly, as the data of only

for

In

the case of BCD, execute “BIN” and store in D10.

(3)

Output

of

the input signal from

Fig.

I

(X10

pure binary numbers.

of

4-29.

“K4X10”,

to 1F) as 4 x,4 = 16

the contents

(4

Data input

the input of

x

1

digit), Le. 3

of

D10

are in the status

of

D11 into

by

MOV

digit decimal number) in DO (16-bit register), storage is executed

Xlo

-

1F

by

MOV

4

digits (1 digit of 4 bits).

Y50

to

into

of

5B.

Dlo.

I

X10

to

lF,

2K

3

1

MOV

2

K4

this kind of handling is executed

1234

DO

XI

0

Dl0

I

BCD, execute “BCD” and output to

Fig.

4-30.

Data output

The contents of D11 are put out into

Y50

to 5B

(3

x 4 = 12 This is used for output of binary numbers as they are. For output as

by

points).

IQIOV

Y.

K

indicates the number (1

digits .

-

4)

of

I

(Coding)

1

MOV

2

3

K3

XO

D11

Y50

-31-

1>

4-4-3.

0

c;i”

<

...

Smaller (data comparison)

I

1

<

I

Fig. 4-32.(ins t ruct ion

The same as for > (larger)

2

(D1)

3

(D2)

>

The magnitude relationship is as follows:

98

8

>lOO+-l

Notice that

4

99

I

100

=

>,

.<

do not include

(Coding)

,

0

1<

0

2

I

3

4

I(

’

Di

101

I

I-,

IJD

OUT

-D

,

102

loo<

=

XO

D1

112

Ylo

D.i

3

.

4-4-4.

Note:

=

. ..

Coincidence (data coincidence)

8

1,

Fig. 4-33. = instruction

The same as for > (larger)

4

D

OUT

XO

Yio

For these magnitude conparisons, all data are to be handled with the data converted to binary numbers. Even when constant input from the

PU

is executed as decimal numbers,

they become binary numbers on the inside.

>

=

<

instructions are series contact processing.

These cannot be executed in the same way as

LD

and

OR.

4-4-5.

+

...

Addition

to

pulse)

D

+

S

is

stored in

Fig.

4-34.

is executed

D.

f

by

S

(nl

+

instruction

Mo

ON,

2

I)

(U2)

and the value

3

The possible operation combination are

.shown in the following table

by

circles.

(Coding)

0

LD

1+

2

3

(The result

+

Kn Di 3 Kn + Dj + Dj

+

Di Dj 9 Dj + Di * Dj

If

input remains

executed at each scanning. Accordingly, input

is made after changing to pulse form.

ON,

Mo

D1

rj

is

stored

in

D2.)

addition or subtraction is

4-4-6.

,,

.

-

...

Subtraction

0

to

D

pulse)

-

S

(D2

Fig.

4-35.

-

Dl) is executed by

(111

) ( D2

-

instruction

the value is stored in D (Le.

D becomes the minuend and

-~"-^-I-.

S

the positions are reversed from the

Example: Count-up number to the target position:

Deceleration start point:

108

-

15

--c

85

DO

Dl

K15,

DO

-

D1

Assuming

MOV

-

In this way, both

MO

ON,

and

(The result

D2).

becomes the sethtrahend,

-I_-_cI_

normal calculation equations.

=

100

Dl

=

100 is reached once,

-

The result becomes

DO

and

.

15

counts in advance

D1

can be used next.

(Coding)

0

'

LD

1-

2

$3

of

D2

-

so

that caution

_I

100

D1

=

85.

M,

D1 Dz

D1

is

stored

is

required, as

in

D2.)

-33-

-

K Di

-

Di

rv-ccv

In the same way as for addition, execute subtraction instructions for subtraction data after conversion to binary numbers.

As

only positive integral numbers are handled for subtraction, take care that the Operation result

does not become negative.

Uj

+

Di-K

-+

Dj-Di+Dj

cvv

-

+Di

If the subtruction result becomes negative, execute the comparison When memory.

S > D,

execute the

S

-

D

operation in the same way, and M stores the negative result

MOVI

D1 I D2

>

or < between S and

Change the input

to

pulse

form

D1 > D2,

Mqo

=

negative

D.

in

P5

Operating D2 - D1 M41

The possible operation combinations are the same as for

<

D2, M41 = positive

D1

D2 - D1 D2

"

+

".

-34-

4-4-7.

BCD

...

Conversion

from

BIN

to

BCD

0

i

1

c.

(Coding)

LD

BCD

XO

r>l

According

3.

to

the table on the left

D2

BCD $conversion

BCD,Di,Dj+

/'

BCD,T

BCD,C

,Dk+

Di+

Uj

T+ Dk

C+

I)k

The data register contents are principally

The main application for

binary numbers, but after conversim , the registers become Dj, and the chntents are

BCD

conversion is output to the outside as a decimal number

BCD.

BCD

Dk,

from

the

status in the register (binary number) via the output unit.

However, output 'is executed via the temporary storage

D.

register.

/'

(1)

The contents

Fig.

of

C10

4-37.

Application example for

are output into

BCD

Y50

to

5F

instructions

as a 4-digit BCD value.

(Coding)

0

LD

1

BCD

2

3

4

MOV

5

6

K4

8

YSO

Y54

Y58

Y5

C

XOl

c10

DO5

DO

5

y5

0

-

53

First BCD digit

-

57

Second BCD digit

-

s

B

Third BCD digit

-

5

E

Fourth BCD digit

-35-

4-4-8.

BIN

...

I

When

Conversion

Fig.

4-38.

XO

becomes

from

(

BIN

ON,

BCD

to

D1

1

tD2

instruction

BIN

1

(binary) conversion is executed for the contents (BCD) of stored in

D.

s, and the result is

The possible conversion combinations are shown in the following table.

(Coding)

0

J,

I

1

2

3

D

RXN

XO

11.1

11.2

Generally most input data are decimal

numbers,

so

this

BIN

instruction exists.

The input data are taken in as BCD, and

is

internal processing

executed after con-

version to binary numbers.

(1)

The data are taken in from input X60 to 6B

set for the present value of counter

OdV

Fig.

xo

-

It-

-MOV

4-39.

1

BIN

4

Application for

2

K3X60 DO

5

DO

BIN

instructions

(a

BCD

number

C1

,

and this value reduced by

3

-

b

6

of

3

digits), the numerical value is

(Coding)

0

LD

1

BIN

2

K3

3

4

MOV

5

6

7-

8K

9

10

MOV

11

12

20

is

set for the present vzilue

XO

X60

DO

c

20

DO

Setting of the present

1

count value for

~

Setting count value for

of

the present

of

C1

C2

4-5.

Program

control

instructions

Program control instructions are instructions to advance the individual program of the programmable controller.

4-5-1.

NOP

...

No

processing

is the instruction for no processing, and it has no influence on the operation result up to

that time.

NOP

is used to provide an intermediate space for memory revision, or as shown in the figure,

(a) When the contact

(b)

The contact

11

rated with

OR1

X8

Y97

is sepa-

X8

+

is short-circuited by

11

6

AND

Y97

NOP.

The programming unit

(PU)

is provided with a function for consecutive

I’

\

sertion, and cancellation, that the operation is easy. Please refer manual for the

NOP

writing, in-

to

.the instruction

PU.

so

Fig.

4-40,

Contact cancellation

by

NOP

instructions

-37-

4-5-2.

END is entered at the end

END

...

Program

When the

CPU

detects the END instruction, the program counter is returned to

started again from step number

completion

of

the required program steps to announce program completion.

0.

In the figure, the program is completed at

3

1

1, and return to step number

The END instruction must be written at the end of any program. As scanning returns to the start with the END instruction, the scanning time depends on the position

of

the

END instruction.

Step number

0

1

0,

and scanning is

is executed.

I

The scanning time (response time)

can

be calculated

as follows:

I

Use

of

t

I

Yi27

completion

END

instrrictions

I

-

.

'

Average time

tion)

x

step number (from 0 to END instruc-

D

KlCPU

KBCPU

30Ps

lops

310 311

Fig.

I

OUT

END

Program

4-41.

END instructions may also be used temporarily at the time of program debugging or testing for program execution

to

an intermediate point.

-38-

5,

Programming

Please read this chapter together with the instruction manual for the programming unit

51.

Programming principles

The program is drawn up by programming on the basis

of

the circuit diagrams, but the following

(PU).

principles exist.

of

Some

5-1-1.

(1)

(2)

A

'\

(3)

these principles have already been explained, but they will be listed again in this chapter.

Instrluctions

Operation instructions like AND, the connection of contacts or contact combinations (operation results Even when the output instructions OUT,

OR,

LD, ANB, etc. are connection instructions specifying

up

to that time).

SET,

and

RST

are executed, the operation results

up to that time will not be changed. The END instruction must be given at the program end.

r

--------

tt

I

r--------

L,,,--,-,

l-1

A

Y5

a=A*X4g

B

y9

Jf

Fig.

AND

11

-

i

M5

I'

.-J

8

I

-

5-1.

Operation parties

5

''

*

OR

X49

Serial connection

ween the operation result

time and the contact

I

Y98

Parallel connection is executed between the operation result

is

executed bet-

A

a

of

X49.

B

at this

-39-

(2)

Up to 8 consecutive blocks can be produced starting with LD or

these blocks

is

executed by

ANB

or

ORB,

and it

will

become 7 consecutive blocks.

At this time, the operations between the blocks proceed in reverse order from the new operation results results

(1)

as

8

to

(8)

to the old operation

7

...

(

8

to

2

)

and

1

.

Such program operations are not mistakes, but in order to facilitate programming and checking, it is recommended to always connect two blocks starting with

LD

by ANB or

I3-J

ORB..

[61

[a

LDI,

the connection between

AND

for

ANB

8

and

7

OR

for

ORB 8 x

AND

for

ANB(

OR

for

ORB

OUT

'Y69

Operations between blocks

7

or

8

to

3

(

8

to

2

)

6

)

and

2

1

5-1-3.

(1) The program is drawn up for each

Program

of

the contact symbols and coil symbols.

The step number of the finished program is at least equal to the number

of

symbols or larger

than this number.

(2)

With the horizontally written relay symbol diagram, the program sequence for each block is from left to right and from the top to the bottom.

Return from the right to the left

is

possible with block operations.

I-

Fig.

5-2.

Program

(3)

The program is always executed in the sequence jumped.

(4)

The END instruction must be given at the end of the program.

By this, the operation time for one program round can be reduced. Please note that the

CPU does not operate normally if the

sequence

of

the program numbers, and no numbers are

END

instruction is omitted.

-40-

5-1-4.

(1)

(2)

(3)

(4)

5-2.

5-2-1.

Step number

Contacts

The contacts

X,

Y,

M,

T,

and C can be used as often as desired, and there is

the contact number. Contact ti input to contact b There is

no

concept

for

or

contact b input to contact a can be produced internally.

the contact capacity.

In the electrical sense, there is no snake circuit.

Sequence instructions and program examples

Simple circuits with

X1

-+

2

4

AND

and

OR

no

limitation on

Step

No.

r

3

-

.

InstructioI

OLD

1

OUT

2LDI

’

30UT

4LD

5ANI

.

_I

6-A-%-5

9

ItJ

12

18

-

I

Note: If the output instruction has additional con-

XB

ditions, it

is

drawn up later. Accordingly, the sequence should be drawn up as shown in the figure on the right.

Fig.

5-3.

Circuit

n

by

AND

I

and

Circuit establishment with sequential addition

of

OR

conditional

circuits.

1

I

I I

I

I I

-41-

5-2-2.

30

35

42

Complicated circuit

by

AMB

and

QRB

55

69

Fig.

5-4.

Circuit

by

ANB

and

75

ORB

KlOO

(10

sec)

--e

7 L 1)

8ANIM

9

AIN

n

x

c

3

11

5

i

5-2-3.

(1)

Circuits

with

common control lines

Circuit separation with contacts

x

Manual

Automatic

-r-l

I

1

Circuits with control lines

common

can

not

be

programmed as they are.

As

shown in the

following figure, the contacts separating the individual lines

(XQ

and

XI

in the figure) are entered for each

block.

Step

No.

Instruction Device

No.

,

I

Xn

,I

i

88

Fig.

5-5.

Circuit with common control lines

I

x39

I

85

(1)

-43-

(2)

Use

of

master control

MC

and

MCW

1,

Kl

T-

-

300

4c

--.-

t----'-

Automatic

II

X1

I

[nstructionl

Device

No

*I

t-:E-fL--La

I

t-:E-fL--La

I

Note:

-

Do

I

M25

Fig.

5-6.

not execute

Circuit with common control lines

OUT

M

I

16

26

I

nI

-1

(2)

for the same device in each range of MCKi and MCKj. In this case,

use the temporary memory in each range as shown in the above figure, and combine at the

common circuit. Chatterring will be caused when this is not observed.

-44-

(3)

Use

of

conditional jump CJ

With the method

scanning time is required. The use of “CJ” is convenient when the scanning time is to be minimized.

of

the above item (2), the CPU scans the entire circuit,

so

that a considerable

No.

nstructior

LD

1

Device

No.

I

Step

AN

AN AM

CJ

LD

AN

--

CJ

LD

4

,

I

Y30

I

S

++I-

:i

L

Automatic

~~~D

MC

-

40

MC

I-

K2

ou

MC

---

EN

D

T,

MC

LD

1

1)

L

-_.-

ou

MC

F-G

/-

59

-2T---

(Common

circuit)

§witching to separate circuits is to be executed after the completion ding to

l------

Fig.

5-7.

Common control line circuit controlled

Note: Switching

circuit

M19

and

M29

--

xo

7-

1

in this case.

‘X1

Manual circuit

--

xo

ex1

(END)

Automatic circuit

Common circuit

by

CJ instructions

(No

END

(END)

switching

for

automatic and manual)

of

each circuit, i.e. correspon-

5-2-4.

(1)

Timer circuit

ON

delay circuit

0

Continuous input

100

104

P

Step

NO.

Instruction

Ipevi&

ko:

I

01

Instantaneous input

110

7'3

yA8

yA9

T3

SM46

I

:T+z=

limit

47

sec

Fig.

5-8<.

ON

delay

timer circuit

I

(1)

9

.AN

r

T

lOOUTY

M4Q

corresponds

instantaneous contact

of

T3,

l----l-l

Step

No.

Instruction

sA9

to

the

Device

No.

3

XI.

xi!

T4,M50

YBO

yB1

Fig.

5-9.

;

\

)

__-r

Setting time limit

ON

delay

6.2 sec

timer circuit

186-

(2)

This is

by

Xl

The temporary memory

M50

holding.

an

ON delay circuit

the instantaneous input

and

X2

is required for self-

*

(2)

OFF

delay

i

I

Continuous input

120

124

circuit

Step

No.

Instruction

Device

No.

YR3

8

2

Instantaneous input

X8

X9

Fig.

5-10.

n

OFF

delay

Setting time

limit

0.8

sec

timer circuit

(1)

1

3

0

I,

1)

tKtt

This

by

X8

M45

stantaneous contact

1

0

li

is

an

OFF

delay circuit

the instantaneous input

and

X9.

corresponds

to

the in-

of

I

T8.

T8

YB9

coil,

M45

contact

b

Setting. time

limit

41

sec

Fig.

5-1

1.

OFF

delay timer circuit

-+I-

(2)

(3)

Long-time timer

0

Long-time timer by series use

of

timers

143

142

K9990(999

144

sec)

7-i

1

146

XI0

Tg

contact a

Tlocontact

a

Fig.

YCI

5-12.

@Long-time timer with use

150

155

145 K2010(201

Long-time timer

of

timer and counter

M56

152

4

147

153

159

sec)

by

series use

of

timers the required time limit tained.

Step

NO.

I;

Instructionl

Device

so

is

NO.

that

ob-

160

162

XlZ

T

T~contact

e7

Yc

14

coil

3

(M56)

1

a

-1

K4

161

c

(3

'I

K4

ourr

165

4

T

I

164

163

n

l-----l

I

r-

900

sec

x

4

=

3600

sec

=

1

h

M56

1)

L

I

The number

the timer TI4 the counter

of

is

C7

long time. After time-up,

"14.

-

At the time

of

count-up, executes self-holding output

YC3, YC3

and then the time limit operation is stopped.

time-ups

counted

of

by

to obtain a

M56

resets

C7

for

the

resets

T14,

-48-

,

(4)

Circuits by analog The analog timer and

3

to

30

sec,

The timer numbers are decided by the base unit installation position. Assuming installation at the

timer

unit

(KT61)

and time

has

limit

I/O

16

points/unit,

adjustment

unit

No.

is

execirtecl

1:

the

tiiner

with

tjiiie

!he

limits

f'ront

are

from

VO~UJIKS,

0.3

10

3

,SCC

100

103

I

XOS

x2p

-i

Fig.

5-14.

Analog

The analog timer With regard to the program memory, no identification coils and contacts to identify

Y12

corresponds to a coil, and

timer unit circuit

X12

as

a timer should be made on drawings and coding.

becomes its ON delay contact.

is

made for timers, but entry as (T) for

-49-

5-2-5.

(1)

One-shot

One-shot circuit for

x11

300

il

800

circuits

ON

time

x

11

T

is

Ycr

(2)

One-shot circuit for

I

310

contact

Fig.

5-15.

fi

b

I

1

Setting time limit

p-------------cl

One-shot circuit for

OFF

time

After input ON, output

I

drive is executed for

a

fix-

ed time.

The input be

7

sec

Xl2

Pulse width

ON

time

longer than the setting

time limit.

Step

No.

ON

Instruction

time must

Device

No.

3

16

319

Xl2

M36 M37

Yc

2

Fig.

5-16.

One-shot

circuit

Setting time

L

Jimit

for

OFF

time

Pulse width

After drive

ed

time.

input

is

executed

OFF,

output

for

a

fix-

200

5-2-6.

(1)

1

Counter

Count, reset

f;

201

200

circuit

x15

202

Step

No.

lnstructiorj I Device

NO.

(2)

Preset counter

12

Fig.

3

5-17.

Counter citcuit

4

5

I

(1)

1'

I

X4

Count input

Xs

Reset

Step

So.

input

Iristruction

Device

No.

221

x5

x6

Yn

1284

--

Fig.

5-18.

Counter

12312

\

JI

circuit

(2)

-51-

X5

Count input

xfj

Reset

input

Y

ZI

Count-up output

5-2-7,

Flicker circuit

174

x13

T5

coil

T5

contact a, T6 coil

yc4

T6

contact

5-2-8.

(1)

Pulse circuit

Rise detection pulse

T6

1

b

1

~

sec 2 sec

Fig.

5-19.

Flicker circuit

I

Step

No.

Instruction

Device

No.

(2)

MO

Drop

detection pulse

1

Fig.

Pulse width

5-20.

Rise detection circuit

Time for one program round

I

Use this as internal program trigger pulse.

I13

Mo

i

1

Fig.

5-21.

Drop detection circuit

L

te----rl

Pulse width

Time for 1 program round

5-2-9.

(1) Use of the latch unit KL61

Holding circuit

Installation output from output Y60 connected to the I/O unit

of

Fig.

for

power failure with temporary memory

KL61 to the I/O unit

5-22.

Latch circuit by

No.

latch

5

unit

as a 16 point latch taking power failure holding

No.

6.

1

Device

l--T-

Step

No.

Instructior

No.

Latch switch Collective holding at the time porary memories

Fig.

5-23.

ON

with

K2CPU

M128

Latch

circuit by temporary

to

253.

of

power failure is executed

memory

(for

K2CPU)

by

the latch switch for the tem-

-53-

5-2-10.

Star-delta motor starting circuit

Running

A'

Period

Step

No.

Instruction

I

Device

I

No.

I

stop

h

A

x1

Y65

y66

I

L.

--~~==zosec

-

f

i

\

-

T6

=

0.5

sec

...

Arc interlock

5-3.

Program examples

5-3-1.

Switching

of

for

data hameling instructions

timer set values

(1)Subject

The set values for the timer time limits among the

3 types

of

'1

sec,

10

sec, and

lo0

switched by external switching signals. The timer start signal is by push button input, display is made during operation, and output

is put out at time-up.

(2)Outlines

of

programming

sec can be

KX10

1

sec

3

,,,

\

I%-

1

lo0

sec

Timer start

Timer reset

7

KY10

YlO

tn-l"

I

y11

OE

RL

Timer operating signal

'Timer up signal

-

'Load

d

I

3 types

II

of

stants are provided internally, and setting is executed selection.

timer con-

by

Lo-

Input power supply

Fig.

5-25.

Switching

(3)Sequence design and coding example

(Sequence)

of

Load power supply

the timer

set

value

0

LD

1

MOV

2K

3

XO

10

DO

(Coding)

15

16

17

18

RS'I'

IJ)

OUT

Mo

M~

To

1)o

12

14

16

20

Fig.

5-26.

Switching circuit

for

the timer set value

4

LD

5

MOV

6K

7

8

LD

9

MOV

10

11

12

LD

18

SET

14

LD

K

x1

100

110

xz

1000

DO

x3

Mo

x4

19

20

21 22 23

OUT

Lz)

OUT

END

Ylo

To

Yll

Y12

-55-

5-3-2.

Output to the

external

indicator

for

the timer time limit

(1) Subject Output of the present time limit value for the timers TO (first digit) (third digit) display is driven.

(2)

Programming outlines KY32 nected to the

,

and T3 (fouth digit) is executed as

(DC

5V)

(64

points) is con-

I/O

unit

0,

a

BCD

for each digit, and the numerical

Ky32

KXlO (16 points) is con-

I/O

nected to the

unit 1, and assignment of and

Y

is executed

X

as

03

YO4

OB

1

shown in the figure on

1

Yoc

2

17

PI1

8

2

27

I/OUNIT

0

the right. Because of the

64

Points of KY32, the

upper digits

I/O

adresses are oc-

0

to 3 of the

cupied. The timer set values are TO

=

0.9

sec,

T1 = 1.5 sec, T2 = 52

sec, and T3 = 131 sec.

AClQOv

Fig.

I/OUNIT

5-27.

External display

,

T1 (second digit) , T2

Numerical display

1%

5v

of

the timer time limit

(3) Sequence design and coding example

+

a

3

--i

6

9

12

Dummy contact for normal switching

Timer drive conditions

BCD

v

er

-

con

sion

for

the timer contents and out-

put

(Coding)

0

LD

K

LD

K

LD

,

K

ED1

BCD

MOV

K1

x40

To

9

Xri

Ti

15

Xaz

T2

520

X43

T3

1310

Mo

TO

DO DO

Yo

33 34

35

36

37

1

OUT

2K

3

4

OUT

5

6

7

OUT

8

9

10

OUT

11 12

18

14

15

16

17

18

19

20 21

22

23

24

25

26

27

28

29

30

31

32

RCD

MOV

BCD

MOV

K3

BCD

MOV

Kd

END

K2

TI

D1

yo4

T2

D2

Yoc

T3

D3

y18

Fig.

5-28.

External display circuit

J

for

the timer time limit

-56-

5-3-3.

Counter setting

(1)

Subject

of

Input digit), and

the setting values

by

external digital switch

C7 (first digit) is executed

Digital switch input is composed

(2)

Programming outlines

KX32

XO

X1

(64

points) is connected to the

is used in common for count input. is used

as

the count reset input.

for

the counters

of

@4

(fourth digit),

by

external digital switches.

a

BCD

for each digit.

I/O

unit0, and input X assignment is executed.

C5

(third

digit),

C6 (second

X2 is used as the read-in signal for the counter data setting value.

These external input signals should be changed to pulses internally The set value input assignment is executed sequently from X10

C4

is

4

bits

x

4

=

16

points

C5 is

12

points

C7

is

X33

,..,*-.

(3)

Sequence design example

to

...

X37.

X20

to

...

X2B,

X10

C6

I

to

is

X1F

X2C

to

X33

on

for

easier use.

wards.

(Sequence)

i

-

1-

d.

PLS

M2

-1

Counter input

Counter reset

Set value

1’

2t

Fig.

5-29.

External counter setting

-57-

5-3-4.

Addition

lTubject The data register

DO

is cleared by

ON

of

input timers TO and T1 is started simultaneously. With each flicker,

ON

when the contents

+

2

is executed for the data register

of

DO become

20.

(DO is monitored to confirm program operation.)

Programming outlines

of

Data processing for addition

the external input signal

ecuted by the internal pulse formation and processing

Sequence design and coding example

XO1,

and flicker

DO,

and the output

X1

at each timer flicker, etc., is ex-

of

this signal.

(0.5

-I-

0.5

sec)

for

the

Y

10

becomes

6

10

15

(Sequence)

l

Operationg

1

1)o

Clear

I

}

Flicker

I

I10 + 2

'

-+Do

(Coding)

Fig.

5-30

Addition circuit

Note: In the test mode of the PU,

MO

I

YlO

1

:;::me of

20

SET

-58-

C'llt-

DO

and

=

RST

enable starthtop operations.

5-3-5.

(1) Subject

(2)

Remote counter setting

Remote counter setting is executed by means display for the counter is driven by the output

executed when When the counter set value is smaller than Program design outlines

100

ahead,

50

ahead and count-up.

100,

of

a

of

BCD

display

4

digit digital switch, the present value

x

4

digits, and respective outputs are

of

the setting error is out put.

I/O

UNIT

0

Digital switch (BCD

x

4

digits)

1

--

L

/'

4

Kx31

.XOY

I/O

UNIT1

x20-23

1

16

poi

1/0

1JN

1T2

(30-4F

)#

l/'O

[IN

IT3

A(;

100

V

+

PB

YB

I

Start Reset

or

stop

1

-------.oo---

-0

c

Count pulse

t-l

I

L

DC24V

------+-

x21

x22

x23

Fig.

1

Present value display

HCD

5-3

I.

Remote counter setting

X

4digits

24v

,Y%

y

53

L

J54

lJ

@'ahead

0

Setting

error

ON

during

operation ON

,ON

50

ahead

ON

at

stop

100

The

and

I/O

units

KX31,

Y

numbers carefully.

KX10, KY31 and KY10 are arranged as in the above figure. Assign the

-59-

X

+t

-----I1

(3)

Sequence design example

(The coding is omitted.)

x20

SET

MO

=-

BIN K4xo Do

I

-

k

Setting

Reading-in

of

the set value (BIN

con-

version)

ON

50

ahead

13'

'MC

K,

}

--I

x23

Judgement

of

smaller

100

than (Error output)

Setting

-

D1

D2

-

100

50

value

-

Setting value

-

output during operation

MC

reset

C1

--it

C2

-it

I

CO

--it

T-

-

OUT

CO

DO

RST

ON

with stop

Fig.

5-32.

Circuit for remote counter setting

RST

Present value display

ON 1

00

ahead

ON

50

ahead

ON

at

countUP

(Stop)

-

OUT

-

C1

D1

RST

QN

1

00

ahead

-60-

,

a\

.I______c

.

,..,,

.,.

,,,.,

/-

5-36

Time

(1) Subject

Output of the time output for shown in the figure.

Notes::

counting

1.

The time starts from

sec with

2.

Return ecuted after

for

RUN

to

00

xx

min

59

min

of the

00

min

xx

sec

xx

00

min

CPU.

sec is ex-

59

sec.

min

80

xx

sec to the

Digit

seconds

Digit

10

minutes

16

c/o

points

UN

l'l'

of

the

output

board

KYlO

is

5-33.

Fig.

(2)

Programming outlines

(a)

Establishing of a counter input pulse every 1 second.

(b) Establishing

1

pulsehec

Count-up

signal (Signal for

minute counting) Minute

Count

signal

of

-up

of

C1

C2

of

a

counter

C1

for seconds and a counter

Display assignment

C2

Second counter

C1

Counts up

counter

C2

Counts

up

to

60

for

seconds

for

minutes.

seconds

minutes

and

minutes

The contents

Fig.

5-34.

of

C1 and C2 are binary numbers.

Counter circuit for seconds and minutes

-61

-

(c) The contents of C1 and C2 are converted to BCD, and the output is executed separately for

the first and second digit. However, the fact that consecutive output of the 1st digit and the 10th digit in the sequence of

Y10 to Y1F is not possible, is the point of this exercise.

Sequence:

(i) BCD conversion is executed for the contents of C1, and they are output into

to

M7

via DO.

MO

As C1 is smaller than Accordingly,

(ii)

Mo

M4wM7

-+

RCD

MO

to

M7

L

Contents (BCD)

Y18

-

'lB

Ylo"Y13

Ci

60,

the BCD does not exceed 2 digits.

(BCD x 2 digits) becomes:

-----

Y

of

C1

}

they are output

Instead of an output for each point, a collective output

convenient.

Mo

-M3

-+

D1

4

Y18

-

Y1,

via

the data register is

Collective output is pssible by proceeding this

way.

(iii) As these conversion operations and output operations must be executed con-

tinuously, execution is made by using contact b of the dummy (normally ON signal) by

,-+p+

(iv) The same sequence as for C1 is also applicable to C2.

(3)

Sequence design and coding example

LDI

OTJT

,E;

LI)

om

LD

OUT

K

LD

Itsr

(Coding)

Mo

To

10

To

M~

Mo

Ci

60

C1

c1

Step

33

34

35 36

37

38 39 40 41

42

LUl BCI)

MOV

K2Mzo

MOV

KIM20

Mi

cz

DlO

D10

1)11

(Sequence)

MO

0

IY

fl1

1

Measuring pulse

(1

3

5

+IM0

OUT

sec)

Second counter

8

i

,

Step

0

1

2

3 4

5

6

7

8

9

Minute

43 44

45

46

47

48 49

50

51

MOV

K1

MOV

K1

MOV

K1

])I1

Ylc.

M24

DlZ

D12

Y14

12

14

c2

Mi

I

K60

1

counter

Max60

Second counter

C1

.1

output

io

11

12

13 14 15

16 17 18

Ourr

K

LD

RST

LDI

HCD

MOV

CZ

60

CJz

Cz

Mi

C1

Do

33

IY

XI

-

Fig.

5-35.

Clock circuit

Minute

counter

c2

.1

Output

19

20 21

22

23

24

25

26

27

28

29 30

31

32

K2MlO

MOV

K1

MOV

f(1

MOV

K1

MOV

Ki

DO

Mlo

D1

DI

y18

M14

D2

Dz

Yio

52

EN11

-63-

5-3-7.

Shift

instructions

(1) Subject

Programming

that the output signals at the outputs YlO, 11, 12,

...

1F for the output

so

board of KY10 installed in the device number (110 UNIT 1) are shifted every second.

(2) Programming outlines

(a) The meaning of SFT instructions

When SFT instructions are applied in regard to the temporary memory Mi, judgement is executed whether Mi- is 1 or zero. For Mi-1

=

1, Mi-1 = 1

0

is executed, and Mi = 1 is obtained.

(b) Shift register M assignment

The temporary memories M assigned as shift registers are MO, M1, M2

...

M15. (M16 is a dummy.)

(c) Composition of the shift circuit for MO to M16

0

In the circuit for the top

SET

is used instead of SFT (shift) as below.

SET conditions for MO

0

Setting of the intermediate M1 to MI5 by SFT.

MO,

Initial set

or

Setting after 1 round as M16

=

1

As processing of the programmable controller is executed by condition processing in the sequence of the sequence diagram, the entire shift is completed at once with ar-

rangement of the M numbers from the smallest upwards. Accordingly, the M numbers of the sequence diagram are arranged in reverse order from the higher numbers down.

Fig.

5-36.

Drawing

(d) Output to KY10 (output unit) Collective output at data

by

the instruction

I

‘I

I

up

of the shift register circuit

MOV

-64-

for

MO

to

M15

is convenient.

(3)

Sequence design and coding example

4-

(Sequence)

AT0

1

sec

pulse

Step

1

2

3

4

5

6 LD

7

8

9

10

I1

12 13

14

LDI

OUT

LD

OUT

RST

LD

SFT

(Coding)

Mi7

To

K

10

To

MI7

Mu

Mi6

Mi7

Id15

Mi4

Mi8

Mi2

Mil

Step

31

32 33

34

35

36

87

MOV

k4m0

MOV

g4Y

END

DO

10

f\

25

27

28

30

(dummy)

I

Pulse

generation at

the

of

CBU

RUN

Setting

of

the

top

bit

time

start

15

16

17

18 19 20

21

22 23

24

25

26

27

28

29

30

SPT

SFT

SPT

SFT

SFT SFT

SFT

]Lnl

PLS

LD

OR

SET

LDI

Mio

Mg

M8

M7

M6

M5

M4

M3

M2

Mi

Mi8

Mi9

Mi6

Mo

Mi8

fig.^

5-37.

Shift register circuit

5-3-8. Positioning

control

(1) Subject

Positioning control is executed for a moving head with a position detection by a pulse generator. Setting the input (X10 to X1B) for the target position Deceleration point Forward output Start input

...

Pulse generation detector input

(2)

Programming outlines

... Deceleration output (Y33)

...

From movement start to arrival at the target position (Y31)

XO

...

X1F

MELSEC

Input/output

...

500

(3

digits decimal number)

ON

15 ahead of the target position

Present

position display

ON

I

I I

I

!

I

y32

7

485

500

d---t--:-'

I

L---

Fig.

5-38.

Example for

-66-

a

positioning

system

(b)

Positioning control by ,absolute address

i

(for

full

scan),

Origin limit Present position

register, origin reset

Start set, reset

Command value reading

Command value (temporary register)

Bir

ection

discrimination

(

I)IO

:

Present value) Direct ion discrimination

Pulse input (position pulse)

Updating of the present value for the

forward direction Negative prevention for the present

value Updating

of

the present value for the

reverse direction Present value (temporary register)

Deceleration when the difference between

$thr set value and the present value

becomes

15

or less during movement in

the forward direction.

Deceleration

when

the difference between

the set vaiue and the present value

becomes

15

or less during advance in the

reverse direction.

Deceleration output

Present value display

Start reset

-69-

(b) Positioning control by absolute address (using

Origin limit

Present position register, origin set

Start set,

reset

Command value reading

Deceleration command register (Temporary register)

4

Pulse

input

MC

and

CJ)

Direction discrimination

Setting value

=

present

value discrimination

The instructions for forward direction are jumped in the case of reverse direction.

of

Updating

the present value

Negative prevention for the deceleration value

becomes

a

negative number

Deceleration value

set

(112

>O

Deceleration output

Forward output

LMO

CJ

after output reset

in

MC

K1

The instructions for reverse direction are jumped in the case of forward direction.

-78-

MC

1

I

Negative prevension for the present

4b

Updating

4)

Deceleration value set

of

the present value

dl

4k

,MSl

,

,M52

I1

il

tt

-71-

2

u

2

E

4

i

5

4-r

0

a,

t

0 0 0

*

enn

Odd

SYY

1

23

OE

m

(1)

6.

Forms

Sheet

Form

of

1-1

various program

-72-

Sheet

form

1-1

Lc

Oi

4

t

A

.-

I.

1

.-

Y

a

n

I

e

I

-

.g

-

Y

a

C

sheets

-73-

hnl

I

"

1

N

2

1

F"

21

8

,

3

4

'i

E

8

3

a

(2)

Shieet

Form

--

1-2

Rl

Sheet

form

1-2

b

I

a

c

2

Q)

.e

a

.-

hl

m

*

I

(3)

Sheet

Form

MELSEC-K

Input/output list

2

‘Approved

Drawn

up9

--

-

Sheet

No.

D

E F

-74-

Sheet

f

form

2

(4.)

Sheet Form

MELSEC-K

-

Program sheets

-

3

I

3-1-1

P

Remarks

I

Step

No.

Command

Approved Drawn up

Intput, Output

No.

Remraks

Sheet No.

/

1

-75-

Sheet

form

3

(5)

Sheet Form MELSEC-K Temporary Memory

254

Points (M0-253)

4

No.

___--_-.-----.------I_

Temporary

Memory No.

Signal Name

--+----------

*I

21

31

4l

I-

I

I-

I

Contents

I

:

81

11

21

31

6

7

8

9

M

0

,.

I I

I

M

41

8

91

I

-76-

Sheet

form

4

(6)

Sheet

Form

MELSEC-K

Data Register List

5

‘Approved

Drawn

.UP

Sheet

No.

-77-

Sheet

form

5

MELSEC-K Memory List

100

Points

of

(FO-99)

external breakdown

-1.

Approved Drawn

--

UP

Sheet

No.

I

F

21

31

4

5

6

7

8

9

-78-

Sheet form

I

6

(8)

Sheet Form

,,

"MELSEC-K

Tinier, counter list

7

[r_*

Approved

Drawn

-

--

UP

.

Sheet

No.

-79-

Sheet

form

7

Mitsubishi Electric melsec-k Programming Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

CONTENTS

Introduction

Arithmetic principle

Temporary memory

Data register D

Instruction functions

Sequence instructioias

ANB

ORB

SFT

CJ

PLS ... Pulse

Data ]handling instructions

Programming

Programming principles

Program

Contacts

Sequence instructions and program examples

Timer circuit

Flicker circuit

Pulse circuit

Star-delta motor starting circuit

Addition

Remote counter setting