Mitsubishi Electric MELSEC-F FX2N-1HC User Manual

FX2N-1HC SPECIAL FUNCTION BLOCK

USER’S GUIDE

JY992D65401F

This manual contains text, diagrams and explanations which will guide the reader in the correct installation and operation of the FX2N-1HC special function block and should be read and understood before attempting to install or use the unit. Further information can be found in the FX PROGRAMMING MANUAL and FX

, FX

2NC

, FX3U, FX

3UC

SERIES HARDWARE MANUAL.

1. INTRODUCTION

The hardware high-speed counter block is a 2-phase 50 kHz high-speed counter. It is a special function block for the FX2N, FX

2NC

, FX3U, FX

3UC

series PLC.

• FROM/TO instruction transfers the PLC data (i.e. parameters, comparing value and present value).

• The FX2N-1HC occupies 8 points of I/O on the FX2N, FX

2NC

, FX3U, FX

3UC

expansion bus. The 8 points

can be allocated from either inputs or outputs.

• Differential-Line-Driver (AM26C31 or equivalent) and open collector output encoders are available for FX2N-1HC.

• The source of your input signal should be a 1 or 2 phase encoder. A 5V, 12V, or 24V power source can be used. An initial value setting command input (PRESET) and a count prohibit command input (DISABLE) are also available.

• The FX

-1HC has two outputs. When the counter value coincides with an output compare value, the appropriate output is set ON. The output transistors are individually isolated to allow either sink or source connection methods.

• Various counter modes, such as 1-phase or 2-phase, 16-bit or 32-bit modes, can be selected using commands from the PLC. Allow the FX

-1HC unit to run only after setting these mode parameters.

1.1 External dimensions

POWER

DOWN

DIS

PRE

FX2N-1HC

55(2.17)

4(0.16)

90(3.54)

80(3.15)

YS+

YS-

YH+XP5

YH-

COMP

XP24

XD24

B5+

B24+

A5+

A12+

A -

B12+

B -

XD5

COMD

A24+

(0.16)

87(3.43)

55(2.17)

3 4 5 6

14 15

B24+

A5+

A12+

A -

B12+

A24+

Mounting hole 2-φ4.5 (0.18)

Extension cable and connector

UP LED

DN (Down) LED

A LED

B LED

POWER LED

A, φB terminal (M3 (0.12) screws)

PRESET terminal (M3 (0.12) screws)

YHxYS terminal (M3 (0.12) screws)

DISABLE terminal (M3 (0.12) screws)

DIS (DISABLE) LED

PRESET LED

YH LED

YS LED

DIN rail clip

Attachment groove for 35 (1.38) wide DIN rail

Mass (weight): Approx. 0.3 kg (0.66 lbs) Dimensions: mm (inches) Accessories: Self-adhesive labels special block number identification.

6.2mm (0.24 inches) or less

FOR M3 (0.12 inches)

6.2mm (0.24 inches) or less

• Use crimp terminals of the dimensions specified in the left figure.

• Secure the terminals using a tightening torque of 0.5 to 0.8 Nxm

• Wire only to the module terminals discussed in this manual. Leave all others vacant.

2. WIRING

PNP output encoders

If using on NPN output encoder please take care to match the polarity of the terminals of the encoder to those of the FX2N-1HC.

Differential-Line-Driver output encoders

3. SPECIFICATIONS

3.1 General specifications

Perform the dielectric withstand voltage test between the GND terminal and all the other termi- nals short-circuited.

3.2 Performance specifications

Item Specification

General specifications (excluding the following) Same as those for the FX

Dielectric withstand voltage 500V AC, 1min (between all terminals and ground)

Item

1-phase input 2-phase input

1 input 2 inputs 1 edge count 2 edge count 4 edge count

Input signal

Signal level

Phase A, Phase B [A24+],[B24+] :24V DC±10% 7mA or less

[A12+],[B12+] :12V DC±10% 7mA or less [A5+],[B5+] :3.0V to 5.5V DC 12.5mA or less

PRESET, DISABLE [XP24],[XD24] :10.8V to 26.4V DC 15mA or less

[XP5],[XD5] :5V DC±10% 8mA or less

(Selected by terminal connection)

MAX. frequency 50 kHz 25 kHz 12.5kHz

Pulse shape

t1 :Rise/fall time is 3 t2 :ON/OFF pulse 6 t3 :Phase difference between A and B is 3.5

more (at 50kHz)

PRESET(Z phase) input 100 DISABLE (count prohibit) input 100

Counting specification

Form at

Automatic UP/DOWN (however, when on 1-phase 1-input mode, UP/DOWN is determined by a PLC command or an input terminal.)

Range

When 32-bit is specified : -2,147,483,648 to +2,147,483,647 When 16-bit is specified : 0 to 65,535 (upper limit can be user specified)

Comparison Ty p e

Each output is set when the present value of the counter matches with the compare value (which is transferred from the PLC), and is switched OFF by a reset command from the PLC.

YH : Direct output processed by hardware. YS : Software processed output with worst delay time of 30 (Therefore, when the input frequency is 50 kHz, there is a worst case delay of 15 input pulses.)

Output signal

Types of outputs

YH +:transistor output for YH output YH −:transistor output for YH output YS +:transistor output for YS output YS −:transistor output for YS output

Output capacity 5V to 24V DC 0.5A

I/O occupation 8 points taken from the FX

expansion bus (can be either inputs or outputs)

Power from base 5V DC 90mA(Internal power supply from main unit or powered extension unit)

COM+24V

OUT

0 V

+24V

A24+ A12+

A5 +

A - B24+ B12+

B5 +

B -

XP24 XP 5

XD24 XD 5

PLC

3.3k

1.5k

0.27k

0.1k

1.5k

0.5k

0.2k

12 to 24V inputtable

External power source DC5V,12V,24V

Class 3 grounding (<100 )

Extension cable

START

*1. " " is an external load connected with the out put. *2. Connect the grounded terminal at the PLC side as required.

FX2N-1HC

PNP output encoders

Shielding Wire

PRESET

DISABLE

COMD

Shielding Wire

Phase A

Phase B

Phase Z

12 to 24V inputtaable

ØA

COMP

ØB

LBR

B5+

B -

A5+

A -

LAR

Line driver output encoders

FX2N-1HC

Shielding Wire

When applying the Differential-Line-Driver encoder (AM26C31 or equivalent) to FX encoder output with the 5V DC terminal as shown in the left figure.

Connect other terminals as shown in the PNP output encoder figure above.

t1 t1

YH+ YS+

YH- YS-

NPN

+1+1 -1-1

Phase B

Phase B input OFF

ON while phase A input ON Count up by 1.

Phase B input ON

OFF while phase A input ON Count down by 1.

Phase A

Industrial

automation

Elincom

Group

European

Union:

www.elinco.eu

Russia:

www.elinc.ru

, FX

2NC

, FX3U, FX

3UC

expansion bus. The 8 points

FX2N-1HC

YS+

YS-

YH+XP5

YH-

COMP

XP24

XD24

B5+

B24+

A5+

A12+

A -

B12+

B -

XD5

COMD

A24+

55(2.17)

3 4 5 6

14 15

2. WIRING

PNP output encoders

If using on NPN output encoder please take care to match the polarity of the terminals of the encoder to those of the FX

-1HC.

Differential-Line-Driver output encoders

3. SPECIFICATIONS

3.1 General specifications

Perform the dielectric withstand voltage test between the GND terminal and all the other terminals short-circuited.

3.2 Performance specifications

Item Specification

General specifications (excluding the following) Same as those for the FX

main unit

Dielectric withstand voltage 500V AC, 1min (between all terminals and ground)

Item

1-phase input 2-phase input

1 input 2 inputs 1 edge count 2 edge count 4 edge count

Input signal

Signal level

Phase A, Phase B [A24+],[B24+] :24V DC±10% 7mA or less

[A12+],[B12+] :12V DC±10% 7mA or less [A5+],[B5+] :3.0V to 5.5V DC 12.5mA or less

PRESET, DISABLE [XP24],[XD24] :10.8V to 26.4V DC 15mA or less

[XP5],[XD5] :5V DC±10% 8mA or less

(Selected by terminal connection)

MAX. frequency 50 kHz 25 kHz 12.5kHz

Pulse shape

t1 :Rise/fall time is 3μs or less t2 :ON/OFF pulse 6μs or more (at 50kHz) t3 :Phase difference between A and B is 3.5μs or

more (at 50kHz)

PRESET(Z phase) input 100μs or more DISABLE (count prohibit) input 100μs or more

Counting specification

Form at

Automatic UP/DOWN (however, when on 1-phase 1-input mode, UP/DOWN is determined by a PLC command or an input terminal.)

Range

When 32-bit is specified : -2,147,483,648 to +2,147,483,647 When 16-bit is specified : 0 to 65,535 (upper limit can be user specified)

Comparison Ty p e

Each output is set when the present value of the counter matches with the compare value (which is transferred from the PLC), and is switched OFF by a reset command from the PLC.

YH : Direct output processed by hardware. YS : Software processed output with worst delay time of 300μs. (Therefore, when the input frequency is 50 kHz, there is a worst case delay of 15 input pulses.)

Output signal

Types of outputs

YH +:transistor output for YH output YH −:transistor output for YH output YS +:transistor output for YS output YS −:transistor output for YS output

Output capacity 5V to 24V DC 0.5A

I/O occupation 8 points taken from the FX

expansion bus (can be either inputs or outputs)

Power from base 5V DC 90mA(Internal power supply from main unit or powered extension unit)

COM+24V

OUT

0 V

+24V

A24+ A12+

A5 +

A B24+ B12+

B5 +

B -

XP24 XP 5

XD24 XD 5

PLC

3.3k

1.5k

0.27k

0.1k

1.5k

0.5k

0.2k

12 to 24V inputtable

+24V

2.2kW YH-

YH+

YS-

0 V

External power source DC5V,12V,24V

Class 3 grounding (<100 )

Extension cable

START

YS+

*1. " " is an external load connected with the out put. *2. Connect the grounded terminal at the PLC side as required.

Power supply for out put load drive DC5 to 24V

FX2N-1HC

PNP output encoders

Shielding Wire

PRESET

DISABLE

COMD

Shielding Wire

Phase A

Phase B

Phase Z

12 to 24V inputtaable

2.2kW

:source :sink

ØA

COMP

ØB

LBR

B5+

B -

A5+

A -

LAR

Line driver output encoders

FX2N-1HC

Shielding Wire

When applying the Differential-Line-Driver encoder (AM26C31 or equivalent) to FX

-1HC, connect the encoder output with the 5V DC terminal as shown in the left figure.

Connect other terminals as shown in the PNP output encoder figure above.

t1 t1

YH+ YS+

YHYS-

NPN

3.3 Buffer memories (BFM)

#5-#9, #16-#19, #28, #31 are reser ved.

1) BFM #0 Counter mode (K0 to K11), BFM #1 DOWN/UP command

a) 32-bit counter modes

A 32-bit binary counter which executes UP/DOWN counting will change from the lower limit value to the upper limit value or the upper limit value to the lower limit value when overflow occurs. Both the upper and lower limit values are fixed values: the upper limit value is +2,147,483,647, and the lower limit value is -2,147,483,648.

b) 16-bit counter modes

A 16-bit binary counter handles only positive values from 0 to 65,535. Changes to zero from the upper limit value or to the upper limit value from zero when overflow occurs; the upper limit value is determined by BFMs #3 and #2.

c) 1-phase 1-input counter (K8 to K11)

d) 1-phase 2-input counter (K6, K7)

e) 2-phase counter (K0 to K5)

BFM number

Write

#0 Counter mode K0 to K11 Default: K0

#1 DOWN/UP command (1-phase 1-input mode) Default: K0

#3,#2 Ring length Upper/Lower Default: K65,536

#4 Command Default: K0

#11,#10 Preset data Upper/Lower Default: K0

#13,#12 YH compare value Upper/Lower Default: K32,767

#15,#14 YS compare value Upper/Lower Default: K32,767

Write / Read

#21,#20 Counter current value Upper/Lower Default: K0

#23,#22 Maximum count value Upper/Lower Default: K0

#25,#24 Minimum count value Upper/Lower Default: K0

Read

#26 Compare results

#27 Terminal status

#29 Error status

#30 Model identification code K4010

Count modes 32 bits 16 bits

2-phase input (phase difference pulse)

1 edge count K0 K1

2 edge count K2 K3

4 edge count K4 K5

1-phase 2-input (add/subtract pulse) K6 K7

1-phase 1-input

Hardware UP/DOWN

Software UP/DOWN

Phase A

Current value

DOWN

OFF

UP/DOWN is determined by input phase A (ON/OFF).

Phase B

• Hardware UP/DOWN (K8, K9)

•

Software UP/DOWN (K10,

K11)

ON OFF

Phase A input

OFF

Phase A input-1 at OFF

10323321

Phase B input

Phase B input+1 at OFF

+1+1 -1-1

Phase B

Phase B input OFF

ON while phase A input ON Count up by 1.

Phase B input ON

OFF while phase A input ON Count down by 1.

Phase A

UP COUNT

+1+1+1

Phase A input

Phase B input

•

1 edge-count (K0, K1)

•

2 edge-count (K2, K3)

•

4 edge-count (K4, K5)

main unit

s or less

s or more (at 50kHz)

s or

s or more

0μ

+24V

YH-

YH+

YS-

0 V

YS+

Power supply for out put load drive DC5 to 24V

:source :sink

-1HC, connect the

YH+ YS+

YHYS-

NPN

3.3 Buffer memories (BFM)

#5-#9, #16-#19, #28, #31 are reser ved.

1) BFM #0 Counter mode (K0 to K11), BFM #1 DOWN/UP command

a) 32-bit counter modes

b) 16-bit counter modes

c) 1-phase 1-input counter (K8 to K11)

d) 1-phase 2-input counter (K6, K7)

e) 2-phase counter (K0 to K5)

BFM number

Contents

Write

#0 Counter mode K0 to K11 Default: K0

#1 DOWN/UP command (1-phase 1-input mode) Default: K0

#3,#2 Ring length Upper/Lower Default: K65,536

#4 Command Default: K0

#11,#10 Preset data Upper/Lower Default: K0

#13,#12 YH compare value Upper/Lower Default: K32,767

#15,#14 YS compare value Upper/Lower Default: K32,767

Write / Read

#21,#20 Counter current value Upper/Lower Default: K0

#23,#22 Maximum count value Upper/Lower Default: K0

#25,#24 Minimum count value Upper/Lower Default: K0

Read

#26 Compare results

#27 Terminal status

#29 Error status

#30 Model identification code K4010

Count modes 32 bits 16 bits

2-phase input (phase difference pulse)

1 edge count K0 K1

2 edge count K2 K3

4 edge count K4 K5

1-phase 2-input (add/subtract pulse) K6 K7

1-phase 1-input

Hardware UP/DOWN

K8 K9

Software UP/DOWN

K10 K11

The counter mode is selected form the PLC. As shown below, values between K0 and K11 are written to buffer memory BFM #0 form the PLC. When a value is written to BFM #0 the contents of BFM #1 to BFM #31 are reset to default values. When setting this value use a TOP (pulsed) instruction use M8002 (initial pulse) to drive the TO instruction. A continuous command is not allowed.

+2,147,483,647 Upper limit value

Lower limit value

-2,147,483,648

Ring length (BFM#3,#2)

Phase A

Current value

DOWN

OFF

UP/DOWN is determined by input phase A (ON/OFF).

Phase B

BFM#1

K1K0

OFF

Current value

DOWN

UP/DOWN is determined by the contents of BFM #1, (K0/K1).

Phase B

• Hardware UP/DOWN (K8, K9)

•

Software UP/DOWN (K10,

K11)

ON OFF

Phase A input

OFF

Phase A input-1 at OFF

10323321

Phase B input

Phase B input+1 at OFFoON

If both phase A and phase B inputs are received simultaneously, the counter value does not change.

+1+1 -1-1

Phase B

Phase B input OFF

ON while phase A input ON Count up by 1.

Phase B input ON

OFF while phase A input ON Count down by 1.

Phase A

+1+1 -1

-1

Phase B input OFF

ON while phase A input ON Count up by 1.

Phase B input ON

OFF while phase A input ON Count down by 1.

Phase B

Phase A

UP COUNT

+1+1+1

Phase A input

Phase B input

-1

DOWN COUNT

-1 -1-1

Phase A input

Phase B input

•

1 edge-count (K0, K1)

•

2 edge-count (K2, K3)

•

4 edge-count (K4, K5)

+ 5 hidden pages

Mitsubishi Electric MELSEC-F FX2N-1HC User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual