MITSUBISHI M81016P, M81016FP, M81016KP Technical data

MITSUBISHI SEMICONDUCTOR <MOS-ARRAY>
M81016P/FP/KP
OCTAL D-TYPE FLIP-FLOP DRIVER WITH CLEAR
DESCRIPTION
M81016 is octal D-type flip-flop driver by 20-pin package. It has 8 same circuit units which is composed of D-type flip-flop logic circuit and high voltage NchMOS output transistor. M81016 has a common direct clear input and a common clock input.
FEATURES
Lineup with three packages
High breakdown voltage (BVDSX 40V)
Drain output current (IDS(max) = 200mA)
With input protection diodes
Pin assignment of input-output flow through
Wide operating temperature range (Ta = –40 to +85°C)
APPLICATION
LED drive
FUNCTION
The common direct clear input and common clock input are connected to every circuit unit by the same way. Signal at the D inputs is transferred to Y outputs by D-type flip-flops on the positive-going edge of the clock pulse. If CLR is set to “L”, outputs Y1-Y8 will be altogether set to “H” regardless of D1-D8 and CLK. The maximum drain current of an output is 200mA. The maximum between drain-source is 40V. Moreover, M81016FP/KP can save space with mini-flat package.
PIN CONFIGURATION (TOP VIEW)
1
CLR
2
D1
3
D2
4
D3
5
D4
INPUT OUTPUT
D5
D6
D7
D8
CLK
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Package type 20P4B(P)
20P2N-A(FP) 20P2E-A(KP)
DD
V
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
GND
LOGIC DIAGRAM (POSITIVE LOGIC)
Y2 18
D
Q
CK
R
CLK
CLR
Y1 19
D
Q
D1
CK
R
2
D2
3
10
1
D3
Y3 17
D
Q
CK
R
4
D4
5
Y4 16
D
Q
CK
R
6
D5
Y5 15
D
Q
CK
R
7
D6
Y6 14
D
Q
CK
R
8
D7
Y7 13
D
Q
CK
R
9
D8
Y8 12
V
DD
20
D
Q
CK
R
11
GND
Oct.2004
MITSUBISHI SEMICONDUCTOR <MOS-ARRAY>
M81016P/FP/KP
OCTAL D-TYPE FLIP-FLOP DRIVER WITH CLEAR
FUNCTION TABLE (EACH CHANNEL)
CLR
L
H
H
H
H
H : High level
L : Low level
INPUT
CLK
X
↑ ↑
L
D
X
L
H
X
X
OUTPUT : Y
H
H
L
Latched
Latched
TIMING DIAGRAM
CLK
D
CLR
X : Irrelevant
Y
ABSOLUTE MAXIMUM RATINGS (Unless otherwise noted, Ta = –40 ~ +85°C)
Symbol Parameter Conditions Unit VDD
VDS
VI
IDS
Pd
Topr
Tstg
Supply voltage
Drain-to-source voltage
Input voltage
Drain output current
Power dissipation
Operating temperature
Storage temperature
Output, H
Current per circuit output, L Ta = 25°C,
when mounted on board
M81016P
M81016FP
M81016KP
Ratings
7
0.5 ~ +40
0.5 ~ V
DD
200
1.47
1.10
0.68
40 ~ +85
55 ~ +125
V
V
V
mA
W
°C °C
5V
GND
5V
GND
5V
GND
OH
V
V
OL
RECOMMENDED OPERATING CONDITIONS (Unless otherwise noted, Ta = –40 ~ +85°C)
Symbol
VDD
VDS
VIH
VIL
IDS
VIN
tr,t f
tsu
th
tw
f
Supply voltage
Drain-to-source voltage
H input voltage
L input voltage
Drain output current (Current per 1 circuit when 8 circuits are com­ing on simultaneously)
Input voltage
Rise time, Fall time, drain output
Setup time before CLK
Hold time, data after CLK
Pulse duration
Clock frequency
Parameter
Conditions
P
FP
KP
Duty Cycle no more than 45%
Duty Cycle no more than 100%
Duty Cycle no more than 34%
Duty Cycle no more than 100%
Duty Cycle no more than 18%
Duty Cycle no more than 100%
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
Limits
min typ max
DD
5.0
4.5
0
0.7V
0
0
0
0
0
0
0
0
0
20
5
40
5.5
40
DD
V
0.3VDD
200
135
200
120
200
95
VDD
500
— — —
20
Unit
V
V
V
V
mA
V
ns
ns
ns
ns
MHz
Oct.2004
MITSUBISHI SEMICONDUCTOR <MOS-ARRAY>
OCTAL D-TYPE FLIP-FLOP DRIVER WITH CLEAR
ELECTRICAL CHARACTERISTICS (Unless otherwise noted, VDD = 5V, Ta = 25°C)
Symbol UnitParameter Test conditions
(BR)DSX
V
IDSX
IIH
IIL
ICC
VDS
RDS(on)
SWITCHING CHARACTERISTICS (VDD = 5V, Ta = 25°C)
Symbol UnitParameter Test conditions
TLH
t
tTHL
tPLH
tPHL
PLH(R)
t
Drain-source breakdown voltage
Drain-source leakage current
“H” input current
“L” input current
Supply current
“L” output voltage
Drain-source on-state resistance
Low-level to high-level and high-level to low-level output transition time
Low-level to high-level and high-level to low-level output propagation time (CLK)
Low-level to high-level output propagation time (CLR)
DS = 1mA
I
V
DS = 40V
VDD = 5.5V, VI = 5.5V
VDD = 5.5V, VI = 0V
VDD = 5.5V
VI = 5.5V or 0V
IDS = 100mA, VDD = 4.5V
IDS = 200mA, VDD = 4.5V
IDS = 100mA, VDD = 4.5V
CL = 30pF (Note 1)
All outputs off
All outputs on
M81016P/FP/KP
Limits
min typ max
40
min typ max
0.002
0.005
0.005
0.005
0.005
0.25
0.51
Limits
10
35
30
35
2.5
3
5
1
–1
5
5
0.38
0.77
3.8
V
µA µA µA
µA
V
ns
ns
ns
ns
ns
Oct.2004
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