Mitsubishi M66258FP Datasheet

MITSUBISHI <DIGITAL ASSP>

M66258FP

8192 x 8-BIT LINE MEMORY

DESCRIPTION

The M66258FP is high speed line memory that uses high
performance silicon gate CMOS process technology and adopts
the FIFO (First In First Out) structure consisting of 8192 words x 8
bits.
The M66258FP, performing reading and writing operations at
different cycles independently and asynchronously, is optimal for
buffer memory to be used between equipment of different data
processing speeds.

FEATURES

• Memory configuration 8192 words x 8 bits configuration

• High speed cycle 20 ns (Min.)

• High speed access 16 ns (Max.)

• Output hold 3 ns (Min.)

• Reading and writing operations can be completely carried out
independently and asynchronously.

• Variable length delay bit

• Input/output TTL direct connection allowable

• Output 3 states

APPLICATION

• Digital copying machine,laser beam printer, high speed facsimile,
etc.

FUNCTIONAL DESCRIPTION

When write enable input WE is set to "L", the contents of data
inputs D0 to D7 are read in synchronization with a rising edge of
write lock input WCK to perform writing operation. When this is the
case,the write address counter is also incremented simultaneously.
When WE is set to "H", the writing operation is inhibited and the
write address counter stops.
When write reset input WRES is set to "L", the write address
counter is initialized.
When read enable input RE is set to "L", the contents of memory
are output to data outputs Q0 to Q7 in synchronization with a rising
edge of read clock input RCK to perform reading operation. When
this is the case, the read address counter is incremented
simultaneously.
When RE is set to "H", the reading operation is inhibited and the
read address counter stops. The outputs are placed in a high
impedance state.
When read reset input RRES is set to "L", the read address
counter is initialized.

PIN CONFIGURATION (TOP VIEW)

DATA OUTPUT

READ ENABLE
INPUT

READ RESET
INPUT

READ CLOCK
INPUT

DATA OUTPUT

Q0

1

Q1

2

Q2

3

Q3

4

RE

RRES

GND

7

RCK

8

Q4
Q5

Q6
Q7

Outline 24P2U-A(SSOP)

24

D0
D1

23

D2

22

D3

21

M66258FP

WE

205

WRES

196

V

18
17

WCK
D4

169
1510

D5
D6

1411

D7

1312

DATA INPUT

WRITE ENABLE
INPUT

WRITE RESET
INPUT

CC

WRITE CLOCK
INPUT

DATA INPUT

1

MITSUBISHI <DIGITAL ASSP>

M66258FP

8192 x 8-BIT LINE MEMORY

Q0 to Q7

Data outputs

Read enable input

RE
5

Output buffer

1 2 4 9 10 11 123

Read reset input

RRES
6

Read control circuit

Read address counter

Memory array 8192 x 8 bits

Read clock input

RCK
8

GND
7

D0 to D7

Data inputs

Input buffer

13 14 16 21 22 23 2415

20

WE

Write enable input

Write address counter

Write control circuit

19

WRES

Write reset input

17

WCK

Write clock input

18

CC

V

BLOCK DIAGRAM

2

ABSOLUTE MAXIMUM RATINGS (Ta=0 – 70 °C unless otherwise noted)

MITSUBISHI <DIGITAL ASSP>

M66258FP

8192 x 8-BIT LINE MEMORY

Symbol

Vcc
VI
VO
Pd
Tstg

Supply voltage
Input voltage
Output voltage
Power dispersion
Storage temperature

Parameter Conditions

Value based on the GND pin

Ta=25 °C

Ratings

-0.5 – +6.0

-0.5

– VCC+0.5

-0.5

– VCC+0.5

825

-65

– 150

Unit

V
V
V

mW

°C

RECOMMENDED OPERATING CONDITIONS

Symbol

Vcc Supply voltage 5.04.5
GND
Topr

Supply voltage
Operating temperature

Min.

Limits

Typ.

0

0

– 70

Max.

5.5

UnitParameter

V
V

°C

ELECTRICAL CHARACTERISTICS (Ta=0 – 70 °C, Vcc=5V±10%, GND=0V unless otherwise noted)

Symbol Conditions UnitParameter

IH High-level input voltage

V
VIL
VOH
VOL

IIH

IIL

IOZH
IOZL

CC

I
CI

CO Off-time output capacitance

Low-level input voltage
High-level output voltage
Low-level output voltage

High-level input current

Low-level input current

Off-state high-level output current
Off-state low-level output current

Average supply current during operation
Input capacitance

OH =-4mA

I
I

OL =4mA

I =VCC

V

VI =GND

VO =VCC
VO =GND
V

I =VCC, GND, output open

tWCK, tRCK = 20ns
f = 1MHz
f = 1MHz

VCC-0.8

WE, WRES, WCK,
RE, RRES, RCK,
D0 – D7

WE, WRES, WCK,
RE, RRES, RCK,
D0 – D7

Limits

Min. Typ. Max.

2.0

0.8

0.55

1.0

-1.0

5.0

-5.0
150

10 pF
15

V
V
V
V

µ

µ

µ
µ

mA

pF

A

A

A
A

3

MITSUBISHI <DIGITAL ASSP>

M66258FP

8192 x 8-BIT LINE MEMORY

SWITCHING CHARACTERISTICS (Ta=0 – 70 °C, Vcc=5V±10%, GND=0V unless otherwise noted)

Symbol UnitParameter

AC

t
tOH
tOEN
tODIS

Access time
Output hold time
Output enable time
Output disable time

TIMING REQUIREMENTS (Ta=0 – 70 °C, Vcc=5V±10%, GND=0V unless otherwise noted)

Symbol UnitParameter

tWCK
tWCKH
tWCKL
tRCK
tRCKH
tRCKL
tDS
tDH
tRESS
tRESH
tNRESS
tNRESH
tWES
tWEH
tNWES
tNWEH
tRES
tREH
tNRES
tNREH
tr, tf
tH

Note 1: For 1 line access, the following conditions must be satisfied:

2: Perform reset operation after turning on power supply.

Write clock (WCK) cycle
Write clock (WCK) "H" pulse width
Write clock (WCK) "L" pulse width
Read clock (RCK) cycle
Read clock (RCK) "H" pulse width
Read clock (RCK) "L" pulse width
Input data set up time for WCK
Input data hold time for WCK
Reset set up time for WCK/RCK
Reset hold time for WCK/RCK
Reset non-selection set up time for WCK/RCK
Reset non-selection hold time for WCK/RCK
WE set up time for WCK
WE hold time for WCK
WE non-selection set up time for WCK
WE non-selection hold time for WCK
RE set up time for RCK
RE hold time for RCK
RE non-selection set up time for RCK
RE non-selection hold time for RCK
Input pulse up/down time
Data hold time (Note 1)

WE high-level period ≤ 20 ms - 8192 • t
RE high-level period ≤ 20 ms - 8192 • t

WCK - WRES low-level period

RCK - RRES low-level period

Limits

Min. Typ. Max.

3
3
3

Limits

Min. Typ. Max.

20

8
8

20

8
8
4
3
4
3
4
3
4
3
4
3
4
3
4
3

16

16
16

20
20

ns
ns
ns
ns

ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms

4