MITSUBISHI 〈DIGITAL ASSP〉
MITSUBISHI 〈DIGITAL ASSP〉
DESCRIPTION
M66242 Integrated Circuit has four 12-bit PWM (pulse width
modulation) circuits which are built by using the CMOS
(complementary metal oxide semiconductor) process.
This IC controls PWM waveform by adjusting the “H” width
according to serial data sent from MCU (micro controller unit)
or other device. Each channel can be independently controlled.
High-resolution digital-analog converter can be formed easily by connecting a low-pass filter circuit to the output pins of
this circuit.
FEATURES
• Built-in four 12-bit high-resolution pulse width modulation
circuits
• Easy digital-analog conversion – Quick output waveform
smoothing
Control by 1.22mV possible per step (V
CC =5V)
• Serial data input
• “H” level width setting type
• 4 independently controlled channels
• All 4 channels reset by reset input (R) High-impedance status after reset
• All 4 channels controlled by output control input (OC)
• Settings take effect after ongoing cycle is completed
• Input: TTL level
• Output: CMOS 3-state output
Output current I
•V
CC =5V ± 10%
O = ±4mA
M66242P/FP
4-CH 12-BIT PWM GENERATOR
4-CH 12-BIT PWM GENERATOR
M66242P/FP
PIN CONFIGURATION (TOP VIEW)
CHIP SELECT
RESET
WRITE CONTROL
SERIAL DATA INPUT
WRITE CLOCK
OUTPUT CONTROL
WR
S
CLK
GND
CS
S
OC
R
IN
1
2
3
4
5
6
7
Outline
14
M66242P/FP
13
12
11
10
9
8
14P4
V
CC
PWM1
PWM2
OUTPUT
PWM3
PWM4
X
OUT
CLOCK OUTPUT
X
CLOCK INPUT
IN
14P2N-A
APPLICATION
• Analog signal control in televisions and audio systems
• Control of lamps, heaters and motors
• For software servo in home appliances and industrial machinery
BLOCK DIAGRAM (EACH CHANNEL)
Upper byte
register
S
4
S
CLK
CS
WR
OC
IN
5
1
3
2
R
6
Input
register
Lower byte
register
Control
circuit
To other channels
PWM
register
8-BIT
PWM circuit
4-bit-rate
multiplier
1/2
divider
12-bit
PWM circuit
Oscillation
circuit
14
13
12
11
10
8
9
7
CC
V
PWM1
PWM2
PWM3
PWM4
X
IN
X
OUT
GND
1
MITSUBISHI 〈DIGITAL ASSP〉
M66242P/FP
4-CH 12-BIT PWM GENERATOR
FUNCTION
The PWM output waveform of each channel is controlled by
taking in PWM data from MCU or other device via serial data
IN.
input S
Twelve-bit PWM data is input being divided between upper 8
bits (upper byte) and lower 4 bits.
The lower 4-bit data is combined with command data such as
channel designation and input as 8-bit data (lower byte).
The lower byte should be written first, and then the upper
byte. Even if only the upper byte is to be changed, rewrite
from the lower byte.
The PWM waveform changes according to the new setting
from the next cycle.
One cycle of PWM waveform (4096 divisions; 12-bit resolu-
4
tion) are divided into 16 (2
consists of 256 (2
f
XIN**).
8
) subsections t. Each subsection
; 8-bit resolution) minimum bits τ (=2/
One subsection t consists of a 8-bit PWM waveform (basic
waveform). The “H” width of this waveform is determined according to the upper 8 bits of PWM data. One cycle has 16
PIN DESCRIPTIONS
Pin
R
CS
WR
SIN
SCLK
OC
PWM1~PWM4
XIN
XOUT
Name
Reset input
Chip select input
Write control input
Serial data input
Write clock input
Output control input
PWM outputs 1 thru 4
Clock input
Clock output
Input/Output
Input
Input
Input
Input
Input
Input
Output
Input
Output
“L”: All 4 channels put in high impedance state.
“L”: Communication with MCU becomes possible. WR, SIN and SCLK put in
enable state.
“L”: Serial data written.
“L”-to-“H” edge: Written data stored in upper or lower byte.
Inputs 8-bit serial data from MCU synchronously with clock pulses.
Inputs sync clock pulses for 8-bit serial data writing.
“H”: All 4 channels put in high-impedance state.
Outputs PWM waveform. (CMOS 3-state output)
Inputs/outputs signals generated by clock signal generation circuit. Oscillation
frequency is determined by connecting ceramic or quartz resonator between
XIN and XOUT. The frequency of internal clock (PWM timing clock) signals is
the 1/2 divider of the frequency input from clock input XIN. When external
clock signals are used, connect clock generator to XIN pin and leave XOUT
open.
subsections t, each of which has this basic waveform. Among
them, those which are designated by the 4-bit-rate multiplier
are conditioned to have a “H” width that is longer by τ. The
lower 4 bits of PWM data are used to specify those subsections (t
m). The waveform of other subsections remains un-
changed.
A PWM waveform (12-bit resolution) is a combination of two
types of waveforms which are different in “H” width, as described above.
When output control input OC is “H”, the output of every
channel turns high-impedance from the next cycle.
When reset input R is “L”, the output of every channel turns
high-impedance as soon as the ongoing cycle is completed,
and PWM data of all channels is reset. If R input is changed
from “L” to “H”, the next cycle starts, however, the output of
the channels remains high-impedance.
To enable output, rewrite input data for each channel.
XIN: Clock XIN repeat frequency
**)f
Functions
2
(1) Upper byte resister
b7 b6 b5 b4 b3 b2 b1 b0
MITSUBISHI 〈DIGITAL ASSP〉
M66242P/FP
4-CH 12-BIT PWM GENERATOR
(2) Lower byte resister
b7 b6 b5 b4 b3 b2 b1 b0
Fig. 1 Upper and Lower Byte Resister Makeup
PWM output “H” width setting bits
(Upper 8 bits: b11 thru b4)
Write data designation bit
0: Lower byte only
1: Both lower and upper bytes
PWM output select bit
00: PWM 1
01: PWM 2
10: PWM 3
11: PWM 4
Output control select bit
0: Output disable
(Bits b7~b4 and b0 are ignored.)
1: Output enable
PWM output “H” width setting bits
(Lower 4 bits: b3 to b0)
Table 1 Mode Selection
PWM data setting
(output enable)
Mode
Lower 4-bit data setting
12-bit data setting
Output disable
b7 b6 b5 b4 1 b2 b1 0
b7 b6 b5 b4 1 b2 b1 1
XX XX0b2b1X
Lower byte data
Table 2 Patterns of Lower 4 Bits and Subsections Whose “H” Width Is Increased
PWM register
b3-b0
0000
0001
0010
0100
1000
1111
Subsections tm whose H width is
increased by τ (m =0 thru 15)
Nothing
m=8
m=4, 12
m=2, 6, 10, 14
m=1, 3, 5, 7, 9, 11, 13, 15
m=1~15 (m≠0)
Number of
Subsections
0
1
2
4
8
15
Input serial data
Upper byte data
––––
b7 b6 b5 b4 b3 b2 b1 b1
––––
3