Mitsubishi M65656FP Datasheet
MITSUBISHI ICs (TV)
M65656FP
SCAN CONVERTER
DESCRIPTION
The M65656FP is an integrated circuit that converts analog VGA
inputs directly into NTSC/PAL TV format outputs.
This circuit integrates a digital NTSC/PAL encoder with 8bit ADC's
and 10bit DAC's.
FEATURES
• VGA picture signal to NTSC / PAL signal conversion
• Input Format, 60Hz, 640×480 (Standard VGA format)
• High performance Non-Flicker Filter
• Built-in Line Memories
Fully integrated with no external memory requirement
• Built-in triple 8bit-A/D converters for RGB
• Built-in triple 10bit-D/A converters for TV signal outputs
• Single +3.3V Power Supply
2
• I
C Bus Control
• 64pin Flat Package
APPLICATION
VGA to Video converter Modules
TV, VCR
Mobile PC
Multi-media Systems (Set-Top-Box)
PIN CONFIGURATION (TOP VIEW)
RIN
49
50
VRT
51
1/2VR
52
VRB
53
AVSS
54
AVDD
55
GIN
56
VRT
1/2VR
VRB
AVSS
AVDD
BIN
VRT
1/2VR
VRB
57
58
59
60
61
62
63
64
M65656FP
Outline 64P6N-A
32
Yout
31
AVDD
30
AVSS
29
VRO
28
VRI
27
IRI1
26
VG1
25
IRI2
24
VG2
23
IRI3
22
VG3
21
AVDD
20
Cout/Uout
19
AVSS
18
DVDD
17
AVDD
RECOMMENDED OPERATING CONDITION
Supply voltage range........................................................3.0 to 3.6V
Rated supply voltage..................................................................3.3V
BLOCK DIAGRAM
line memory
Write Read
VGA Control Block
VD
R
G
B
ADC
ADC
ADC
8
8
8
MATRIX
Y
Y Non-Flicker
LPF
U
C Non-Flicker
V
LPF
HD/VD Gen.
CSYNC Gen.
TIMING
PULSE Gen.
CSYNC
ADDER
BURST
ADDER
NTSC/PAL control Block
Y
SubCarier
U
V
Gen.
Chroma
Encoder
DAC
DAC
DAC
Y
C/U
CVBS/V
HD
VGA CLK Gen. NTSC CLK Gen.
27MHz
I2CBUS
SDA SCL ACK
1
MITSUBISHI ICs (TV)
M65656FP
SCAN CONVERTER
ABSOLUTE MAXIMUM RATINGS (VSS=0V)
Symbol Parameter
VDD3 Supply voltage (3.3V) -0.3 3.6 V
VI Input voltage -0.3
VO Output voltage -0.3 VDD3+0.3 V
IO Output current (∗1)
Pd Power dissipation 500 mW
Topr Operating temperature 0 75 °C
Tstg Storage temperrature -50 125 °C
∗1 : Output current per output terminal. But Pd limits all current.
DC CHARACTERISTICS (VSS=0V)
Symbol Parameter Test conditions
VIL
VIH H VDD=3.6V 2.52 − 3.6 V
VT-
VT+ + 1.4 − 2.4 V
VH Hysteresis 0.3 − 1.2 V
VOL
VOH H 3.25 − − V
IOL
IOH H VDD=3.0V, VOH=2.6V − − -4 mA
IIH
IIL H VDD=3.6V, VI=3.6V -1 − 1 µA
IOZL
IOZH H VDD=3.6V, VO=3.6V -1 − 1 µA
CI Input pin capacitance
CO Output pin capacitance − 7 15 pF
CIO Bidirectional pin capacitance − 7 15 pF
IDD Operating current 3.3V supply − − 200 mA
Input voltage
(CMOS interface)
Input volyage schmitt
trigger
(CMOS interface)
Output voltage
Output current
Input current
Output leakage current
L VDD=2.7V 0 − 0.81 V
-
L
L VDD=3.0V, VOL=0.4V 4 − − mA
L VDD=3.6V, VI=0V -1 − 1 µA
L VDD=3.6V, VO=0V -1 − 1 µA
Limits
Min. Max.
VDD3+0.3
−−IOL=20
IOH=-26
VDD=3.3V
VDD=3.3V, | IO |<1µA
f=1MHz, VDD=0V
Unit
V
mA
Limits
Min. Typ. Max.
0.5 − 1.65 V
− − 0.05 V
− 7 15 pF
Unit
2
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