Mitsubishi M64898GP Datasheet

MITSUBISHI ICs (TV)

M64898GP

PLL FREQUENCY SYNTHESIZER WITH DC-DC CONVERTER FOR PC

DESCRIPTION

The M64898GP is a semiconductor integrated circuit consisting of
PLL frequency synthesizer for TV/VCR /PC.
It contains the prescaler with operating up to1.3GHz,4 band drivers
and DC-DC converter for Tuning voltage.

FEATURES

Built-in DC-DC converter for Tuning voltage

•

4 integrated PNP band drivers

•

(Io=30mA, Vsat=0.2V typ@V

•

Built-in prescaler with input amplifier (max=1.3GHz)

•

PLL lock/unlock status display out put

CC1

to 10V )

(Built-in pull up resistor)

•

X’tal 4MHz is used to realize 3 type of tuning steps
(Divider ratio 1/512, 1/640, 1/1024)

•

Software compatible with M64892/M64893

•

Automatick switching of tuning step according to the
number of data bits (62.5kHz at 18bits , 32.25kHz at 19bits)

•

Built-in Power on reset system

•

Small Package(SSOP)

APPLICATION

PC, TV, VCR tuners

PIN CONFIGURATION (TOP VIEW)

PRESCALER
INPUT

GND
SUPPLY

VOLTAGE 1
SUPPLY
VOLTAGE 2

BAND
SWITCHING
OUTPUTS

DC-DCSUPPLY
VOLTAGE
PEACK CURRENT
DETECT

1

fin

2

GND

3

CC1

V

4

CC2

V

BS4
BS3
BS2
BS1

VDC

lpk

Outline 20P2E-A

20
19
18

M64898GP

17
165

156
147
138
129
1110

Xin
ENA
DATA
CLK
LD/ftest
CONT
Vin
Vtu
+B
SWE

CRYSTAL
OSCILLATOR

ENABLE INPUT
DATA INPUT
CLOCK INPUT

LD/ftest
OUTPUT

REF

f
SWITCHING

FILTER INPUT
TUNING

OUTPUT
SUPPLY

VOLTAGE
SWITCHING

OUTPUT

RECOMMENDED OPERATING CONDITION

Supply voltage range..............................................V

Rated supply voltage...........................................................V

CC1

V

CC2

=4.5 to 5.5V

=V

CC1

V

CC1

CC2

to 10V

=5V

CC1

=V

BLOCK DIAGRAM

Xin

CLK

DATA

ENA

20

1

fin

17

18

19

OSC

AMP

1/32,1/33

CC1 VDC lpk

V

f REF DIVIDER SELECTER

1/8

15bit
PROGRAMMABLE DIVIDER

18/19-bit SHIFT REGISTER

CONTROL

BAIS / BAND SWITCH DRIVER

CNT

LATCH

LATCH

153

SRQ

DIV.

2

109

11

SWE

-

15

4

Power
On Reset

PHASE
DETECTOR

LOCK
DETECTOR

5

CHARGE
PUMP

CP TEST

+

LATCH

Vreg

OS

12

13

14

16

+B

Vtu

Vin

LD/ftest

7654 2

VCC2 BS4 BS3 BS2 BS1

8

GND

1

°

°

PLL FREQUENCY SYNTHESIZER WITH DC-DC CONVERTER FOR PC

DESCRIPTION OF PIN

Pin No. Symbol Pin name Function

1 f in Prescaler input Input for the VCO frequency.
2 GND GND Ground to 0V.
3V
4V

CC1
CC2

5 BS4
6 BS3
7 BS2
8 BS1

9 VDC

10 Ipk
11 SWE Switching output DC-DC converter oscillator output.
12 +B
13 Vtu Tuning output This supplies the tuning voltage.

14

Vin

15 LD/ftest Lock detect /Test port

16 CONT f

17 CLOCK Clock input Data is read into the shift register when the clock signal falls.
18 DATA Data input Input for band SW and programmable freq. divider set up.

19 ENABLE Enable input

20 X in

Power supply voltage 1
Power supply voltage 2

Band switching
outputs

DC-DC power
supply voltage
Peack current
detect

Power supply
voltage

Filter input

(Charge pump output)

Switchi

REF

This is connected to
the crystal oscillator.

Power supply voltage terminal. 5.0V ± 0.5V
Power supply for band switching, Vcc

1

to 10V

PNP open collector method is used.
When the band switching data is "H", the output is ON.
When it is "L", the output is OFF.

DC-DC power supply voltage terminal. 5.0V ± 0.5V
When potential difference with VDC terminal becomes more than 0.33V by current

limiting detector of DC-DC converter, the listing rises with off.

Power supply voltage for turning voltage.

This is the output terminal for the LPF input and charge pump output. When the phase
of the programmable divider output (f 1/N) is ahead compared to the reference

frequency (f

), the "source" current state becomes active.

REF

If it is behind, the "sink" current becomes active.
If the phases are the same, the high impedance state becomes active.
Lock detector output. When loop of phase locked loop locked it, it rises with "H" level

in "L" level or unlock.
In control byte data input, the programmabule freq. divider output and reference freq.

output is selected by the test mode.
Set up reference frequency divider ratio.
In "L" level, set it up in 1/640(19Bit) in setting "opening" in 1/1024(19Bit) or 1/512

(18Bit).

This is normally at a "L". When this is at "H", data and cloc k signals are receiv ed. Data
is read into the latch when the enable signal after the 18th signal of the clock signal
falls or when the 19th pulse of the clock signal falls.

4.0MHz crystal oscillator is connected.

MITSUBISHI ICs (TV)

M64898GP

ABSOLUTE MAXIMUM RATINGS

(Ta=-20 ° C to +75 ° C, unless otherwise noted)

Symbol Parameter Conditions Ratings Unit

CC1

V

CC2

V

I

V

O

V
V

BSOFF

I

BSON

BSON

t
P

d

T

opr

T

stg

Supply voltage 1 Pin3 6.0 V
Supply voltage 2 Pin4 10.8 V
Input voltage Not to exceed Vcc
Output voltage f

REF

output 6.0 V

Voltage applied when
the band output is OFF

1

6.0 V

10.8 V

Band output current per 1 band output circuit 40.0 mA
ON the time when the

band output is ON

40mA per 1 band output circuit
3circuits are pn at same time,

10 sec

Power dissipation Ta=75 ° C 255 mW
Operating temperature -20 to +75
Storage temperature -40 to +125

C
C

2

−

−

−

−

−

MITSUBISHI ICs (TV)

M64898GP

PLL FREQUENCY SYNTHESIZER WITH DC-DC CONVERTER FOR PC

−

−

−

RECOMMENDED OPERATING CONDITIONS

(Ta=-20 ° C to +75 ° C, unless otherwise noted)

Symbol Parameter Conditions Ratings Unit
V
V
f
f

CC1

CC2
opr1
opr2

Supply voltage 1 Pin3 4.5 to 5.5 V
Supply voltage 2 Pin4 V

to 10.0 V

CC1

Operating frequency (1) Crystal oscillation circuit 4.0 V
Operating frequency (2) 80 to 1300 MHz

Normally 1 circuit is on. 2 circuits on at the

I

BDL

Band output current 5 to 8

same time is max. It is prohibited to have

0 to 30 mA

3 or more circuits turned on at the same time.

ELECTRICAL CHARACTERISTICS

(Ta=-20 ° C to +75 ° C, unless otherwise noted, Vcc

Symbol Parameter Test pin Test conditions

V

IH

V

IL1

V

IL2

I

IH

I

IL1

I

IL2

I

IL3

V

OH

V

OL

V

BS

olk1

I
V

toH

V

toL

I

cpo

I

cpLK

I

CC1

I

CC2A

CC2B

I
I

CC2C

Input
terminals

Lock
output

Band
SW

Tuning
output

Charge
pump

Supply current 1 3 V

Supply
current 2

“H” input voltage 17 to 19 3.0
“L” input voltage 15
“L” input voltage 17 to 19
“H” input current 17 to 19 V
“L” input current 15 V
“L” input current 17, 19 V
“L” input current 18 V
“H” output voltage 16 V
“L” output voltage 16 V
Output voltage 5 to 8 V

Leak current 5 to 8

CC1

=5.5V , Vi=4.0V

CC1

=5.5V , Vi=0V

CC1

=5.5V , Vi=0.5V

CC1

=5.5V , Vi=0.5V

CC1

=5.5V 5.0

CC1

=5.5V

CC2

=9V, Io=-30mA 11.6 11.8 - V

V

CC2

=9V, Band SW is OFF

Vo=0V
Output voltage “H” 13 +B=31V 30.5
Output voltage “L” 13 +B=31V
“H” output current 14 V
Leak current 14 V

4 circuits OFF 4 V
1 circuits ON,

Output open

4V

Output current 30mA 4 V

CC1

=5.0V , Vo=2.5V

CC1

=5.0V , Vo=2.5V

CC1

=5.5V

CC2

=9V
=9V

CC2

CC2

=9V, Io=-30mA

1

=5.0V , Vcc

2

=9.0V)

Limits

Min. Typ. Max.

CC1

V

−

−−

−−

−−

+0.3

0.4 V

1.5 V
10 µ A

-50 -80 µ A

-6 -10 µ A

-18 -30 µ A

−−

0.3 0.5 V

−−

-10 µ A

−−

0.2 0.4 V

−±

270 ± 370 µ A

− − ± 50 nA

20 30 mA

−−

0.3 mA

4.0 6.0 mA

34.0 36.0 mA
DC-DC Converter
I

CCdc

Supply current (action) 9 V

CC1=5.5V − 1.3 3.0 mA

Vdo Output voltage 12 VCC1=5.5V 28 31 35 V
fOSC OSC frequency 11 VCC1=5.5V − 571 − kHz
Vipk Current limit detect voltage 10 VCC1=5.5V − 330 − mV

The typical values are at V

CC1

=5.0V , V

CC2

=9.0V , Ta=+25 ° C.

Unit

V

V

V

3