MITSUBISHI M63850P, M63850FP Technical data
PRELIMINARY
Notice: This is not a final specification.
Some param
its are subject to change.
etric lim
MITSUBISHI SEMICONDUCTOR <TRANSISTOR ARRAY>
M63850P/FP
4-UNIT 1.5A DMOS ARRAY WITH CLAMP DIODE
DESCRIPTION
The M63850P/FP is a inverter input power DMOS transistor
array that consists of 4 independent output N-channel
DMOS transistors.
FEATURES
4 circuits of N-channels DMOS
High breakdown voltage (V
High-current driving (I
DS ≥ 80V)
DS(max) = 1.5A)
With clamping diodes
Drain-source on-state low resistance
(R
ON = 0.72Ω, @ = 1.25A)
Wide operating temperature range (Ta = –40 to +85°C)
APPLICATION
Drives of relays and printers, digit drives of indication elements (LEDs and lamps)
PIN CONFIGURATION
1
COM →O4
2
O1←
IN1→
3
4
GND
5
IN2→
6
NC
7
8
O2← COM
Package type
CIRCUIT DIAGRAM
30k
INPUT
4.2k
16
15
14
13
12
11
10
9
16P4(P)
16P2N(FP)
V
DD
←IN4
V
DD
GND
←IN3
→O3
NC : No connection
COM
OUTPUT
FUNCTION
The M63850P/FP is consists of 4 independent N-channel
DMOS transistors. Each DMOS transistor is connected in a
common-source with GND PIN. The clamp diodes for spike
killers are connected between the output pin and the COM
pin of each DMOS transistor. The maximum of Drain current
is 1.5A. The maximum Drain-Source voltage is 80V.
ABSOLUTE MAXIMUM RATINGS (Unless otherwise noted, Ta = –40 ~ +85°C)
DD
V
VDS
IDS
VI
VR
IF
Pd
Topr
Tstg
Supply voltage
Drain-source voltage
Drain current
Input voltage
Clamping diode reverse voltage
Clamping diode forward current
Power dissipation
Operating temperature
Storage temperature
Output, H
Current per circuit output, L
Ta = 25°C, when mounted on board
GND
The four circuits share the COM and GND.
The diode, indicated with the dotted line, is parasitic, and
cannot be used.
Unit : Ω
Ratings
7
–0.5 ~ +80
1.5
–0.5 ~ VDD
80
1.5
1.47(P)/1.00(FP)
–40 ~ +85
–55 ~ +125
UnitSymbol Parameter Conditions
V
V
A
V
V
A
W
°C
°C
Apr. 2005
MITSUBISHI SEMICONDUCTOR <TRANSISTOR ARRAY>
PRELIMINARY
Notice: This is not a final specification.
Some param
RECOMMENDED OPERATING CONDITIONS (Unless otherwise noted, Ta = –40 ~ +85°C)
Symbol
VDD
VDS
DS
I
VIH
VIL
ELECTRICAL CHARACTERISTICS (Unless otherwise noted, Ta = 25°C)
Symbol UnitParameter Test conditions
DD(ON)
I
IDD(OFF)
IO(LEAK)
VON
RON
IIH
IIL
IR
VF
its are subject to change.
etric lim
Parameter
Supply voltage
Drain-source voltage
Drain current
(Current per 1 circuit when 4
circuits are coming on simultaneously)
“H” input voltage
“L” input voltage
On supply current
Off supply current
Output leak current
Output on voltage
on resistance
Output
“H” input current
“L” input current
Clamping diode reverse current
Clamping diode forward voltage
Conditions
VDD = 5V, Duty Cycle
P : no more than 4%
FP : no more than 2%
V
DD = 5V, Duty Cycle
P : no more than 36%
FP : no more than 15%
VDD = 5.5V, VI = 0V, 1 circuit only
DD = 5.5V, VI = 5.5V
V
DD = 5.5V, VI = 5.5V, VDS = 80V
V
I = 4.5V, IDS = 0.7A
V
I = 4.5V, IDS = 1.25A
V
I = 4.5V, IDS = 1.25A
V
DD = 5.5V, VI = 5.5V
V
DD = 5.5V, VI = 0V
V
R = 80V
V
F = 1.25A
I
4-UNIT 1.5A DMOS ARRAY WITH CLAMP DIODE
M63850P/FP
Limits
min typ max
4.5
V
CC-1.0
min typ max
—
—
—
—
—
—
—
—
—
—
5.0
—
0
0
—
0
—
—
—
0
Limits
130
—
—
0.45
0.9
0.72
—
–130
—
1.3
5.5
80
1.25
0.7
CC
V
VCC-3.0
300
10
10
0.72
1.44
1.15
10
–300
10
2.0
Unit
V
V
A
V
V
µA
µA
µA
V
Ω
µA
µA
µA
V
SWITCHING CHARACTERISTICS (Unless otherwise noted, Ta = 25°C)
Symbol UnitParameter Test conditions
t
on
toff
Note 1 : TEST CIRCUIT
Turn-on time
Turn-off time
INPUT VDD
Measured
device
PG
50Ω
(1)Pulse generator (PG) characteristics : PRR = 1kHz,
tw = 10µs, tr = 6ns, tf = 6ns, Zo = 50Ω, V
(2)Input-output conditions : R
(3)Electrostatic capacity C
at connections and input capacitance at probes.
OPEN
L = 8.3Ω, Vo = 10V, VDD = 4.5V
L includes floating capacitance
CL = 15pF (Note 1)
V
O
RL
OUTPUT
L
C
IH = 5V
TIMING DIAGRAM
min typ max
—
—
INPUT
50% 50%
OUTPUT
50% 50%
t
on
Limits
45
125
—
—
t
off
ns
ns
Apr. 2005
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