MITSUBISHI <CONTROL / DRIVER IC>
M54992P/FP
Bi-CMOS 24-BIT SERIAL-INPUT LATCHED DRIVER
DESCRIPTION
The M54992 is a semiconductor integrated circuit consisting of 24
stages of CMOS shift registers and latches with serial inputs and
serial or parallel outputs. It is based on Bi-CMOS process
technology, and has 24 bipolar drivers at the parallel outputs.
FEATURES
● Serial input and serial or parallel output
● Serial output enables cascade connection
● Built-in latch for each stage
● Enable input provides output control
● Low supply current (standby current ICC≤1mA)
● Serial I/O level is compatible with typical CMOS devices
● Driver features: High withstand voltage (BVCEO≥30V)
Capable of large drive currents (IO(max)=100mA)
● Wide operating temperrature range Ta=-10 – +75°C
APPLICATION
Dot drivers of thermal printer heads, serial/parallel conversion.
Drivers for relays and solenoids.
FUNCTION
The M54992 consists of 24 stages of D-type flip flops connected to
24 latches.
Data is input to serial input S-IN, and clock pulses are input to
clock input T. When the clock changes from low to high, the input
data enters the first shift register and data already in the shift
registers is shifted sequentially.
The serial output S-OUT is used to connect multiple M54992 to
expand the number of parallel outputs. S-OUT is connected to S-IN
of the next stage.
For parallel output. When the clock pulse changes from low to
high, latch input (LATCH) is high and output enable input (EN) is
low the serial input data at S-IN appears at output O1 and the other
data already present is shifted sequentially to outputs O2 through
O24.
The parallel outputs are inverted.
When the latch input is held low, the latch retains the stored data.
When the EN input is high, outputs O1 through O24 all turn off. As
the internal logic is unstable when the power is turned on, the EN
input should be kept high (setting outputs O1 through O24 off) until
input data is set and the internal logic is initialized.
L-GND is the GND of CMOS logic circuit and P-GND is the GND of
output driver circuits O1 through O24 which employ bipolar
transistors capable of large drive currents.
An output load prevention circuit is built in this IC to prevent
misoperation at power ON/OFF. Therefore, when V CC falls short of
the fixed level, all outputs (O1 – O24) are compulsorily set to the
OFF state.
PIN CONFIGURATION (TOP VIEW)
M54992P
M54992FP
36
35
34
33
325
316
30
29
289
27
2611
2512
24
23
21
20
19
36
35
34
33
325
31
30
29
289
27
2611
2512
24
23
22
21
20
19
GND
O
O8
NC
O
O10
O11
O12
EN
VCC
O13
O14
O15
O16
NC
O17
O18
GND
CC
V
O13
O14
O15
O16
O17
O18
O
O20
O21
O22
O23
O24
SO
LATCH
Parallel outputs
Serial input
Clock
Latch input
Parallel outputs
Parallel outputs
Enable input
Parallel outputs
Parallel outputs
Serial input
Clock
1
GND
O6
2
3
O5
4
O4
O3
O2
7
O1
S-IN
8
T
LATCH
10
24
O
O23
O22
13
14
O21
15 22
NC
O20
16
O19
17
GND
18
Outline 36P4E
1
EN
2
12
O
3
O11
4
O10
O9
O8
6
7
O7
8
GND
10
6
O
O5
O4
13
14
O3
O2
15
O1
16
S-IN
17
T
18
Outline 36P2R-A
7
Parallel outputs
9
Parallel outputs
Enable input
Parallel outputs
Parallel outputs
Parallel outputs
GND
19
Parallel outputs
Serial input
Latch input
NC: no connection
MITSUBISHI <CONTROL / DRIVER IC>
M54992P/FP
Bi-CMOS 24-BIT SERIAL-INPUT LATCHED DRIVER
BLOCK DIAGRAM
O1 O2 O3 O4 O5
EN
Enable input
LATCH
Latch input
S-IN Serial input
Q
L DQL DQL D
Parallel outputs
O6
–
O12O
13
–
O19O20O21O22O23O
24
––
Q
Q
L D
QTD
QTDQ
DQ
T
DQ
T
Q
L D
L D
DQ
T
Q
L DQL DQL DQL DQL D
DQ
T
DQ
T
DQ
T
DQ
T
D
T
VCC Power supply
Output misoperation
prevention circuit
GND
(M54992FP)
S-OUT Serial output
T Clock
TRUTH TABLE
S-IN
L
L
H
H
H
T
IN
IN
IN
IN
IN
Input Output
LATCH
L
H
L
H
H
EN
L
L
L
L
H
O
1–O24
t-1
t-1
H
T: IN means to input following signal
1
22324
: low level
L
: high level
H
t-1 : previous state
H output
L output
: OFF state
: ON state
S-OUT
L
L
L
H
H
L
H
INPUT/OUTPUT CIRCUIT DIAGRAM
MITSUBISHI <CONTROL / DRIVER IC>
M54992P/FP
Bi-CMOS 24-BIT SERIAL-INPUT LATCHED DRIVER
1 Inputs with pullup resistor
(EN, LATCH)
RIN
3 Serial output (M54992FP)
(S-OUT)
VCC
VCC
GND
2 Inputs with pulldown resistor
(T, S-IN)
RIN
4 Parallel outputs
(O
1 – O24)
V
CC
VCC
GND
GND
GND