Mitsubishi M37736EHBGS Datasheet

MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.

DESCRIPTION

The M37736EHBXXXGP is a single-chip microcomputer using the 7700 Family core. This single-chip microcomputer has a CPU and a bus interface unit. The CPU is a 16-bit parallel processor that can be an 8-bit parallel processor, and the bus interface unit enhances the memory access efficiency to execute instructions fast. This microcomputer also includes a 32 kHz oscillation circuit, in addition to the PROM, RAM, multiple-function timers, serial I/O, A-D converter, and others. In the M37736EHBXXXGP, as the multiplex method of the external bus, either of 2 types can be selected. The M37736EHBXXXGP has the same function as the M37736MHBXXXGP except that the built-in ROM is PROM. (Refer to the basic function blocks description.) For program development, the M37736EHBGS with erasable ROM that is housed in a windowed ceramic LCC is also provided.

FEATURES

Number of basic instructions .................................................. 103
Memory size PROM .............................................124 Kbytes
RAM................................................ 3968 bytes
Instruction execution time
The fastest instruction at 25 MHz frequency ...................... 160 ns
M37736EHBGS
PROM VERSION OF M37736MHBXXXGP
Single power supply ...................................................... 5 V ± 10%
Low power dissipation (at 25 MHz frequency)
............................................47.5 mW (Typ.)
Interrupts ............................................................ 19 types, 7 levels
Multiple-function 16-bit timer ................................................. 5 + 3
Serial I/O (UART or clock synchronous) ..................................... 3
10-bit A-D converter ............................................ 8-channel inputs
Programmable input/output, output
(ports P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10)..........................84
Clock generating circuit ........................................ 2 circuits built-in

APPLICATION

Control devices for general commercial equipment such as office automation, office equipment, and others. Control devices for general industrial equipment such as communication equipment, and others. Note. Do not use the windowed EPROM version for mass production,
because it is a tool for program development (for evaluation).

PIN CONFIGURATION (TOP VIEW)

2
2
2
1
2
D
D
D
X
X
X
/R
/T
/CTS
/CLK
/T
2
7
0
1
3
P9
P9
P8
P9
P9
8079787776
/CLK1 ↔
/CLK0 ↔
V
CC CC
V
REF
AV
SS
V
SS CIN
COUT
TRG
4
/AN4 ↔
3
/AN3 ↔
2
/AN2 ↔
1
/AN1 ↔
0
/AN0 ↔
81 82 83 84
85 86 87 88 89 90 91 92 93
94
95
96 97 98 99 100
123456789
IN
SUB
/f
/TB1
6
IN
P6
/TB2
7
P6
IN
/TB0
5
P6
2
/INT
4
P6
1
/INT
3
P6
P86/RXD1 ↔ P8
4
/CTS1/RTS1 ↔
P8
P8
P8
2/RXD0
/CLKS0 ↔
P8
0
P8
/CTS0/RTS0/CLKS1 ↔
AV
P7
7
/AN7/X
P7
6
/AN6/X
P7
5
/AN5/AD
P7 P7 P7 P7 P7
5
3/TXD0
1
4
P9
P95→ P96→ P97↔ P0
7574737271
0
IN
IN
OUT
/INT
2
/TA4
/TA3
1
7
/TA4
P6
0
P5
P6
P6
0
0
1
2
3
4
/CS
/CS
/CS
/CS
/CS
0
/A
0
/RSMP
1
2
3
4
5
/A
/A
/A
/A
/A
1
2
3
4
5
P0
P0
P0
P0
P0
70696867666564636261605958575655545352
16
/A
6
/A
6
P0
17
/A
7
/A
7
P0
8
/D
8
/A
0
P1
9
/D
9
/A
1
P1
10
/D
10
/A
2
P1
11
/D
11
/A
3
P1
12
/D
12
/A
4
P1
13
/D
13
/A
5
P1
14
/D
14
/A
6
P1
15
/D
15
/A
7
P1
/D
0
/A
16
/A
0
P2
M37736EHBXXXGP
10
OUT
/TA3
6
P5
11
IN
/TA2
5
P5
1213141516
IN
IN
OUT
OUT
/TA1
/TA0
3
1
/TA2
/TA1
4
2
P5
P5
P5
P5
OUT
/TA0
0
P5
171819
3
2
/KI
/KI
7
6
P10
P10
2021222324
1
0
3
/KI
/KI
5
4
P10
P10
P10
2
P10
1
P10
0
P10
25
7
P4
26
6
P4
1
2
/D
/D
1
2
/A
/A
17
18
/A
/A
1
2
P2
P2
272829
5
4
P4
P4
3
4
/D
/D
3
4
/A
/A
19
20
/A
/A
3
4
P2
P2
51
P25/A21/A5/D
50
P26/A22/A6/D
49
P27/A23/A7/D
48
P30/R/W/WEL
47
P3
46
P3
45
P3
44
EVL0
43 42
EVL1 V
41 40
V
39
E/RDE
38
X X
37
RESET
36
BSEL
35
CNV
34 33
BYTE
32
P4
31
P4
30
3
f1
/
2
P4
P4
5 6 7
1
/BHE/WEH
2
/ALE
3
/HLDA
CC SS
OUT IN
SS
0
/HOLD
1
/RDY
Outline 100P6S-A
1
Clock input
X
IN
Clock output
X
OUT
Clock Generating Circuit
Timer TA4(16)
RAM
3968 bytes
PROM
124 Kbytes
Timer TA3(16)
Timer TA2(16)
Timer TA1(16)
P8(8)
Input/Output
port P8
P7(8)
Input/Output
port P7
X
CIN
X
COUT
P6(8)
Input/Output
port P6
P5(8)
Input/Output
port P5
P4(8)
Input/Output
port P4
P3(4)
Input/Output
port P3
P2(8)
Input/Output
port P2
P1(8)
Input/Output
port P1
P0(8)
Input/Output
port P0
Timer TA0(16)
Watchdog Timer
Timer TB2(16)
Timer TB1(16)
Timer TB0(16)
UART2(9)
UART1(9)
UART0(9) A-D Converter(10)
Instruction Register(8)
Data Buffer DBH(8)
Data Buffer DB
L
(8)
Processor Status Register PS(11)
Direct Page Register DPR(16)
Stack Pointer S(16)
Index Register Y(16)
Index Register X(16)
Accumulator B(16)
Arithmetic Logic
Unit(16)
Accumulator A(16)
Instruction Queue Buffer Q0(8)
Instruction Queue Buffer Q
1
(8)
Incrementer(24)
Program Address Register PA(24)
Data Address Register DA(24)
Instruction Queue Buffer Q
2
(8)
Program Counter PC(16)
Incrementer/Decrementer(24)
Program Bank Register PG(8)
Data Bank Register DT((8)
Input Buffer Register IB(16)
Address Bus
Data Bus(Even)
Data Bus(Odd)
X
CINXCOUT
Enable output
E
Reset input
RESET
(0V)
V
SS
(0V)
AV
SS
CNV
SS
AV
CC
Reference
voltage input
V
REF
Bus method
selection input
BSEL
External data bus width
selection input
BYTE
V
CC

P9(8)
Output
port P9

P10(8)
Input/Output
port P10
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
PROM VERSION OF M37736MHBXXXGP
M37736EHBGS
2

M37736EHBXXXGP BLOCK DIAGRAM

MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
M67736EHBGS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.

FUNCTIONS OF M37736EHBXXXGP

Number of basic instructions 103 Instruction execution time 160 ns (the fastest instruction at external clock 25 MHz frequency)
Memory size
Input/Output ports Output port P9 8-bit 1
Multi-function timers Serial I/O (UART or clock synchronous serial I/O) 3
A-D converter 10-bit 1 (8 channels) Watchdog timer 12-bit 1
Interrupts
Clock generating circuit Supply voltage 5 V ± 10%
Power dissipation 47.5 mW (at external clock 25 MHz frequency) Input/Output characteristic
Memory expansion
Operating temperature range –20 to 85 °C Device structure CMOS high-performance silicon gate process
Package
Parameter Functions
PROM 124 Kbytes RAM 3968 bytes P0 – P2, P4 – P8, P10 8-bit 9 P3 4-bit ✕ 1
TA0, TA1, TA2, TA3, TA4 16-bit 5 TB0, TB1, TB2 16-bit 3
3 external types, 16 internal types Each interrupt can be set to the priority level (0 – 7.) 2 circuits built-in (externally connected to a ceramic resonator or a
quartz-crystal oscillator)
Input/Output voltage 5 V Output current 5 mA
M37736EHBXXXGP M37736EHBGS
External bus mode A; maximum 16 Mbytes, External bus mode B; maximum 1 Mbytes
100-pin plastic molded QFP (100P6S-A) 100-pin ceramic LCC (with a window) (100D0)
PROM VERSION OF M37736MHBXXXGP
3
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.

PIN DESCRIPTION

Pin Name Input/Output Functions Vcc, Power source Apply 5 V ± 10% to Vcc and 0 V to Vss. Vss CNVss CNVss input Input This pin controls the processor mode. Connect to Vss for the single-chip mode and the memory
_____
RESET Reset input Input When “L” level is applied to this pin, the microcomputer enters the reset state.
XIN Clock input Input X
OUT Clock output Output
_
E Enable output Output This pin functions as the enable signal output pin which indicates the access status in the internal
BYTE
External data
Input In the memory expansion mode or the microprocessor mode, this pin determines whether the bus width selection input
BSEL Input In the memory expansion mode or the microprocessor mode, this pin determines the external bus
Bus method select input
AVcc, Analog power Power source input pin for the A-D converter. Externally connect AVcc to Vcc and AVss to Vss. AVss source input
REF Reference Input This is reference voltage input pin for the A-D converter.
V
voltage input
0 – P07 I/O port P0 I/O In the single-chip mode, port P0 becomes an 8-bit I/O port. An I/O direction register is available so
P0
0 – P17 I/O port P1 I/O In the single-chip mode, these pins have the same functions as port P0. When the BYTE pin is set
P1
0 – P27 I/O port P2 I/O In the single-chip mode, these pins have the same functions as port P0. In the memory expansion
P2
0 – P33 I/O port P3 I/O In the single-chip mode, these pins have the same function as port P0. In the memory expansion
P3
0 – P47 I/O port P4 I/O In the single-chip mode, these pins have the same functions as port P0. In the memory expansion
P4
0 – P57 I/O port P5 I/O In addition to having the same functions as port P0 in the single-chip mode, these pins also
P5
0 – P67 I/O port P6 I/O In addition to having the same functions as port P0 in the single-chip mode, these pins also
P6
0 – P77 I/O port P7 I/O In addition to having the same functions as port P0 in the single-chip mode, these pins function as
P7
0 – P87 I/O port P8 I/O In addition to having the same functions as port P0 in the single-chip mode, these pins also
P8
0 – P97
P9 P100 – P107 EVL0, EVL1
Output port P9
Output Port P9 is an 8-bit I/O port. These ports are floating when reset. When writting to the port latch,
I/O port P10 I/O In addition to having the same functions as port P0 in the single-chip mode, P104 – P107 also
––
Output These pins should be left open.
expansion mode, and to Vcc for the microprocessor mode.
These are pins of main-clock generating circuit. Connect a ceramic resonator or a quartz­crystal oscillator between X
IN and XOUT. When an external clock is used, the clock source should
be connected to the XIN pin, and the XOUT pin should be left open. bus. In the external bus mode B and the memory expansion mode or the microprocessor mode,
this pin output signal RDE.
___
external data bus has an 8-bit width or a 16-bit width. The data bus has a 16-bit width when “L” signal is input and an 8-bit width when “H” signal is input.
mode. The bus mode becomes the external bus mode A when “H” signal is input, and the external bus mode B when “L” signal is input.
that each pin can be programmed for input or output. These ports are in the input mode when reset.
In the memory expansion mode or the microprocessor mode, these pins output address (A at the external bus mode A, and these pins output signals CS0CS4 and RSMP, and addresses (A16, A17) at the external bus mode B.
to “L” in the memory expansion mode or the microprocessor mode and external data bus has a 16-bit width, high-order data (D8 – D15) is input/output or an address (A8 – A15) is output. When the BYTE pin is “H” and an external data bus has an 8-bit width, only address (A8 – A15) is output.
mode or the microprocessor mode, low-order data (D output. When using the external bus mode A, the address is A bus mode B, the address is A0 – A7.
___ ____
mode or the microprocessor mode, R/W, BHE, ALE, and HLDA signals are output at the external bus mode A, and WEL, WEH, ALE, and HLDA signals are output at the external bus mode B.
___ ___ ____
__
mode or the microprocessor mode, P40, P41 and P42 become HOLD and RDY input pins, and a
φ1 output pin, respectively. Functions of the other pins are the same as in the single-chip
clock mode. However, in the memory expansion mode, P42 can be selected as an I/O port.
function as I/O pins for timers A0 to A3. function as I/O pins for timer A4, input pins for external interrupt input (INT0INT2) and input pins
for timers B0 to B2. P67 also functions as sub-clock φSUB output pin. input pins for A-D converter. Additionally, P7
and the input pin (X
CIN) of the sub-clock (32 kHz) oscillation circuit, respectively. When P76 and
P77 are used as the XCOUT and XCIN pins, connect a resonator or an oscillator between the both. function as I/O pins for UART 0 and UART 1. these ports become the output mode. P90 – P93 also function as I/O port for UART 2. function as input pins for key input interrupt input (KI0KI3).
PROM VERSION OF M37736MHBXXXGP
0 – D7) is input/output or an address is
6 and P77 have the function as the output pin (XCOUT)
__ __
M37736EHBGS
___ ___
16 – A23. When using the external
____ ___
____
___ ___
0 – A7)
4
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
M67736EHBGS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.

BASIC FUNCTION BLOCKS

The M37736EHBXXXGP has the same function as the M37736MHB XXXGP except that the built-in ROM is PROM. Refer to the section on the M37736MHBXXXGP.

PIN DESCRIPTION (EPROM MODE)

Pin VCC, VSS CNVSS BYTE
_____
RESET
XIN XOUT
_
E
AVCC, AVSS VREF P00 – P07 P10 – P17 P20 – P27 P30 P31 – P33 P40 – P47 P50 – P57
P60 – P67 P70 – P77 P80 – P87 P90 – P97
P100 – P107 BSEL EVL0, EVL1
Power supply V VPP input Reset input Clock input Clock output Enable output Analog supply input Reference voltage input Address input (A0 – A7) Address input (A8 – A15) Data I/O (D0 – D7) Address input (A16) Input port P3 Input port P4 Control signal input
Input port P6 Input port P7 Input port P8 Input port P9 Input port P10
PP input
Name
_____ _____
Input/Output
Input Input Input
Input Output Output
Input
Input
Input
I/O Input Input Input Input
Input Input
Input Input Input Input
Output
Supply 5V±10% to VCC and 0V to VSS. Connect to VPP when programming or verifing. Connect to VPP when programming or verifing. Connect to VSS. Connect a ceramic resonator between XIN and XOUT.
Keep open. Connect AVCC to VCC and AVSS to VSS. Connect to VSS. Port P0 functions as the lower 8 bits address input (A0 – A7). Port P1 functions as the higher 8 bits address input (A8 – A15). Port P2 functions as the 8 bits data input/output (D0 – D7). P30 functions as the most significant bit address input (A16). Connect to VSS. Connect to VSS. P50, P51, and P52 function as PGM, OE, and CE input pins respectively.
Connect P5 Connect to VSS. Connect to VSS. Connect to VSS. Connect to V Connect to V Connect to V Keep open.
3, P54, P55, and P56 to VCC. Connect P57 to VSS.
SS. SS. CC.
PROM VERSION OF M37736MHBXXXGP
Functions
_____ ___ ___
5
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
PROM VERSION OF M37736MHBXXXGP
M37736EHBGS

EPROM MODE

The M37736EHBXXXGP features an EPROM mode in addition to its normal modes. When the RESET signal level is “L”, the chip automatically enters the EPROM mode. Table 1 list the correspondence between pins and Figure 1 shows the pin connections in the EPROM mode. The EPROM mode is the 1M mode for the EPROM that is equivalent to the M5M27C101K. When in the EPROM mode, ports P0, P1, P2, P3 CNV
SS, and BYTE are used for the EPROM (equivalent to the
M5M27C101K). When in this mode, the built-in PROM can be programmed or read from using these pins in the same way as with the M5M27C101K.
V
CC
_____
6
P8
5
P8
4
P8 P83
2
P8
1
P8
0
P8
CC
V
CC
AV
REF
V
AVSS
SS
V
7
P7
6
P7
5
P7
4
P7
3
P7
2
P7
1
P7 P7
0
7
P8
80
81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
1
7
P6
0, P50, P51, P52,
2
1
0
P9
79
2345678
6
P6
78
P9
5
P6
P9
77
4
P6
3
P9
76
3
P6
4
P9
75
2
P6
5
P9
74
1
P6
0
4
3
2
1
0
7
6
P0
P0
P0
P0
P0
P9
P9
73
72
67
68
69
70
71
M37736EHBGP
9
101112131415161718192021222324252526282930
0
7
P6
P5
6
5
4
3
2
P5
P5
P5
P5
P5
This chip does not have Device Identifier Mode, so that set the corresponding program algorithm. The program area should specify address 01000
16 – 1FFFF16.
Connect the clock which is either ceramic resonator or external clock to X
IN pin and XOUT pin.
Table 1 Pin function in EPROM mode
D
5
D
6
D
7
A
16
 
V
PP
M5M27C101K
5
P0
66
1
P5
65
6
P0
0
P5
Address input
10
A9A8A7A6A5A4A3A2A1A
2
1
0
7
P1
P1
P1
P0
61
62
63
64
7
6
5
4
P10
P10
P10
P10
VCC VPP VSS
Data I/O
___
CE
___
OE
_____
PGM
14
A
6
5
4
3
P1
P1
P1
P1
57
58
59
60
3
2
1
0
P10
P10
P10
P10
M37736EHBXXXGP
CNVSS, BYTE
Ports P0, P1, P30
0
0
P2
55
6
P4
1
P2
54
5
P4
D4D3D2D1D
4
2
P23↔ P2
52
51
53
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
P2
4
3
2
P4
P4
P4
A15A13A12A11A
7
P1
56
7
P4
VCC
VSS
Port P2
P52 P51 P50
P2
5
P2
6
P2
7
P3
0
P3
1
P3
2 3
P3EVL0EVL1
V
CC
V
SS
EX
OUT IN
XRESETBSEL CNVBYTEP4
0
P4
1
SS
VCC VPP VSS
A0 – A16
D0 – D7
___
CE
___
OE
_____
PGM
V
SS
Fig. 1 Pin connection in EPROM mode
6
GM
CE
OE
P
Outline 100P6S-A
: Connect to ceramic oscillation circuit.
: It is used in the EPROM mode.
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
M67736EHBGS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
PROM VERSION OF M37736MHBXXXGP
FUNCTION IN EPROM MODE 1M mode (equivalent to the M5M27C101K)
Reading
To read the EPROM, set the CE and OE pins to a “L” level. Input the address of the data (A to the I/O pins D
__ __
the CE or OE pins are in the “H” state.
0 – D7. The data I/O pins will be floating when either
___ ___
0 – A16) to be read, and the data will be output
Programming
Programming must be performed in 8 bits by a byte program. To program to the EPROM, set the CE pin to a “L” level and the OE pin to a “H” level. The CPU will enter the programming mode when 12.5 V is applied to the V with pins A – D7. Set the PGM pin to a “L” level to being programming.
PP pin. The address to be programmed to is selected
0 – A16, and the data to be programmed is input to pins D0
_____
___ ___
Erasing
To erase data on this chip, use an ultraviolet light source with a 2537 Angstrom wave length. The minimum radiation power necessary for erasing is 15 J/cm
2
.
Programming operation
To program the M37733EHBXXXFP, first set VCC = 6 V, VPP = 12.5 V, and set the address to 01000 pulse, check that the data can be read, and if it cannot be read OK, repeat the procedure, applying a 0.2 ms programming pulse and checking that the data can be read until it can be read OK. Record the accumulated number of pulse applied (X) before the data can be read OK, and then write the data again, applying a further once this number of pulses (0.2 ✕ X ms). When this series of programming operations is complete, increment the address, and continue to repeat the procedure above until the last address has been reached. Finally, when all addresses have been programmed, read with V V
PP = 5 V (or VCC = VPP = 5.5 V).
Table 2. I/O signal in each mode
___CE___OE_____
Pin
Mode Read-out Output Disable Programming Programming Verify Program Disable
VIL
VIL VIH VIL
VIL VIH
Note 1 : An X indicates either V
16. Apply a 0.2 ms programming
PGM VPP VCC Data I/O
VIL
X
5 V
5 V
VIH
X
5 V
5 V
X
X
5 V
5 V
VIH
VIL
12.5 V
6 V
VIL
VIH
12.5 V
6 V
VIH
VIH
12.5 V
6 V
IL or VIH.
CC =
Output Floating Floating
Input
Output Floating
Programming operation (equivalent to the M5M27C101K)
AC ELECTRICAL CHARACTERISTICS (Ta = 25 ± 5 °C, VCC = 6 V ± 0.25 V, VPP = 12.5 ± 0.3 V, unless otherwise noted)
Symbol Parameter Test conditions
tAS tOES tDS tAH tDH tDFP tVCS tVPS tPW tOPW tCES tOE
Address setup time
___
OE setup time
Data setup time Address hold time Data hold time Output enable to output float delay VCC setup time VPP setup time
_____
PGM pulse width
_____
PGM over program pulse width
___
CE setup time
Data valid from OE
__
Min.
0.19
0.19
Limits
Typ. 2 2 2 0 2 0 2 2
0.2
2
Max.
130
0.21
5.25
150
Unit
µs µs µs µs µs ns µs
µs ms ms
µs
ns
7
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
AC waveforms
V
ADDRESS
DATA
PP
V
VCC
CE
PGM
OE
VIL
VIH/VOH
VIL/VOL
VPP
VCC
VCC +1
V
VIH
VIL
VIH
VIL
VIH
VIL
IH
CC
tAS
tVPS
tVCS
tCES
PROGRAM VERIFY
DATA SET
DATA OUTPUT VALID
tDH tDS
tOES tOE
tPW
tOPW
PROM VERSION OF M37736MHBXXXGP
M37736EHBGS
tAH
tDFP
Programming algorithm flow chart
INCREMENT ADDR
START
ADDR=FIRST LOCATION
V
CC
PP
=12.5 V
V
X=0
PROGRAM ONE PULSE OF 0.2 ms
X=X+1
X=25?
NO
FAIL
NO
VERIFY
BYTE
PROGRAM PULSE OF
0.2X ms DURATION
LAST ADDR?
V
CC=VPP
VERIFY
ALL BYTE
DEVICE PASSED
Test conditions for A.C. characteristics
Input voltage : V
IL = 0.45 V, VIH = 2.4 V
Input rise and fall times (10 % – 90 %) : 20 ns Reference voltage at timing measurement : Input, Output “L” = 0.8 V, “H” = 2 V
=6.0 V
YES
PASS
=*5.0 V
PASS
YES
FAIL
VERIFY
BYTE
DEVICE FAILED
PASS
FAIL
DEVICE
FAILED
*4.5 V VCC = VPP 5.5 V
8
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
M37736EHBGS
PROM VERSION OF M37736MHBXXXGP

SAFETY INSTRUCTIONS

(1)Sunlight and fluorescent lamp contain light that can erase written
information. When using in read mode, be sure to cover the transparent glass portion with a seal or other materials (ceramic package product).
(2)Mitsubishi Electric corp. provides the seal for covering the
transparent glass. Take care that the seal does not touch the read pins (ceramic package product).
(3)Clean the transparent glass before erasing. Fingers’ fat and paste
disturb the passage of ultraviolet rays and may affect badly the erasure capability (ceramic package product).
(4) A high voltage is used for programming. Take care that over-
voltage is not applied. Take care especially at power on.
(5) The programmable M37736EHBGP that is shipped in blank is
also provided. For the M37736EHBGP, Mitsubishi Electric corp. does not perform PROM programming test and screening following the assembly processes. To improve reliability after programming, performing programming and test according to the flow below before use is recommended.
Programming with PROM programmer
Screening
(Leave at 150 °C for 40 hours)
(Caution)

ADDRESSING MODES

The M37736EHBXXXGP has 28 powerful addressing modes. Refer to the “7700 Family Software Manual” for the details.

MACHINE INSTRUCTION LIST

The M37736EHBXXXGP has 103 machine instructions. Refer to the “7700 Family Software Manual” for the details.

DATA REQUIRED FOR PROM ORDERING

Please send the following data for writing to PROM. (1) M37736EHBXXXGP writing to PROM order confirmation form (2) 100P6S mark specification form (3) ROM data (EPROM 3 sets)
Verify test with PROM programmer
Function check in target device
Caution : Never expose to 150 °C exceeding 100 hours.
9
MITSUBISHI MICROCOMPUTERS
M37736EHBXXXGP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Conditions Ratings Unit Vcc Power source voltage –0.3 to +7 V AVcc Analog power source voltage –0.3 to +7 V VI
Input voltage RESET, CNVss, BYTE –0.3 to +12(Note) V Input voltage P0
VI
Output voltage
VO
Pd Power dissipation Ta = 25 °C 300 mW Topr Operating temperature –20 to +85 °C
stg Storage temperature –40 to +150 °C
T
Note. When the EPROM is programmed, input voltage of pins CNVss and BYTE is 13 V respectively.
_____
0 – P07, P10 – P17, P20 – P27, 0 – P33, P40 – P47, P50 – P57,
P3
0 – P67, P70 – P77, P80 – P87,
P6
0 – P92, P100 – P107,
P9 VREF, XIN, BSEL P00 – P07, P10 – P17, P20 – P27,
0 – P33, P40 – P47, P50 – P57,
P3
0 – P67, P70 – P77, P80 – P87,
P6 P90 – P97, P100 – P107, XOUT, E
_
PROM VERSION OF M37736MHBXXXGP
M37736EHBGS
–0.3 to Vcc + 0.3 V
–0.3 to Vcc + 0.3 V

RECOMMENDED OPERATING CONDITIONS (Vcc = 5 V ± 10%, Ta = –20 to +85 °C, unless otherwise noted)

Symbol Parameter
IN) : Operating 4.5 5.0 5.5
Vcc Power source voltage
f(X f(XIN) : Stopped, f(XCIN) = 32.768 kHz 2.7 5.5
Min. Typ. Max.
AVcc Analog power source voltage Vcc V Vss Power source voltage 0V AVss Analog power source voltage 0 V
High-level input voltage P0
IH
V
P70 – P77, P80 – P87, P90 – P92, P100 – P107, XIN, RESET,
0 – P07, P30 – P33, P40 – P47, P50 – P57, P60 – P67,
_____
0.8 Vcc
CNVss, BYTE, BSEL, XCIN (Note 3)
VIH VIH
VIL
High-level input voltage P10 – P17, P20 – P27 (in single-chip mode) High-level input voltage P1
0 – P17, P20 – P27
(in memory expansion mode and microprocessor mode)
Low-level input voltage P0
0 – P07, P30 – P33, P40 – P47, P50 – P57, P60 – P67,
P70 – P77, P80 – P87, P90 – P92, P100 – P107, XIN, RESET,
_____
0.8 Vcc
0.5 Vcc
0
CNVss, BYTE, BSEL, XCIN (Note 3)
VIL VIL
IOH(peak)
Low-level input voltage P10 – P17, P20 – P27 (in single-chip mode) Low-level input voltage P1
0 – P17, P20 – P27
(in memory expansion mode and microprocessor mode)
High-level peak output current P0
0 – P07, P10 – P17, P20 – P27, P30 – P33, 0 – P47, P50 – P57, P60 – P67, P70 – P77,
P4
0 0
P80 – P87, P90 – P97, P100 – P107
High-level average output current P00 – P07, P10 – P17, P20 – P27, P30 – P33,
IOH(avg)
P4
0 – P47, P50 – P57, P60 – P67, P70 – P77,
P80 – P87, P90 – P97, P100 – P107
Low-level peak output current P00 – P07, P10 – P17, P20 – P27, P30 – P33,
IOL(peak)
0 – P43, P54 – P57, P60 – P67, P70 – P77,
P4 P80 – P87, P90 – P97, P104 – P107
IOL(peak)
Low-level peak output current P44 – P47, P100 – P103 Low-level average output current P00 – P07, P10 – P17, P20 – P27, P30 – P33,
IOL(avg)
0 – P43, P54 – P57, P60 – P67, P70 – P77,
P4
P80 – P87, P90 – P97, P104 – P107 IOL(avg) Low-level average output current P44 – P47, P100 – P103 15 mA f(XIN) Main-clock oscillation frequency (Note 4) 25 MHz f(X
CIN) Sub-clock oscillation frequency 32.768 50 kHz
Notes 1. Average output current is the average value of a 100 ms interval.
2. The sum of I
the sum of I the sum of I the sum of I
3. Limits V
4. The maximum value of f(X
OL(peak) for ports P0, P1, P2, P3, P8, and P9 must be 80 mA or less, OH(peak) for ports P0, P1, P2, P3, P8, and P9 must be 80 mA or less, OL(peak) for ports P4, P5, P6, P7, and P10 must be 100 mA or less, and OH(peak) for ports P4, P5, P6, P7, and P10 must be 80 mA or less.
IH and VIL for XCIN are applied when the sub clock external input selection bit = “1”.
IN) = 12.5 MHz when the main clock division selection bit = “1”.
Limits
Vcc Vcc
Vcc
0.2Vcc
0.2Vcc
0.16Vcc
–10
–5
10
20
5
Unit
V
V V
V
V
V V
mA
mA
mA
mA
mA
10
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