Mitsubishi Electric Hurricane HU430 User Manual

User Guide
HU430 (Hurricane) NLX Motherboard
124575UG Revision 2
13-3-98
This document is the exclusive property of Mitsubishi Electric PC Division. It shall not be copied nor it's contents communicated or reproduced in any form and for any purpose without specific authority in writing from Mitsubishi Electric PC Division.
HU430 NLX Motherboard User Guide 124575UG Revision 2
Mitsubishi Electric PC Division Page 2 of 21
Contents
1 OVERVIEW...................................................................................................................................3
1.1 M
OTHERBOARD FEATURES
...........................................................................................................3
1.2 C
ONFIGURATION OPTIONS
............................................................................................................4
1.2.1 Build-time............................................................................................................................4
1.2.2 User Configurable...............................................................................................................4
1.3 B
LOCK DIAGRAM
.........................................................................................................................5
2 ELECTRONICS.............................................................................................................................6
2.1 P
ROCESSOR
..................................................................................................................................6
2.2 C
ORE LOGIC
.................................................................................................................................6
2.3 L
EVEL
2 C
ACHE
............................................................................................................................7
2.4 M
EMORY
......................................................................................................................................7
2.4.1 Main Memory......................................................................................................................7
2.4.2 BIOS....................................................................................................................................7
2.5 V
IDEO
...........................................................................................................................................7
2.6 A
UDIO
..........................................................................................................................................8
2.7 S
TANDARD
I/O .............................................................................................................................8
2.7.1 Keyboard and Mouse..........................................................................................................9
2.7.2 Floppy Disk Interface..........................................................................................................9
2.7.3 Serial Ports .........................................................................................................................9
2.7.4 Parallel Port .......................................................................................................................9
2.8 A
DDITIONAL
I/O...........................................................................................................................9
2.8.1 IDE Disk Controller............................................................................................................9
2.8.2 Universal Serial Bus (USB) ..............................................................................................10
2.8.3 System Management Bus (SMBus)....................................................................................10
2.9 M
OTHERBOARD POWER
..............................................................................................................10
2.9.1 Regulators.........................................................................................................................10
2.9.2 Battery...............................................................................................................................10
2.10 P
OWER MANAGEMENT
...........................................................................................................11
2.10.1 Global Power States.....................................................................................................11
2.10.2 Power-on Control.........................................................................................................11
2.11 E
XPANSION SLOTS
.................................................................................................................11
2.11.1 Industry Standard Architecture (ISA)...........................................................................11
2.11.2 Peripheral Component Interconnect (PCI) ..................................................................12
2.12 B
US RESOURCE UTILISATION
.................................................................................................12
2.12.1 ISA DMA Channels.......................................................................................................12
2.12.2 ISA Interrupts ...............................................................................................................12
2.12.3 PCI Interrupts...............................................................................................................13
2.12.4 PCI Device Selection....................................................................................................13
2.12.5 PCI Arbitration.............................................................................................................13
3 ELECTRICAL, MECHANICAL, THERMAL.........................................................................13
3.1 P
OWER REQUIREMENTS
..............................................................................................................13
3.2 PCB............................................................................................................................................13
3.3 T
HERMAL
...................................................................................................................................14
APPENDIX A. JUMPERS AND SWITCHES....................................................................................15
APPENDIX B. CONNECTOR ASSIGNMENTS ..............................................................................17
HU430 NLX Motherboard User Guide 124575UG Revision 2
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1 Overview
The HU430 motherboard is an NLX form factor socket 7 design, with a local bus speed of 60 or 66MHz. The design is based around the Intel 430TX chipset. The board was designed to be compliant with the NLX specification 1.2 and must be used with an NLX riser that also conforms to this specification.
1.1 Motherboard Features
Form factor NLX, 9.0" wide x 10.0" long Processors Socket 7 - P54C, P55C, K6, 60/66MHz bus speed Power regulation
Adjustable processor core voltage regulator 2.1V to 3.6V, optional
3V3 regulator for 4 o/p PSUs Core logic Intel 430TX with PIIX4E ISA bridge Cache 256KB or 512KB on-board L2 Memory – RAM 2 DIMMs for 64-bit unbuffered SDRAM (or EDO) Memory - Flash ROM 2Mb: BIOS/Setup, USB, DMI, 120FD Buses 3 bus master PCI slots and ISA VGA ATI VT3 (VT-B) part standard, 3D-RAGE II+ compatible, 1MB
40ns EDO upgradeable to 2MB Audio – controller Business audio only, Crystal CS4236B Audio – features MIDI/joystick header Audio – output Mono internal speaker, ‘PHONES OUT, MIC IN jacks on
motherboard rear panel Hard Disk & CD-ROM Dual ATA33 (UltraDMA/33) Floppy Disk Standard 3.5”, 5.25” & tape drives. Support for 120MB via IDE Parallel Port IEEE 1284 (ECP & standard) Serial Ports 2x 16550s: 9-way ‘D’ COM1, COM2 USB Dual USB connector; optionally one channel can be routed to the
NLX riser Keyboard & Mouse Dual-stacked PS/2 style keyboard/mouse connectors Security BIOS branding IR I/O IR routed to NLX riser, but not IRDA control signals Power Management Uses SMM. IRQ wake-up. Magic Packet & PCI PME# supported Cooling NLX fan signal and CPU fan switched by GPIO port in standby,
CPU fansink connector on motheboard System Management DMI instrumentation chip LM78 as optional fit Plug & Play PC97 compliant Battery back-up On-board lithium coin cell with 5 years life PCB 9.0" wide by 10.0" long, all top-side components
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1.2 Configuration Options
1.2.1 Build-time
L2 cache can be 256KB or 512KB (using 32Kx32 or 64Kx32 parts)
L2 cache can be PBSRAM or MDRAM technology
Flash BIOS ROM can be 2Mb or 4Mb TSOP40
Video controller can be VT3 (VT-B) or 3D-RAGE II+
Video memory (EDO) can be 2MB (4 pieces) soldered down or 1MB (2 pieces) soldered + 2 upgrade sockets
LM78 instrumentation amp populated or de-populated
Audio populated or de-populated
1.2.2 User Configurable
Processor support set by jumpers
Flash BIOS boot block can be unprotected by a jumper (optional fit)
Re-programming of Flash BIOS ROM can be disabled by a jumper (optional fit)
Recovery code can be forced to run by a jumper (optional fit)
Main jumper block - processor bus speed, core multiplier, processor core voltage, enable/disable video, enable/disable audio
1.3 Block Diagram
IO_DDS (15:0)
IO_DDP (15:0)
SUPER IO
SMC FD37C67X
IC16
PCI - ISA BRIDGE (+RTC)
PIIX4E
IC23
SYSTEM CONTROLLER
430TX MTXC
IC9
C
O
N
T
R
O
L
P_A(31:3)
K_TA(7:0)
CPU
SOCKET 7
IC13
P_D(63:0)
NLX RISER CONNECTOR
AUDIO SYSTEM CONTR.
CS4236B
IC28
SERIAL PORT1
PL3
SERIAL PORT2
PL7
FLOPPY DRIVES
(NLX RISER)
PARALLEL PORT
PL3
EEPROM
24C16
IC22
ISA BUS
I/O CONNECTORS
DUAL USB
PL15
KEYBOARD
PL9
MOUSE
PL9
CONTR.
CONTR.
CONN.
PRIMARY IDE
(NLX RISER)
CONN.
SECONDARY IDE
(NLX RISER)
SYSTEM MONITOR
LM78
IC24
LM4880, IC25
CD IN
PL24 (OR NLX)
HEADPHONE
PL17
INT.SPEAKER
(NLX RISER)
XBUS_XD (7:0)
ISA
_SA
(19:0)
LM358, IC27
MICROPHONE
PL20
IO_LID#, fan_speed, power_lines
FLASH BIOS
2Mb IC15
ISA
_
SD
(15:0)
BUFFER
VIDEO RAM 0,1,2,3
DRAM_256K16
IC26,29,32,34
VIDEO DISPLAY CONTR.
ATI 264VT3
IC10
MEM BANK 0,1 SDRAM DIMM
MM1,MM2
PCI BUS
MEM_MA (11:0) MEM_CAS# (7:0) MEM_RAS# (3:0)
MEM_D (63:0)
V
ID
_M
D
(63:0)
V
ID
_M
A
(9:0)
C
O
N
T
R
O
L
TAG
SRAM 32K X 8
IC5
CACHE 0,1
64K X 32
IC7, 11
RGB,SYNC.
VID_PIXEL (7:0)
CONTR.
CONN.
VGA
PL3
CONN.
VFC/AMC
PL12
SYSTEM CLOCKS
ICS9147-03
IC4
2 Electronics
2.1 Processor
Processor support is for a dual voltage-plane socket 7, for the P54C, P55C and K6. Processor bus speeds allowed are 60 or 66MHz, and all core multipliers can be set from the main jumper block PL10. Depending on the processor fitted, the processor bus speed, core multiplier, and core voltage will have to be correctly set.
2.2 Core Logic
This is the Intel 430TX Pentium PCI chipset which comprises the MTXC North Bridge and the PIIX4E South Bridge, both in BGA packages:
Board Build Part Step Top Marking
Rev A to D MTXC A1 FW82439TX Q536ES (sample)
FW82439TX Q537ES (sample)
FW82439TX SL238 (prodn.) Rev D MTXC A2 FW82439TX SL28T (prodn.) Rev A to D PIIX4 B0 FW82371AB Q534ES (sample)
FW82371AB Q535ES (sample)
FW82371AB SL23P (prodn.)
MTXC North Bridge features
64-bit processor host interface, Pentium family at 60MHz and 66MHz
64-bit DRAM controller, 4MB to 256MB main memory, EDO or SDRAM
L2 cache controller, 256KB or 512KB direct-mapped write-back, caches first 64MB main
memory, PBSRAM or DRAM cache
Synchronous 30MHz/33MHz 32-bit PCI 2.1 bus controller
Data path and buffers, three sets of data buffers
Power management features
PIIX4E South Bridge features
PCI 2.1 interface at 30 & 33MHz
ISA bus controller
Extensive power management features including ACPI compliance
IDE controller, two ports four drives, PIO mode 4 and Ultra 33 synchronous DMA mode
Enhanced DMA controllers, with distributed DMA support
Interrupt controllers, with serial interrupt support
System timers
Dual USB 1.0 port controller, 1.5/12 Mbps
SMBus interface
MC146818A compatible real-time clock with 256 bytes of RAM
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Mitsubishi Electric PC Division Page 7 of 21
2.3 Level 2 Cache
L2 cache controller is a direct-mapped write-back design. Only the first 64MB of main memory can be cached. It supports standard PBSRAM (15ns cycle time, 8ns clock to output) or DRAM-based cache
HU430 supports a 256KB cache size (with 2 pcs of 32K x 32) or a 512KB cache size (with 2 pcs of 64K x 32). Optional fit resistors set the appropriate register configuration bits in the MTXC at power-on. The cache size and type is a build option.
2.4 Memory
2.4.1 Main Memory
There are two DIMM sockets on board. Each socket is 64-bits wide and can accept EDO or SDRAM modules. These must be unbuffered types and parity/ECC is not supported. 4Mb, 16Mb and 64Mb EDO DRAM types and 16Mb and 64Mb SDRAM types are supported. Maximum memory per DIMM is 128MB with a maximum motherboard capacity of 256MB.
When populating memory DIMMs, either socket MM1 or MM2 may be used. In a single­DIMM system it will be easier to fit it into MM1 as another DIMM may be added to MM2 in the future without having to unplug the module in MM1.
2.4.2 BIOS
There is a single TSOP-40 geometry on the motherboard for the Flash EPROM. This is suitable for 1Mb, 2Mb or 4Mb parts with 5V or 12V programming voltages.
An optional enable/disable jumper, when placed in the disable position, blocks write cycles to the Flash. This means that commands and data cannot be written to the device. The boards will normally be shipped with the jumper absent, and the Flash set in the 'program enable' position.
The optional 'force recover' jumper sets a bit in a GPI port in the PIIX4 and is read by the BIOS. This is used to force a recovery situation such that data is read from the recovery disk in the floppy disk drive. Normally, this jumper is not fitted as a recovery situation is auto­detected by the BIOS.
The optional 'unlock boot jumper' enables the boot block to be temporarily unlocked for re­programming.
HU430 has been designed so that the TSOP part can be programmed during ICT.
2.5 Video
Video controller support:
ATI VT-B (“VT3”) for standard builds
ATI 3D-Rage II+, optional build
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