MITEL SP8400 Datasheet

Very Low Phase Noise Synthesiser Divider
The SP8400 is a very low phase noise programmable divider which is based on a divide by 8/9 dual modulus prescaler and a 12 stage control counter. This gives a minimum division ratio of 56 (64 for fractional - N synthesis applications), and a maximum division ratio of 4103. Special circuit techniques have been used to reduce the phase noise considerably below that produced by standard dividers.The data inputs are CMOS or TTL compatible.
The SP8400 is packaged in a 28 pin plastic SO package.
FEATURES
Very low Phase Noise (Typically -156dBc/Hz at 1kHz
offset)
Supply Voltage 5V
ABSOLUTE MAXIMUM RATINGS
Supply Voltage 6.5V
Output Current 20mA
Storage Temperature Range -55°C to +125°C
Maximum Clock Input Voltage 2.5V p-p
M2 M1 M0
+5V
V
CC
GND
INPUT
CLOCK CLOCK INPUT CLOCK INPUT
INPUT
CLOCK
GND
V
+5V
CC
+5V
V
CC
GND
A0
Fig.1 Pin connections - top view
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15
28 27 26 25 24 23 22 21 20 19 18 17 16
SP8400
DS3739 - 2.1 April 1994
M3 M4 M5 M6 M7 M8 N/C OUTPUT OUTPUT N/C V
+5V
CC
N/C A2 A1
MP28
ORDERING INFORMATION
SP8400 KG MPES(Commercial Grade)
0 –10 –20 –30 –40 –50 –60 –70 –80 –90
–100
(f) (dBc/Hz) –3dB
–110 –120 –130 –140 –150 –160 –170
10 100 1k 10k 100k
Frequency (Hz)
Fig.2 Typical single sideband phase noise measured at 300MHz
SP8400
ELECTRICAL CHARACTERISTICS
Guaranteed over: Supply voltage VCC = +4.75V to +5.25V Temperature T Tested at +4.75V and +5.25V at T
= +25°C
amb
= -10°C to +75°C
amb
Characteristic
Supply current Output voltage swing
Input sensitivity 200MHz to 1.5GHz
Data Inputs
Logic high voltage Low low voltage Input current
600
500
400
300
mV rms
in
V
200
100
Pin
4, 11, 12, 18
20, 21
7, 8
Value
Min. Typ. Max.
137
122 320
152
410
140 (-4)
2.2
0.8
180
OPERATING WINDOW
Units
mA mV
mV
dBm
V V
µA
Conditions
Output loaded with 300R See Fig.4 p-p @ 1.5GHz input ÷ 71 mode See Fig.4 RMS Sine wave into 50 Ohms (dBm equivalent) See Fig.3
5V Data input voltage
355mV
140mV
0 200 400 600 800 1000 1200 1400
FREQUENCY MHz
1600
Fig.3 Typical input sensitivity
2
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