MITEL SL1710 Datasheet

SL1710
Quadrature Downconverter
Preliminary Information
Supersedes October 1996 version in Media IC Handbook HB4599-1.0 DS3842 - 4.1 March 1997
The SL1710 is a quadrature downconverter, intended for use with both Professional and Consumer Digital Satellite Applications.
The device contains high linearity, low noise amplifiers, quadrature mixers, plus an on-chip oscillator, operating between 350MHz and 500MHz, which may be synthesised via the differential prescaler outputs.
An AGC with 18dB gain control is provided to cope with a wide range of input signal levels.
AGC IOUT
VEEA
IFINB
IFIN VCCA QOUT
VEEC
1
16
SL1710
VCCB VCODIS
VCO B VCO A
VEEB PSCAL PSCALB VCCC
MP16
FEATURES
Wide input frequency range (350-500MHz)
On chip oscillator with varactor tuning or SAW
resonator operation capability
Nominal 40dB conversion gain from IF input to I and Q outputs
AGC amplifier with 18dB gain control range
I to Q phase match 90°C to ± 2°, gain match
better than 1dB
Low impedance I and Q single ended outputs, with 15MHz ± 1dB BW
Divide by 32 prescaler outputs
Suitable for QPSK and up to 64QAM systems
AGC
IFIN IFINB
Fig. 1 Pin allocation top view
ORDERING INFORMATION
SL1710/KG/MPAS SL1710/KG/MPAD (Tape and Reel)
ABSOLUTE MAXIMUM RATINGS
Storage temperature -55°C to +150°C Junction temperature -29°C to +150°C Supply voltage -0.3 to 7.0V Voltage at any other pin -0.3 to +7.0V
APPLICATIONS
Consumer digital satellite decoders
Professional digital satellite decoders
Communication systems
AGC
I OUT
VCODIS
VCOA VCOB
LO
0 deg 90 deg
Quadrature generator
Fig.2. SL1710 block diagram
AGC
÷32
Q OUT
PSCAL PSCALB
SL1710
ELECTRICAL CHARACTERISTICS
T
= 0oC to +80oC, Vee= 0V, Vcc = 4.75 to 5.25 V, Fif = 479.5 MHz, IF bandwidth ± 15 MHz, output amplitude -11dBV
amb
These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature
and supply voltage unless otherwise stated.
Value
Characteristic Pin Min Typ Max Units Conditions
Supply voltage 6,9,16 4.75 5.25 V Supply current 6,9,16 94 110 mA
RF Input
RF freq range 4, 5 350 500 MHz Impedance 4, 5 75 ohm @ 480MHz. Fig. 4 VSWR 4, 5 1.7 @ 480MHz. Fig. 4 Noise Figure 4, 5 19 dB AGC at maximum gain Noise Figure variation with 4, 5 0.5 1 dB/dB gain
VCO
VCO freq (fo) control range 13, 14 350 500 MHz External tank circuit with varicap Phase noise 13, 14 -85 dBc/Hz @ 10kHz from fo. but measured in
I or Q output. Note
Fo sensitivity to V
CC
13, 14 2 MHz/Volt Fixed external components and no
control loop Fo sensitivity to temperature 13, 14 40 KHz/°C Uncompensation Prescaler output, VOH 10, 11 V
VOL 10, 11 V
-0.96 Volt At 25°C
CC
-1.65 Volt
CC
Prescaler output duty cycle 10, 11 40 60 %Under maximum load conditions
Fig. 5
AGC
Gain, Vagc = +2.5V 40 dB Temp stability of gain 1 ±2 dB For any gain setting 0V to 5V Gain, Vagc = +0.5V 1 44 dB See Fig.6 Gain, Vagc = + V
-0.5V 1 32 dB See Fig.6
CC
AGC range 18 dB I Q outputs 480MHz local oscillator, 481 to
495MHz RF input @ -51dBV
Gain set to give -11dBV,
1-15MHz baseband output into
maximum load. Fig. 7 Output impedance 2, 7 8 ohm Fig. 8 Output clipping level 2, 7 1.5 V p-p I phase lag with respect to Q 2, 7 88 90 92 degs 1 -15MHz IQ crosstalk 20 dB Output amplitude match 2, 7 1 dB I releative to Q, 1 -15MHz Baseband flatness 2, 7 ±1 dB 1-15MHz, 1k 15pF load Two tone 3rd order intercept 2, 7 +3 dBV Referred to output. @ 1MHz point Output load 1kohm, 15pF, all
AGC settings, 0.7V pk-pk output Im3 2, 7 28 dBc LO, and Sputii in IQ outputs 2, 7 -30 dBV 1-100MHz
(1, 2)
2
SL1710
ELECTRICAL CHARACTERISTICS (continued)
T
= 0oC to 80oC, Vee= 0V, Vcc = 4.75 to 5.25 V, These characteristics are guaranteed by either production test or design.
amb
They apply within the specified ambient temperature and supply voltage unless otherwise stated.
Value
Characteristic Pin Min Typ Max Units Conditions
Prescaler sidebands 2, 7 -50 -47 dBV Measured in IQ outputs Power supply rejection 2, 7 25 30 dB Attenuation VCC to IQ outputs,
over 0-500kHz
Notes:
1. The choice of L will have an effect on phase noise of the VCO
2. Target value at fo=500MHz, L (tank)=10nH, Q (tank, unloaded)=50, SSB
DESCRIPTION
The SL1710 is a quadrature downconverter, intended for high linearity, low noise digital satellite applications. It contains all the elements necessary, with the exception of the VCO tuning components, to extract baseband I and Q signals from a QPSK or QAM IF input signal.
A block diagram for the SL1710 is shown in Fig. 2.
In normal consumer digital satellite applications, the device is fed via a SAW filter, centred at the standard IF of 479.5MHz. A filtered single channel is therefore presented to the device, at a typical level of -51dBV. An AGC is included with 18dB of gain control, which is guaranteed to provide an overall conver­sion gain between 30 and 45dB from the RF input to the I and Q outputs.
The quadrature mixers are fed from an on-chip oscillator which is centred on the incoming IF. The oscillator external tuning network should be fully symmetric, to ensure optimum gain and phase match.
Single ended I and Q amplifiers are provided, which output a 760mV (p/p) signal, assuming a nominal -51dBV input signal and 40dB gain, suitable for driving a dual channel ADC such as the PCA 869, PCA 913 and PCA 916 via an anti-alias filter (see application notes). The ADC is normally AC coupled via two capacitors (typically 4.7µF).
The SL1710 also includes divide by 32 prescaler output. These may be fed to an external PLL circuit which can be used to drive the on-chip oscillator, thus forming a complete control loop.
The VCO can be disabled by applying 0V to pin 15.
3
SL1710
CH PUMP
1
XTAL1
2
XTAL2
3
SDA
4
SCL
5
P76P67P5
8
P4
9
P310NC11Vcc12RF I/P13RF I/P14Vee
15
DRV
16
IC2 SP5611
AGC
1
IOUT
2
VEEA
3
IFINB
4
IFIN
5
VCCA
6
QOUT
7
VEEC
8
VCCC
9
PSCALB
10
PSCAL
11
VEEB
12
VCOA
13
VCOB
14
VCODIS
15
VCCB
16
/32
Oscillator
I Mixer
Q Mixer
IC1 SL1710
L1
12nH
C12
3p9
D1
BB811
C13
3p3
1
42
3
LK2
T2
BCW31
5V
R4
110R
SK4
Q CH O/P
C11
220nF
SW1
VCO DISABLE
R2
4K7
5V
SK1
RF IN
C1
100nF
C2
100nF
R1
75R
L5
4u7
L6
4u7
C3
100nF
C4
100pF
C5
100nF
C6
100pF
C7
100nF
C8
100pF
+
C9
47uF
5V
5V
5V 5V
VR1
1K
R5
680R
R6
4K7
R7
680R
T1
BCW31
1
42
3
LK1
R3
110R
SK3
I CH O/P
C10
220nF
C14
10nF
C15
10nF
C19
220nF
C20
47nF
R8
22K
R9
22K
R10
4K7
T3
BCW31
R11
10K
C21
10nF
30V
C18
18pF
X1
4 MHz
C16
10nF
C17
100pF
1
2
3
CN1
DC POWER
30V
5V
SDA5
3
5V04GND5SCL5
6
SK4
I2C
5V
Fig. 3 Demonstration board circuit diagram
4
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