MITEL MT8809AE, MT8809AP, MT8809AC Datasheet
ISO-CMOS
8 x 8 Analog Switch Array
MT8809
Features
• Internal cont rol lat ches and add ress d eco der
• Short setup a nd h old time s
• Wide ope rating v oltag e: 4. 5V to 13.2V
• 12Vpp anal og s ignal capabi lity
•R
• ∆R
65Ω max. @ VDD=12V, 25°C
ON
≤ 10Ω @ VDD=12V, 25° C
ON
• Full CMOS switch for low distortion
• Minimum f eedthr oug h and c ros stal k
• Low power consumption ISO-CMOS technology
• Internal pull-up resistor for RESET
pin
Applications
• Key systems
• PBX systems
• Mobile rad io
• Test equipme nt /inst rum enta tion
• Analo g/ di gita l m ult ip le xers
• Audio/Video switching
ISSUE 2 November 1988
Ordering Information
MT8809AC 28 Pin Ce r am i c D IP
MT8809AE 28 Pin Pla stic D IP
MT8809AP 28 Pin PL C C
-40° to 85°C
Description
The Mitel MT8809 is fabricated in MITEL’s ISOCMOS technology providing low power dissipation
and high reliability. The device contains a 8 x 8 array
of crosspoint switches along with a 6 to 64 line
decoder and latch circuits. Any one of the 64
switches can be addressed by selecting the
appropriate six address bits. The selected switch can
be turned on or off by applying a logical one or
zero to th e D ATA inpu t. Chip Sele ct (CS
crosspoint array to be cascaded for matrix
expansion.
) allows the
AX0
AX1
AX2
AY0
AY1
AY2
STROBE
CS
6 to 64
Decoder
DATA RESET VDD VSS
11
8 x 8
Latches
Switch
Array
6464
• • • • • • • • • • • • • • • • • • •
Yi I/O (i=0-7)
Figure 1 - Functional Block Diagram
• • • • • • • • • • • • • • • •
Xi I/O
(i=0-7)
3-21
3-21
MT8809 ISO-CMOS
CS
X0
X2
X4
X6
Y7
Y6
Y5
Y4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AY2
STROBE
DATA
VSS
RESET
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AY1
AY0
AX2
AX1
AX0
X1
X3
X5
X7
VDD
Y0
Y1
Y2
Y3
VSS
X0
X2
X4
X6
RESET
Y7
5
6
7
8
9
10
11
E
B
A
O
T
A
D
4
2
1
6
Y
CSS
3
3
1
5
Y
1
2
0
2
R
T
2
•
4
1
4
Y
X
Y
Y
Y
A
A
A
A
1
8
7
6
2
2
2
AX1
25
AX0
24
X1
23
22
X3
21
X5
20
X7
19
5
7
6
1
1
1
1
3
2
Y
Y
Y
VDD
8
1
0
Y
28 PIN CERDIP/PLASTIC DIP
28 PIN PLCC
Figure 2 - Pin Connections
Pin Description
Pin # Name Description
1AY2AY2 Address Line (Input).
2 STROBE
3CS
4DATADATA (Input): a logic high input will turn on the selected switch and a logic low will turn off
5V
6-9 X0, X2,
X4, X6
STROBE (Input): enables function selected by address and data. Address must be stable
before STROBE
goes low and DATA must be stab le on the rising edge of STROBE .
Active Low.
Chip Select (Inpu t ): this is used to select the device. Active Low.
the selected switch. Active High.
Ground Reference.
SS
X0, X2, X4 and X6 Analog (Inputs/Outputs): these are connected to the X0, X2, X4 and
X6 rows of the switch array.
10 RESET
Master RESET (Input): this is use d to turn off all switches regardless of the condition of
CS
. A 100kΩ internal pull-up resistor is also provided. This can be used in conjunction
with a 0.1µF capacitor (connected to the RESET
pin) to perform power-on reset of the
device. Active Low.
11-18 Y7 - Y0 Y7 - Y0 Analog (Inputs/Outputs): these are connected to the Y0 - Y7 columns of the
switch array.
19 V
20-23 X7, X5,
X3, X1
Positive Power Sup pl y.
DD
X7, X5, X3 and X1 Analog (Inputs/Outputs): these are connected to the X7, X5, X3 and
X1 rows of the switch array.
24-26 AX0-AX2 AX0 - AX2 Address Lines (Inputs).
27, 28 AY0, AY1 AY0 and AY1 Address Lines (Inputs).
3-22
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