ISO-CMOS
MT093
8 x 12 Analog Switch Array
Features
• Internal cont rol lat ches and add ress d eco der
• Short set-up and hold times
• Wide ope rating v oltag e: 4. 5V to 14.5V
• 3.5Vpp an alog sign al capability
•R
• ∆R
65Ω max. @ VDD=14V, 25°C
ON
≤ 10Ω @ VDD=14V, 25°C
ON
• Full CMOS switch for low distortion
• Minimum f eedthr oug h and c ros stal k
• Low power consumption ISO-CMOS technology
Applications
• PBX systems
• Mobile rad io
• Test equipment /instru men tatio n
• Analo g/ di gita l m ult ip le xers
• Audio/Video switching
ISSUE 1 January 1990
Ordering Information
MT093AC 40 Pin Ceramic DIP
MT093AE 40 Pin Plastic DIP
MT093AP 44 Pin PLCC
0° to 70°C
Description
The Mitel MT093 is fabricated in MITEL’s ISO-CMOS
technology providing low power dissipation and high
reliability. The device contains a 8×12 array of
crosspoint switches along with a 7 to 96 line decoder
and latch circuits. Any one of the 96 switches can be
addressed by selecting the appropriate seven input
bits. The selected switch can be turned on or off by
applying a logical one or zero to the DATA input.
AX0
AX1
AX2
AX3
AY0
AY1
AY2
STROBE DATA RESET VDD VSS
11
8 x 12
7 to 96
Decoder
Latches
Switch
Array
9696
• • • • • • • • • • • • • • • • • • •
Yi I/O (i=0-7)
Figure 1 - Functional Block Diagram
• • • • • • • • • • • • • • • •
Xi I/O
(i=0-11)
3-65
MT093 ISO-CMOS
1
Y3
AY2
RESET
AX3
AX0
X10
X11
STROBE
VSS
2
3
4
5
6
NC
7
NC
8
X6
9
X7
10
X8
11
X9
12
13
14
NC
15
Y7
16
NC
17
Y6
18
19
Y5
20
40 PIN CERDIP/PLASTIC DIP 44 PIN PLCC
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VDD
Y2
DATA
Y1
NC
Y0
NC
X0
X1
X2
X3
X4
X5
NC
NC
AY1
AY0
AX2
AX1
Y4
NC
NC
X6
XY
X8
X9
X10
X11
NC
NC
NC
DATA
Y2
VDD
Y3
AY2
RESET
AX3
AX0
NC
65432 44434241
7
8
9
10
11
12
13
14
15
16
17
Y7
Y6
1
23181920 2122 2425262728
Y5
VSS
STROBE
Y4
AX1
AX2
AY0
Y1
40
39
38
37
36
35
34
33
32
31
30
29
AY1
Y0
NC
NC
X0
X1
X2
X3
X4
X5
NC
NC
NC
NC
Figure 2 - Pin Connections
Pin Description
Pin #* Name Description
1Y3Y3 Analog (Input/Output): this is connected to the Y3 column of the switch array.
2AY2Y2 Add ress Lin e (Inp ut).
3 RESET Master RESET (Input): this is used to turn off all switches. Active High.
4,5 AX3,AX0 X3 and X0 Address Lines (Inputs).
6,7 NC No Connection.
8-13 X6-X11 X6-X11 Analog (Inputs/Outputs): these are connected to the X6-X11 rows of the switch
array.
14 NC No Connection.
15 Y7 Y7 Analog (Input/Output): this is connected to the Y7 column of the switch array.
16 NC No Connection.
17 Y6 Y6 Analog (Input/Output): this is connected to the Y6 column of the switch array.
18 STROB E STROBE (Input): enables function selected by address and data. Address must be stable
before STRO BE goes high and DATA must be stable on the falling edge of the STROBE .
Active High.
19 Y5 Y5 Analog (Input/Output): this is connected to the Y5 column of the switch array.
20 V
21 Y4 Y4 Analog (Input/Output): this is connected to the Y4 column of the switch array.
22, 23 AX1,AX2 X1 and X2 Address Lines (Inputs).
24, 25 AY0,AY1 Y0 and Y1 Address Lines (Inputs).
26, 27 NC No Connection.
28 - 33 X5-X0 X5-X0 Analog (Inputs/ Ou tputs): these are connected to the X5-X0 rows of the switch
34 NC No Connection.
35 Y0 Y0 Analog (Input/Ou tpu t): this is connected to the Y0 column of the switch array.
36 NC No Connection.
37 Y1 Y1 Analog (Input/Ou tpu t): this is connected to the Y1 column of the switch array.
38 DATA DATA (Input): a logic high input will turn on the selected switch and a logic low will turn off
39 Y2 Y2 Analog (Input/Ou tpu t): this is connected to the Y2 column of the switch array.
40 V
* Plastic DIP and CERDIP only.
Ground Reference.
SS
array.
the selected switch. Active High.
Positive Pow er Supp ly.
DD
3-66