miscellaneous mitac 8066mp Service Manual

SERVICE MANUAL FOR

8066MP

8066MP8066MP

8066MP

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8066MP

8066MP8066MP

BY: Ally Yuan

Repair Technology Research Department /EDVD

Mar.2005

Contents

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1. Hardware Engineering Specification……………………………………………………………………….

1.1 Introduction ………………………………………………………………………………………………………………..

1.2 System Overview …………………………………………………………………………………………………………..

1.3 System Hardware Parts …………………………………………………………………………………………………...

1.4 Other Functions ……………………………………………………………………………………………………………

1.5 Power Management ………………………………………………………………………………………………………..

1.6 Appendix 1: Intel ICH6-M GPIO Definitions ……………………………………………………………………………

1.7 Appendix 2: W83L950D KBC Pin Definitions …………………………………………………………………………..

1.8 Appendix 3: 8066MP Product Specifications ……………………………………………………………………………

2. System View and Disassembly ……………………………………………………………………………...

2.1 System View ………………………………………………………………………………………………………………..

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2.2 System Disassembly ………………………………………………………………………………………………………..

3. Definition & Location of Connectors / Switches …………………………………………………………..

3.1 Mother Board (Side A) ……………………………………………………………………………………………………

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3.2 Mother Board (Side B) ……………………………………………………………………………………………………

3.3 Daughter Board…………………………………………………………………………………………………………….

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4. Definition & Location of Major Components ……………………………………………………………..

4.1 Mother Board (Side A) ……………………………………………………………………………………………………

4.2 Mother Board (Side B) ……………………………………………………………………………………………………

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5. Pin Description of Major Component …….……………………………………………………………….

5.1 Intel 915GM North Bridge ……………………………………………………………………………………………….

5.2 Intel ICH6-M South Bridge ………………………………………………………………………………………………

6. System Block Diagram ………………………………………………………………………………………

7. Maintenance Diagnostics ……………………………………………………………………………………

7.1 Introduction ………………………………………………………………………………………………………………..

7.2 Maintenance Diagnostics…………………………………………………………………………………………………..

7.3 Error Codes ………………………………………………………………………………………………………………..

8. Trouble Shooting …………………………………………………………………………………………….

8.1 No Power ……………………………………………………………………………………………………………………

8.2 No Display ………………………………………………………………………………………………………………….

8.3 VGA Controller Failure LCD No Display ………………………………………………………………………………..

8.4 External Monitor No Display ……………………………………………………………………………………………..

8.5 Memory Test Error ………………………………………………………………………………………………………..

8.6 Keyboard (K/B) Touch-Pad (T/P) Test Error ……………………………………………………………………………

8.7 Hard Driver Test Error ……………………………………………………………………………………………………

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8.8 CD-ROM Driver Test Error ………………………………………………………………………………………………

8.9 USB Port Test Error ……………………………………………………………………………………………………….

8.10 Audio Failure ……………………………………………………………………………………………………………..

8.11 LAN Test Error …………………………………………………………………………………………………………..

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8.12 PC Card Socket Failure …………………………………………………………………………………………………

9. Spare Parts List ……………………………………………………………………………… ……………...

10. System Exploded Views …………………………………………………………………………………….

11. Circuit Diagram …………………………………………………………………………………………….

12. Reference Material …………………………………………………………………………………………

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1. Hardware Engineering Specification

1.1 Introduction

The MiTAC 8066MP model is designed for Intel Mobile Pentium-M Processor and Celeron-M Processor,Dothan 400 and 533 FSB.

This system is based on PCI architecture and is fully compatible with IBM PC/AT specification, which has standard hardware peripheral interface. The power management complies with Advanced Configuration and Power Interface. It also provides easy configuration through CMOS setup, which is built in system BIOS software and can be pop-up by pressing F2 key at system start up or warm reset. System also provides icon LEDs to display system status, such as Wireless LAN indicator, AC/Battery Power indicator, Battery status indicator, CD-ROM, HDD, NUM LOCK, CAP LOCK, SCROLL LOCK. It also equipped with GIGA LAN, 56K Fax MODEM, 3 USB port, S-Video, line in, SPIDIF, and internal/external microphone function.

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The memory subsystem supports DDR2 SDRAM channels (64-bits wide).

The 915GM MCH Host Memory Controller integrates a high performance host interface for Intel Dothan processor, a high performance PCI Express interface, a high performance memory controller, Digital Video port (DVOB & DVOC) interface, and Direct Media Interface (DMI) connecting with Intel ICH6-M.

The Intel ICH6-M integrates three Universal Serial Bus 2.0 Host Controllers Interface (UHCI), the Audio Controller with Azalia interface, the Ethernet includes a 32-bit PCI controller, the IDE Master/Slave controllers, the SATA controller and Direct Media Interface technology.

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Intel Graphics enhancements includes DVMT 3.0, Zone Rendering 2.0, Quad pixel pipe rendering engine, Pixel Shader 2.0 and 4x Faster Setup Engine.

The Realtek RTL8110SBL is a highly integrated, cost-effective single-chip Fast Ethernet controller that provides 32-bit performance, PCI bus master capability, and full compliance with IEEE 802.3u 100Base-T specifications and IEEE 802.3x Full Duplex Flow Control. It also supports the Advanced Configuration Power management Interface (ACPI).

The Texas Instruments PCI4510 device is compliant with PC I Local Bus Specification. Function 0 provides the independent PC Card socket controller compliant with the latest PC Card Standards. Function 1 of the PCI4510 device is an integrated IEEE 1394a-2000 open host controller interface (OHCI)PHY/link-layer controller (LLC) device that is fully compliant with the PCI Local Bus Specification, the PCI Bus Power Management Interface Specification, IEEE Std 1394-1995, IEEE Std 1394a-2000, and the 1394 Open Host Controller Interface

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Specification.

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The ALC655 is a 16-bit, full duplex AC97 2.3 compatible six channels audio CODEC designed for PC multimedia systems, including host/soft audio and AMR/CNR based designs. The ALC655 incorporates proprietary converter technology to meet performance requirements on PC99/2001 systems.

The W83L950D is a high performance microcontroller on-chip supporting functions optimized for embedded

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control. These include ROM, RAM, four types of timers, a serial communication interface, optional I²C bus interface, host interface, A/D converter, D/A converter, I/O ports, and other functions needed in control system configurations, so that compact, high performance systems can be implemented easily.

A full set of software drivers and utilities are available to allow advanced operating systems such as Windows ME,

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Windows 2000 and Windows XP to take full advantage of the hardware capabilities. Features such as bus mastering IDE, Plug and Play, Advanced Power Management (APM) with application restart, software-controlled power shutdown.

Following chapters will have more detail description for each individual sub-systems and functions.

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1.2 System Overview

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CPU

Core logic System BIOS Memory

HDD ODD

Display

Clock Generator TV LAN PCMCIA + IEEE1394 Audio System

Modem

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Intel: Pentium M 735 Dothan 1.7GHz, 400FSB Intel: Pentium M 770 Dothan 2.13GHz, 533FSB

Thermal spec 27W TDP Intel 915GM + ICH6-M chipset W39V040FAP DDR2 RAM: MT8HTF3264HDY-53EB3 (256Mx2) Nanya 533,256MB,NT256T64UH4A0FM-37B Fujitsu:MHT2060AT+ , 60GB KME: UJ-831BMT-A DVD Dual KME: UJDA760 DVD Combo 15”: Hydis,HT15X34-110 AU: B150XG01 ICS 954226

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Intel 915GM RTL8110SBL TI PCI4510

AC’97 CODEC: ALC655 Power Amplifier: TI TPA0212 Askey 1456VQL4A(INT)

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1.3 System Hardware Parts

1.3.1 Intel Dothan Processors in Micro-FCBGA package

Intel Dothan Processors with 479 pins Micro-FCBGA package.

It will be manufactured on Intel’s advanced 90 nanometer process technology with copper interconnect. It’s features include Intel Architecture with Dynamic Execution, On-die primary 32-kB instruction cache and 32-kB write-back data cache, on-die 2-MB second level cache with advanced Transfer Cache Architecture, Data Prefetch Logic, Streaming SIMD Extensions 2 (SSE2), 533-MHz FSB.

The Streaming SIMD Extensions 2 (SSE2) enable break-through levels of performance in multimedia applications including 3-D graphics, video decoding/encoding, and speech recognition.

Use Source-Synchronous Transfer (SST) of address and data to improve performance by transferring data four times per bus clock.

Support Enhanced Intel SpeedStep technology, which enables real-time dynamic switching of the voltage and frequency between two performance modes.

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1.3.2 Clock Generator

System frequency synthesizer: ICS954226 is a CK410M Compliant clock synthesizer. It provides a single-chip

solution for mobile systems built with Intel P4-M processors and Intel mobile chipsets. It is driven with a

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14.318MHz crystal and generates CPU outputs up to 400MHz. It provides the tight ppm accuracy required by Serial ATA and PCI-Express.

• Supports tight ppm accuracy clocks for Serial-ATA and SRC

• Supports spread spectrum modulation, 0 to –0.5% down spread

• Uses external 14.318MHz crystal, external crystal load caps are required for frequency tuning

• Supports undriven differential CPU, SRC pair in PD# for power management

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1.3.3 The Mobile Intel 915GM Express Chipset

The Mobile Intel 915GM Express Chipset is a memory controller hub (GMCH) designed for use with the Dothan, Yonah and Intel Celeron M Processor. It supports Intel Graphics Media Accelerator 900 & PCI Express based Graphics.

The 915GM GMCH integrates a system memory DDR/DDR2 controller with two, 64-bit wide interfaces. Only Double Data Rate (DDR/DDR2) memory is supported; the buffers support DDR SSTL_2 and DDR2 SSTL_18 signaling interfaces. The memory controller interface is fully configurable through a set of control registers. It supports a high performance transition interface PCI Express Interface. PCI Express operates at a data rate of 2.5 GB/s. This allows a maximum theoretical bandwidth of 40 GB/s each direction. The 915GM GMCH integrates Direct media interface (DMI) chip-to-chip interconnect between the GMCH and ICH6-M. DMI supports DMI x2 and DMI x4 configuration.

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 Processor/FSB Support

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• Intel

• AGTL+ bus driver technology with integrated GTL termination resistors (gated AGTL+ receivers for

• Supports 32-bit AGTL+ host bus addressing

• Supports system bus at 533MT/s (533 MHz) and 400MT/s (400 MHz)

• 2X Address, 4X data

• Host bus dynamic bus inversion HDINV support

• 12 deep, in-order queue

Dothan processor

reduced power)

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 Memory System

• Directly supports to two DDR or DDR2 SDRAM channels, 64-bts wide

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• Supports SO-DIMMs of the same type (e.g.,all DDR or all DDR2), not mixed

• Maximum of two, double-sided unbuffered SO-DIMMs (4 rows populated)

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• Minimum amount of memory supported is 128 MB (16 MB x 16-b x 4 devices x 1 rows = 128 MB) using

256-MB technology

• Maximum amount of memory supported is 2 GB using 1-GB technology

• 256-MB, 512-MB and 1-GB technology using x8 and x16 devices

• Three memory channel organizations are supported for DDR / DDR2

--- Single channel

--- dual channel interleaved

--- dual channel asymmetric

• Supports DDR 333 devices and DDR2 400 /533 devices

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--- Supports on-die termination (ODT) for DDR2

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• Supports Fast Chip Select mode

• Supports partial write to memory using Data Mask signal (DM)

• Supports high-density memory package for DDR or DDR2 type devices

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 PCI Express Interface

• One x16 (16 lanes) PCI Express port intended for graphics attach

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• Maximum theoretical realized bandwidth on interface of 4 GB/s in each direction simultaneously, for an

average of 8 GB/s when x16

• Automatic discovery, negotiation and training of link out of reset

• Supports traditional PCI style traffic (asynchronous snooped, PCI ordering)

• Supports traditional AGP style traffic (asynchronous non-snooped, PCI-X relaxed ordering)

• Supports only 1.5-V AGP electricals

• 32 deep AGP request queue

• Hierarchical PCI-compliant configuration mechanism for downstream devices

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 Internal Graphics Controller

• Intel Dual-Frequency Graphics Technology support

• 3D Graphics Engine

--- DirectX* 9.0 support

--- OpenGL* 1.5 and 2.0 support

--- Zone rendering 2.0 support

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• Analog CRT DAC Interface Support

--- Supports max DAC frequency up 400 MHz

--- 24-bit RAMDAC support

--- DDC2B compliant

• Analog TV-Out Interface Support

--- Integrated TV-Out device support on display pipes A and B

--- NTSC/PAL encoder standard formats supported

--- 480p/720p/1080i/1080p modes supported

--- Tri-level Sync signal

--- Multiplexed output interface:

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- Composite video with S-Video

-S-Video

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- Component Video

--- Up to 1024 x 768 resolution supported for NTSC/PAL

--- Macrovision, over scan scaling, and flicker filtering support

• Serial digital video out Port (SDVO) interface Support

--- Two SDVO port are muxed with a subset of the external graphics interface using PCI Express* Architecture signals

--- Each SDVO port support display pixel rates up to 200MP/s

- The two SDVO ports can be combined into a gang mode to support pixel rates up to 400 MP/s

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--- Supports a variety display devices such as DVI, TV-Out, LVDS, etc.

--- Supports hot plug and display

--- Supports for Macrovision on SDVO TV-Out devices

--- Supports for HDCP SDVO devices

--- External port adds alpha out

• Digital LVDS Interface Support

--- Integrated dual channel LVDS interface supported on display pipe B only

--- Supports 25-MHz to 112-MHz single/dual channel LVDS LCD interface with support for following format of :

- 1x18 bpp for TFT panels with single channel LVDS

- 2x18 bbp for TFT panels with dual channels LVDS

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--- Panel Fitting, Panning, and Center mode supported

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--- Spread spectrum clocking (SSC) supported

--- Panel Power Sequencing compliant with SPWG timing specification

--- Integrated PWM interface for LCD backlight inverter control

• Direct Media Interface (DMI)

--- Chip-to-chip interconnect between the GMCH and ICH6-M

--- DMI x2 and DMI x4 configuration supported

--- Bit swapping is supported

--- Lane reversal is not supported

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1.3.4 I/O Controller Hub: Intel ICH6-M

 The ICH6 Provides Extensive I/O Support, Functions and Capabilities Include

• PCI Express Base Specification, Revision 1.0a-compliant

• PCI Local Bus Specification, Revision 2.3-compliant with support for 33 MHz PCI operations(supports up to

seven Req/Gnt pairs).

• ACPI Power Management Logic Support

• Enhanced DMA controller, interrupt controller, and timer functions

• Integrated Serial ATA host controller with independent DMA operation on two ports and AHCI support

• Integrated IDE controller supports Ultra ATA100/66/33

• USB host interface with support for three USB ports; three UHCI host controllers; one EHCI high-speed

USB2.0 Host controller

• Integrated LAN controller

• System Management Bus (SMBus) Specification, Version 2.0 with additional support for I

• Supports Audio Codec ’97, Revision 2.3 Specification (a.k.a.,AC ’97 Component Specification, Revision 2.3)

which provides a link for Audio and Telephony codecs (up to 7 channels)

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• Supports Intel High Definition Audio

• Low Pin Count (LPC) interface

• Firmware Hub (FWH) interface support

1.3.5 CardBus: PCI4510

 The PCI4510 Device Supports the Following Features

• PC Card Standard 8.0 compliant

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• PCI Bus Power Management Interface Specification 1.1 compliant

• Advanced Configuration and Power Interface Specification 2.0 compliant

• PCI Local Bus Specification Revision 2.2 compliant

• PC 98/99 and PC2001 compliant

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• Compliant with the PCI Bus Interface Specification for PCI-to-CardBus Bridges

• Fully compliant with provisions of IEEE Std 1394-1995 for a high-performance serial bus and IEEE Std

1394a-2000

• Fully compliant with 1394 Open Host Controller Interface Specification 1.1

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• Compatible with both TPS2211A and TPS2221 PC Card power switches

• 1.8-V core logic and 3.3-V I/O cells with internal voltage regulator to generate 1.8-V core Vcc

• Universal PCI interfaces compatible with 3.3-V and 5-V PCI signaling environments

• Supports PC Card or CardBus with hot insertion and removal

• Supports 132-MBps burst transfers to maximize data throughput on both the PCI bus and the CardBus

• Supports serialized IRQ with PCI interrupts

• Programmable multifunction terminals

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• Serial ROM interface for loading subsystem ID and subsystem vendor ID

• ExCA0compatible registers are mapped in memory or I/O space

• Intel 82365SL-DF register compatible

• Supports ring indicate , SUSPEND# , PCI CCLKRUN# protocol , and PCI bus lock (LOCK#)

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• Provides VGA/palette memory and I/O , and subtractive decoding options , LED activity terminals

• Fully interoperable with FireWire

• Compliant with Intel Mobile Power Guideline 2000

and i.LINKTMimplementations of IEEE Std 1394

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• Full IEEE Std 1394a-2000 support includes: connection debounce, arbitrated short reset, multispeed

concatenation, arbitration acceleration, fly-by concatenation, and port disable/suspend/resume

• Power-down features to conserve energy in battery-powered applications include: automatic device power

down during suspend, PCI power management for link-layer and inactive ports powered down, ultra low- power sleep mode

• Two IEEE Std 1394a-2000 fully compliant cable ports at 100M bits/s, 200M bits/s, and 400M bits/s

• Cable power presence monitoring

• Separate cable bias (TPBIAS) for each port

• Physical write posting of up to three outstanding transactions

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• PCI burst transfers and deep FIFO to tolerate large host latency

• External cycle timer control for customized synchronization

• Extended resume signaling for compatibility with legacy DV components

• PHY-Link logic performs system initialization and arbitration functions

• PHY-Link encode and decode functions included for data-strobe bit level encoding

• PHY-Link incoming data resynchronized to local clock

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• Low-cost 24.576MHz crystal provides transmit and receive data at 100M bits/s, 200M bits/s, and 400M

bits/s

• Node power class information signaling for system power management

• Register bits give software control of contender bit, power class bits, link active control bit, and IEEE Std

1394a-2000 features

• Isochronously receive dual-buffer mode

• Out-of-order pipelining for asynchronous transmit requests

• Register access fail interrupt when the PHY SCLK is not active

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• PCI power-management D0, D1, D2, and D3 power states

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• Initial bandwidth available and initial channels available registers

• PME# support per 1394 Open Host Controller Interface Specification

• Advanced sub micron, low-power CMOS technology

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1.3.6 AC’97 Audio System: ALC655

The ALC655 is a 16-bit, full duplex AC’97 2.3 compatible six channels audio CODEC designed for PC multimedia systems, including host/soft audio and AMR/CNR based designs. The ALC655 incorporates proprietary converter technology to meet performance requirements on PC99/2001 systems. The ALC655 CODEC provides three pairs of stereo outputs with 5-bit volume controls, a mono output, and multiple stereo and mono inputs, along with flexible mixing, gain and mute functions to provide a complete integrated audio solution for PCs. The digital interface circuitry of the ALC655 CODEC operates from a 3.3V power supply for use in notebook and PC applications. The ALC655 integrates 50mW/20ohm headset audio amplifiers at Front-Out and Surr-Out, built-in

14.318M24.576MHz PLL and PCBEEP generator, those can save BOM costs. The ALC655 also supports the S/PDIF input and output function, which can offer easy connection of PCs to consumer electronic produces, such as AC3 decoder/speaker and mini disk devices. ALC655 supports host/soft audio from Intel ICHx chipsets as well as audio controller based VIA/SIS/ALI/AMD/nVIDIA/ATI chipset. Bundled Windows series drivers (WinXP/ME/2000/98/NT), EAX/Direct Sound 3D/I3DL2/A3D compatible sound effect utilities (supporting

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Karaoke, 26-kind of environment sound emulation, 10-band equalizer), HRTF 3D positional audio and Sensaura 3D (optional) provide an excellent entertainment package and game experience for PC users. Besides, ALC655 includes Realtek’s impedance sensing techniques that makes device load on outputs and inputs can be detected.

 Features

• Meets performance requirements for audio on PC99/2001 systems

• Meets Microsoft WHQL/WLP 2.0 audio requirements

• 16-bit Stereo full-duplex CODEC with 48KHz sampling rate

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• Compliant with AC’97 2.3 specifications

---Front-Out, Surround-Out, MIC-In and LINE-In Jack Sensing

---14.318MHz24.576MHz PLL to save crystal

---12.288MHz BITCLK input can be consumed

---Integrated PCBEEP generator to save buzzer

---Interrupt capability

• Three analog line-level stereo inputs with 5-bit volume control: LINE_IN, CD, AUX

• High quality differential CD input

• Two analog line-level mono input: PCBEEP, PHONE-IN

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• Two software selectable MIC inputs

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• LINE Input shared with surround output: MIC input shared with Center and LFE output

• Both Front-out and Surround-Out built-in 50mW/20ohm amplifier

• External Amplifier Power Down (EAPD)

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• Power management and enhanced power saving features

• Stereo MIC record for AEC/BF application

• Supports Power Off CD function

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• Adjustable VREFOUT control

• Supports double sampling rate (96KHz) of DVD audio playback

• Support 48KHz of S/PDIF output is compliant with AC’97 rev2.3 specification

• Support 32K/44.1K/48KHz of S/PDIF input

• Power support: Digital: 3.3V; Analog: 3.3V/5V

• Standard 48-Pin LQFP Package

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• EAX

• Direct Sound 3D

• HRTF 3D Positional Audio

• Sensaura

• 10 Bands of Software Equalizer

1.0 & 2.0 compatible

compatible

3D Enhancement (optional)

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• Voice Cancellation and Key Shifting in Kara OK mode

• AVRack Media Player

• Configuration Panel to improve Experience of User

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1.3.7 Modem: Askey 1456VQL4A(INT) Data/Fax Modem

 Features

• ITU-T V.90/V.92 data rates 28000 bits/s-56000 bits/s

• High compression throughput due to parallel access directly to the host PC

• ITU-T V.34 extended rates: 33600 bits/s-2400 bits/s V.32terbo, V.32bis, and fallbacks.

• ITU-T V.42 error correction (LAPM and MNP)

• ITU-T V.42bis V.44 and MNP Class 5 data compression

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• Supports fax ITU-T V.34, V.17, V.29, V.27ter, and V.21 Ch 2

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• ITU-T V.253 Class 1 FAX

• Support Application for Windows 98, Windows 98SE, Windows NT 4.0, Windows 2000, Windows XP

• AC97/MC’97 2.2 compliant

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1.3.8 System Flash Memory (BIOS)

 Features

• Single 3.3-volt operations:

---3.3V Read

---3.3V Erase

---3.3V Program

• Fast Program operation:

---Byte-by-Byte programming: 35uS (typ.)

• Fast Erase operation:

---Chip erase 100mS (max.)

---Sector erase 25mS (max.)

---Page erase 25mS (max.)

• Fast Read access time: Tkq 11nS

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• Endurance: 10K cycles (typ.)

• 8 Even sectors with 64K bytes each, which is composed of 16 flexible pages with 4K bytes

• Any individual sector or page can be erased

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• Hardware protection:

---Optional 16K byte or 64K byte Top Boot Block with lockout protection

---#TBL & #WP support the whole chip hardware protection

---Flexible 4K page size can be used as Parameter Blocks

---Low power consumption. Active current: 40mA (typ. For FWH mode)

---Automatic program and erase timing with internal Vpp generation

---End of program or erase detection: Toggle bit; Data polling

---Latched address and data

1.3.9 Memory System

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 256MB, 512MB, 1GB (x64) 200-Pin DDR2 SDRAM SODIMMs

• JEDEC-standard 200-pin, small-outline, dual in-line memory module (SODIMM)

• VDD=+1.8V±0.1V, VDDQ=+1.8V±0.1V

• JEDEC standard 1.8V I/O (SSTL_18-compatible)

• Differential data strobe (DQS,DQS#) option

• Four-bit prefetch architecture

• Differential clock input (CK,CK#)

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• Command entered on each rising CK edge

• DQS edge-aligned with data for Reads

• DQS center-aligned with data for Writes

• Duplicate output strobe (RDQS) option for x8 configuration

• DLL to align DQ and DQS transitions with CK

• Four internal banks for concurrent operation

• Data mask (DM) for masking write data

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• Programmable CAS Latency (CL) : 2,3,4 and 5

• Posted CAS additive latency (AL) : 0,1,2,3 and 4

• Write latency = Read latency – 1

• Programmable burst lengths : 4 or 8

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• Read burst interrupt supported by another READ

• Write burst interrupt supported by another WRITE

• Adjustable data – output drive strength

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• Concurrent auto precharge option is supported

• Auto Refresh (CBS) and Self Refresh Mode

• 64ms, 8,192-cycle refresh

• Off-chip drive (OCD) impedance calibration

• On-die termination (ODT)

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1.3.10 LAN – Integrated Gigabit Ethernet Controller

The Realtek RTL8110SBL (128 LQFP) Gigabit Ethernet controllers combine a triple-speed IEEE 802.3 compliant Media Access Controller (MAC) with a triple-speed Ethernet transceiver, 32-bit PCI bus controller, and embedded memory. With state-of-the-art DSP technology and mixed-mode signal technology, they offer high-speed transmission over CAT 5 UTP cable or CAT 3 UTP (10Mbps only) cable. Functions such as Crossover Detection & Auto-Correction, polarity correction, adaptive equalization, cross-talk cancellation, echo cancellation, timing recovery, and error correction are implemented to provide robust transmission and reception capability at high speeds.

The devices support the PCI v2.3 bus interface for host communications with power management and are compliant with the IEEE 802.3 specification for 10/100Mbps Ethernet and the IEEE 802.3ab specification for 1000Mbps Ethernet. They also support an auxiliary power auto-detect function, and will auto-configure related bits of the PCI power management registers in PCI configuration space.

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They support the Advanced Configuration Power management Interface (ACPI) – power management for modern operating systems that are capable of Operating System-directed Power Management (OSPM) – to achieve the most efficient power management possible. PCI Message Signaled Interrupt (MSI) is also supported.

In addition to the ACPI feature, the RTL8110SBL support remote wake-up (including AMD Magic Packet, Re- LinkOk, and Microsoft Wake-up frame) in both ACPI and APM (Advanced Power Management) environments.

The RTL8110SBL is fully compliant with Microsoft NDIS5 (IP, TCP, UDP) Checksum and Segmentation Task- offload features, and supports IEEE 802 IP Layer 2 priority encoding and 802.1Q Virtual bridged Local Area Network (VLAN). The above features contribute to lowering CPU utilization, especially benefiting performance when in operation on a network server. Also, the devices boost their PCI performance by supporting PCI Memory Read Line & Memory Read Multiple when transmitting, and Memory Write and Invalidate when receiving. To better qualify for server use, the RTL8110SBL support the PCI Dual Address Cycle (DAC) command when the

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assigned buffers reside at a physical memory address higher than 4 Gigabytes.

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 Features

• Integrated 10/100/1000 transceiver

• Auto-Negotiation with Next Page capability

• Supports PCI rev 2.3, 32-bit, 33/66MHz

• Supports pair swap/polarity/skew correction

• Crossover Detection & Auto-Correction

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• Wake-on-LAN and remote wake-up support

• Microsoft NDIS5 Checksum Offload (IP, TCP, UDP) and large send offload support

• Supports Full Duplex flow control (IEEE 802.3x)

• Fully compliant with IEEE 802.3, IEEE 802.3u, IEEE 802.3ab

• Support IEEE 802.1P Layer 2 Priority Encoding

• Support IEEE 802.1Q VLAN tagging

• Serial EEPROM

MP N/B Maintenance

• 3.3V signaling, 5V PCI I/O tolerant

• Transmit/Receive FIFO (8K/64K) support

• Supports power down/link down power saving

• Supports PCI Message Signaled Interrupt (MSI)

MiTac Secret

Confidential Document

• 128-pin LQFP package

+ 124 hidden pages

miscellaneous mitac 8066mp Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual