Microsemi ZLE30267 Hardware Manual

ZLE30267 Evaluation Board
PCB Revision B Hardware Guide
December 2015
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ZLE30267 Hardware Guide Document #153729
Major Components .............................................................................................................. 5
Hardware Features .............................................................................................................. 5
Power Supply ...................................................................................................................... 7
USB Interface ...................................................................................................................... 7
Switch and Jumper Configurations, Detailed Listing ......................................................... 12
Power Supply .................................................................................................................... 14
Reset, SPI Bus and GPIO Settings ................................................................................... 16
Local Oscillator .................................................................................................................. 17
DUT Mode Bits .................................................................................................................. 18
Input Clocks ....................................................................................................................... 19
Output Clocks .................................................................................................................... 21
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List of Figures
Figure 1 · Board Floor Plan ................................ ............................................................................... 6
Figure 2 · Configuration Topology with Annotations ................................ ................................ .......... 8
Figure 3 · Board Configuration 1 ....................................................................................................... 8
Figure 4 · Board Configuration 2 ....................................................................................................... 9
Figure 5 · Board Configuration 3 ....................................................................................................... 9
Figure 6 · Board Configuration 4 ..................................................................................................... 10
Figure 7 · Board Configuration 5 ..................................................................................................... 10
Figure 8 · Board Configurations 6 and 7 ......................................................................................... 11
Figure 9 · Board Configuration 8 ..................................................................................................... 11
Figure 10 · ZLE30267 Oscillator / Crystal Daughter Card Schematic ............................................. 25
Figure 11 · ZLE30267 Oscillator / Crystal Daughter Assembly Drawing ......................................... 25
Figure 12 · ZLE30267 Oscillator / Crystal Daughter Assembly Drawing ......................................... 25
Figure 13 · ZLE30267 Oscillator / Crystal Daughter Assembly Drawing ......................................... 26
Figure 14 · ZLE30267 Oscillator / Crystal Daughter installed on header JP72................................ 27
ZLE30267 Hardware Guide
List of Tables
Table 1 · Serial Bus DIP Switch and Jumper Configurations........................................................... 12
Table 2 · Power Connections and Settings ..................................................................................... 15
Table 3 · Reset, SPI bus and PC Interface Hardware Configuration ............................................... 16
Table 4 · XA Pin Oscillator Configurable Hardware ......................................................................... 17
Table 5 · DUT XA Pin Source Selection Jumper Settings ............................................................... 17
Table 6 · DUT Reset: Mode Bit Settings ......................................................................................... 18
Table 7 · Input Clock Hardware Configuration ................................................................................. 20
Table 8 · Input Clock Differential/Single-Ended Mode Selection Settings ....................................... 20
Table 9 · Output Clock Hardware Configuration .............................................................................. 22
Table 10 · JP1 Serial Header Pin Assignments ............................................................................... 23
Table 11 · JP5 Serial Header Pin Assignments ............................................................................... 23
Table 12 · Discrete Component Options for Clocks ........................................................................ 23
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ZLE30267 Hardware Guide
Supported Devices
The ZLE30267 evaluation board supports the following Microsemi timing and synchronization devices: ZL30260 to ZL30267 and ZL40250 to ZL40253.
Related Documents
ZLE30267 Evaluation Board Rev B Schematic  ZLE30267 Evaluation Board Rev B Bill of Materials  Datasheets for the ZL30267 and the other part numbers listed in the Supported Devices section
Hardware Overview
The ZLE30267 Evaluation Board is a test and demonstration platform with support for the full feature sets of the family of timing ICs.
Hardware Feature Summary
A top side image of the board is shown in Figure 1. Throughout this document, the abbreviation “DUT” is used to refer to “Device Under Test”, meaning the
Microsemi timing IC on the board. The ZLE30267 board includes the following major components and hardware features:
Major Components
Timing IC (DUT)  Low noise linear regulators  USB Interface for optional connection to PC with GUI software  External EEPROM for timing device configuration storage (ZL30260, ZL30262, ZL30264, ZL30266,
ZL40250, ZL40252)
SMA connectors for access to all DUT clocks  Serial bus switch
Hardware Features
Single 5VDC external power interface with connector for AC/DC wall adapter  Fully configurable DUT power options  DUT reset switch  Standalone (DIP switch) operation or GUI Interface  USB interface with USB-B connector for PC GUI connection  Pin headers with direct access to board’s SPI/I2C bus. Off-board DUT, EEPROM, or SPI master device
can interface with on-board devices.
Status LEDs  Oscillator options: on board or pluggable TCXOs, XOs or XTALs  SMA connectors on all input and output clocks  Jumper-configurable input clocks  Additional discrete component configuration options for advanced users
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ZLE30267 Hardware Guide
Power and ground jacks
5V adapter
jack
DUT
USB jack
SPI/I2C
Connectors
Local oscillator selection
LEDs
USB
interface
IC
Reset button
Device part # and Info about on-board XOs
VDD
Control
VDD Control
barcode
Output Clocks
Input Clocks
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Figure 1 · Board Floor Plan
Power Supply
The board is normally powered via connector J5 using the provided AC-wall-plug 5VDC power supply. Red LED D1 illuminates to indicate that the board is powered. Advanced power options for lab experimentation are also provisioned on the board.
USB Interface
The Windows®-based ZLE30267 GUI software communicates with the board via USB connector JDR1.
Hardware Configuration
Top Level Configurations
The ZLE30267 Evaluation Board supports several operational modes of DUTs, including
SPI/I2C slave (with or without internal EEPROM)  SPI master with external EEPROM
To provide flexibility to users, the board supports a multiplicity of configurations, some of which require software supervision via the USB link, some of which allow the board to operate as a standalone unit, and others which provide external device access points to the board’s serial bus by means of pin headers.
Top level configuration defines the following aspects of board set up:
A connection between a serial bus master device and serial bus slave device. The serial bus
master may be the USB interface controller (U8), DUT (U17), or an external controller connected into a pin header (JP1 or JP5) on the board. The serial bus slave device may be the DUT, on­board EEPROM (U10), or an external EEPROM or DUT on a separate board, connected to a pin header (JP1 or JP5).
Control of serial bus switch, which may be either via DIP switches or the USB interface controller  Control of DUT GPIO pins by means of DIP switches
The following block diagram shows a simplified topology of the hardware elements relating to high-level board configuration. Annotations identify significant board components associated with objects in the image. At the core of the board’s design is a serial bus switch. The switch allows point-to-point serial bus connections to be made between the USB interface, DUT, and on board EEPROM, with additional options for connecting user devices to a pin header. Hardware settings on the board may be configured by DIP switches, or, in set-ups in which the board is under software control, the software controls some DIP switch settings, and monitors others.
ZLE30267 Hardware Guide
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ZLE30267 Hardware Guide
Each of the possible configurations is portrayed in the following series of Figures 3 through 9. The active serial bus and hardware control elements of the configuration are depicted by heavy lines. Active blocks are also identified with bold text. Two of the switches on SW1 are shown in green to differentiate them from GPIO controls. These represent settings for signals IF1 and IF0, which act through the SPI bus and are used in DUT configuration on reset.
In Configuration 1, the USB interface is SPI master with the DUT as bus slave.
Figure 2 · Configuration Topology with Annotations
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Figure 3 · Board Configuration 1
ZLE30267 Hardware Guide
In Configurations 2 and 3, the USB device is SPI master. The USB master can interface with an on-board EEPROM as in Configuration 2, or an “external SPI device” as in Configuration 3. The external SPI device could be either an EEPROM or a DUT mounted on another board. The physical form the external device takes would typically be an independently powered board connected by cable interface to JP1 or JP5. In configurations in which an external device is connected to the board, voltage level compatibility should be checked prior to proceeding with connections.
Figure 4 · Board Configuration 2
Figure 5 · Board Configuration 3
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