Micronas Intermetall MSP3405D, MSP3415D Datasheet

MSP 3405D, MSP 3415D Multistandard

Edition Oct. 14, 1999 6251-475-2PD

PRELIMINARY DATA SHEET

MICRONAS

Sound Processors

MSP 34x5D

Contents

Page Section Title

5 1. Introduction

5 1.1. Common Features of MSP 34x5D 5 1.2. Specific MSP 3415D Features 5 1.3. Unsupported MSP 34x0D Functions 5 1.4. MSP 34x0D Inputs and Outputs not included in the MSP 34x5D

6 2. Basic Features of the MSP 34x5D

6 2.1. Demodulator and NICAM Decoder Section 6 2.2. DSP-Section (Audio Baseband Processing) 6 2.3. Analog Section

7 3. Application Fields of the MSP 34x5D

7 3.1. NICAM plus FM/AM-Mono 7 3.2. German 2-Carrier System (DUAL FM System)

PRELIMINARY DATA SHEET

10 4. Architecture of the MSP 34x5D

10 4.1. Demodulator and NICAM Decoder Section 10 4.1.1. Analog Sound IF – Input Section 11 4.1.2. Quadrature Mixers 11 4.1.3. Low-pass Filtering Block for Mixed Sound IF Signals 12 4.1.4. Phase and AM Discrimination 12 4.1.5. Differentiators 12 4.1.6. Low-pass Filter Block for Demodulated Signals 12 4.1.7. High Deviation FM Mode 12 4.1.8. FM-Carrier-Mute Function in the Dual Carrier FM Mode 12 4.1.9. DQPSK-Decoder (MSP 3415D only) 12 4.1.10. NICAM-Decoder (MSP 3415D only) 13 4.2. Analog Section 13 4.2.1. SCART Switching Facilities 13 4.2.2. Stand-by Mode 13 4.3. DSP-Section (Audio Baseband Processing) 13 4.3.1. Dual Carrier FM Stereo/Bilingual Detection 14 4.4. Audio PLL and Crystal Specifications 14 4.5. Digital Control Output Pins 15 4.6. I

16 5. I

17 5.1. Protocol Description 18 5.2. Proposal for MSP 34x5D I 18 5.2.1. Symbols 18 5.2.2. Write Telegrams 18 5.2.3. Read Telegrams 18 5.2.4. Examples 19 5.3. Start-Up Sequence: Power-Up and I

S Bus Interface

C Bus Interface: Device and Subaddresses

C Telegrams

C-Controlling

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Contents, continued

Page Section Title

20 6. Programming the Demodulator Section

20 6.1. Short-Programming and General Programming of the Demodulator Part 21 6.2. Demodulator Write Registers: Table and Addresses 21 6.3. Demodulator Read Registers: Table and Addresses 22 6.4. Demodulator Write Registers for Short-Programming: Functions and Values 22 6.4.1. Demodulator Short-Programming 23 6.4.2. AUTO_FM/AM: Automatic Switching between NICAM and FM/AM-Mono (MSP 3415D only) 24 6.5. Demodulator Write Registers for the General Programming Mode: Functions and Values 24 6.5.1. Register ‘AD_CV’ 26 6.5.2. Register ‘MODE_REG’ 27 6.5.3. FIR-Parameter 29 6.5.4. DCO-Registers 29 6.6. Demodulator Read Registers: Functions and Values 30 6.6.1. Autodetect of Terrestrial TV-Audio Standards 31 6.6.2. C_AD_BITS (MSP 3415D only) 31 6.6.3. ADD_BITS [10...3] (MSP 3415D only) 31 6.6.4. CIB_BITS (MSP 3415D only) 31 6.6.5. ERROR_RATE (MSP 3415D only) 32 6.6.6. CONC_CT (for compatibility with MSP 3410B) 32 6.6.7. FAWCT_IST (for compatibility with MSP 3410B) 32 6.6.8. PLL_CAPS 32 6.6.9. AGC_GAIN 32 6.7. Sequences to Transmit Parameters and to Start Processing 34 6.8. Software Proposals for Multistandard TV-Sets 34 6.8.1. Multistandard Including System B/G or I (NICAM/FM-Mono only) or

SECAM L (NICAM/AM-Mono only) 34 6.8.2. Multistandard Including System B/G with NICAM/FM-Mono and German DUAL FM 34 6.8.3. Satellite Mode 34 6.8.4. Automatic Search Function for FM-Carrier Detection

MSP 34x5D

36 7. Programming the DSP Section (Audio Baseband Processing)

36 7.1. DSP Write Registers: Table and Addresses 37 7.2. DSP Read Registers: Table and Addresses 38 7.3. DSP Write Registers: Functions and Values 38 7.3.1. Volume Loudspeaker Channel 39 7.3.2. Balance Loudspeaker Channel 39 7.3.3. Bass Loudspeaker Channel 40 7.3.4. Treble Loudspeaker Channel 40 7.3.5. Loudness Loudspeaker Channel 40 7.3.6. Spatial Effects Loudspeaker Channel 41 7.3.7. Volume SCART1 41 7.3.8. Channel Source Modes 41 7.3.9. Channel Matrix Modes 42 7.3.10. SCART Prescale 42 7.3.11. FM/AM Prescale 43 7.3.12. FM Matrix Modes 43 7.3.13. FM Fixed Deemphasis 43 7.3.14. FM Adaptive Deemphasis

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Contents, continued

Page Section Title

43 7.3.15. NICAM Prescale (MSP 3415D only) 43 7.3.16. NICAM Deemphasis (MSP 3415D only) 43 7.3.17. I 43 7.3.18. ACB Register 44 7.3.19. Beeper 44 7.3.20. Identification Mode 44 7.3.21. FM DC Notch 44 7.3.22. Automatic Volume Correction (AVC) 45 7.4. Exclusions for the Audio Baseband Features 45 7.5. DSP Read Registers: Functions and Values 45 7.5.1. Stereo Detection Register 45 7.5.2. Quasi-Peak Detector 46 7.5.3. DC Level Register 46 7.5.4. MSP Hardware Version Code 46 7.5.5. MSP Major Revision Code 46 7.5.6. MSP Product Code 46 7.5.7. MSP ROM Version Code

S1 and I2S2 Prescale

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47 8. Specifications

47 8.1. Outline Dimensions 49 8.2. Pin Connections and Short Descriptions 52 8.3. Pin Configurations 55 8.4. Pin Circuits 57 8.5. Electrical Characteristics 57 8.5.1. Absolute Maximum Ratings 58 8.5.2. Recommended Operating Conditions 62 8.5.3. Characteristics

66 9. Application Circuit

67 10. Appendix A: MSP 34x5D Version History

68 11. Data Sheet History

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MSP 34x5D

Multistandard Sound Processor

Release Notes: The hardware description in this document is valid for the MSP 34x5D version A2 and following versions. Revision bars indicate significant changes to the previous edition.

1. Introduction

The MSP 34x5D is designed as a single-chip Multistan- dard Sound Processor for applications in analog and digital TV sets, video recorders, and PC-cards. As derivative versions of the MSP 34x0D, the MSP 34x5D combines all demodulator features of the MSP 34x0D with less I/O and reduced audio baseband processing.

The IC is produced in submicron CMOS technology, combined with high-performance digital signal processing. The MSP 34x5D is available in the following packages: PLCC68, PSDIP64, PSDIP52, PQFP80, and PMQFP44.

Note: The MSP34x5D version has reduced control registers and less functional pins. The remaining registers are software compatible to the MSP 3410D. The pinning is compatible to the MSP 3410D.

– Bass, treble, volume, loudness, and spatial effects

processing – Full SCART in/out matrix without restrictions – Improved FM-identification (as in MSPC) – Demodulator short programming – Autodetection for terrestrial TV-sound standards – Improved carrier mute algorithm (as in MSPD) – Improved AM-demodulation (as in MSPD) – Digital control output pins D_CTR_OUT0/1 – Reduction of necessary controlling – Less external components

1.2. Specific MSP 3415D Features

– All NICAM standards – Precise bit-error rate indication – Automatic switching from NICAM to FM/AM or vice

versa – Improved NICAM synchronization algorithm

1.3. Unsupported MSP 34x0D Functions

1.1. Common Features of MSP 34x5D

– Dolby Pro Logic together with DPL 351xA – Analog sound IF input – No external filters required – Stereo baseband input via integrated A/D converters – Two pairs of D/A converters – Two carrier FM

S Interface for version B3 and later versions

– I – AVC: Automatic Volume Correction

Sound IF 1

MONO IN

SCART1 IN

SCART2 IN

I2C

MSP 34x5D

I2S

Loudspeaker OUT

SCART OUT

– Equalizer

1.4. MSP 34x0D Inputs and Outputs not included in

the MSP 34x5D

– 2nd IF input – 3rd and 4th SCART input – 2nd SCART output – 2nd SCART DA – Headphone output – Subwoofer output – ADR interface

Fig. 1–1: Main I/O signals of the MSP 34x5D

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MSP 34x5D

PRELIMINARY DATA SHEET

2. Basic Features of the MSP 34x5D

2.1. Demodulator and NICAM Decoder Section

The MSP 3415D is designed to simultaneously perform digital demodulation and decoding of NICAM-coded TV stereo sound, as well as demodulation of FM or AMmono TV sound. Alternatively, two carrier FM systems according to the German terrestrial specs can be processed with the MSP 34x5D.

The MSP 34x5D facilitates profitable multistandard capability, offering the following advantages:

– Automatic Gain Control (AGC) for analog input:

input range: 0.10 – 3 Vpp – integrated A/D converter for sound IF input – all demodulation and filtering is performed on chip

and is individually programmable – easy realization of all digital NICAM standards

(B/G, I, L and D/K, not for MSP 3405D) – FM-demodulation of all terrestrial standards

(including identification decoding) – no external filter hardware is required – only one crystal clock (18.432 MHz) is necessary

2.3. Analog Section

– two selectable analog pairs of audio baseband inputs

(= two SCART inputs) input level: ≤2 V RMS, input impedance: ≥25 kΩ

– one selectable analog mono input (i.e. AM sound):

input level: ≤2 V RMS, input impedance: ≥15 kΩ

– two high-quality A/D converters, S/N-Ratio: ≥85 dB

– 20 Hz to 20 kHz bandwidth for

SCART-to-SCART-copy facilities

– loudspeaker: one pair of four-fold oversampled

D/A-converters output level per channel: max. 1.4 VRMS output resistance: max. 5 kΩ S/N-ratio: ≥85 dB at maximum volume max. noise voltage in mute mode: ≤10 µV (BW: 20 Hz ...16 kHz)

– one pair of four-fold oversampled D/A converters

supplying a pair of SCART-outputs. output level per channel: max. 2 V RMS, output resistance: max. 0.5 kΩ, S/N-Ratio: ≥85 dB (20 Hz...16 kHz)

– high deviation FM-mono mode

(max. deviation: approx. ±360 kHz)

2.2. DSP-Section (Audio Baseband Processing)

– two digital inputs and one digital output via I

external signal processors like the DPL 351x. – flexible selection of audio sources to be processed – performance of terrestrial deemphasis systems

(FM, NICAM) – digitally performed FM-identification decoding and

dematrixing – digital baseband processing: volume, bass, treble,

loudness, and spatial effects – simple controlling of volume, bass, treble, loudness,

and spatial effects

S bus for

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MSP 34x5D

3. Application Fields of the MSP 34x5D

In the following sections, a brief overview about the two main TV sound standards, NICAM 728 and German FMStereo, demonstrates the complex requirements of a multistandard audio IC.

3.1. NICAM plus FM/AM-Mono

According to the British, Scandinavian, Spanish, and French TV-standards, high-quality stereo sound is transmitted digitally. The systems allow two high-quality digital sound channels to be added to the already existing FM/AM-channel. The sound coding follows the format of the so-called Near Instantaneous Companding System (NICAM 728). Transmission is performed using Differential Quadrature Phase Shift Keying (DQPSK). Table 3–2 gives some specifications of the sound coding (NICAM); Table 3–3 offers an overview of the modulation parameters.

In the case of NICAM/FM (AM) mode, there are three different audio channels available: NICAM A, NICAM B, and FM/AM-mono. NICAM A and B may belong either to a stereo or to a dual language transmission. Information about operation mode and about the quality of the NICAM signal can be read by the CCU via the control bus. In the case of low quality (high bit error rate), the CCU may decide to switch to the analog FM/AM-mono sound. Alternatively, an automatic NICAM-FM/AM switching may be applied.

3.2. German 2-Carrier System (DUAL FM System)

Since September 1981, stereo and dual sound programs have been transmitted in Germany using the 2-carrier system. Sound transmission consists of the already existing first sound carrier and a second sound carrier additionally containing an identification signal. More details of this standard are given in Tables 3–1 and 3–4. For D/K and M-Korea, very similar systems are used.

Table 3–1: TV standards

TV-System Position of Sound

Carrier [MHz]

B/G 5.5/5.7421875 FM-Stereo PAL Germany

B/G 5.5/5.85 FM-Mono/NICAM PAL Scandinavia,Spain

L 6.5/5.85 AM-Mono/NICAM SECAM-L France

I 6.0/6.552 FM-Mono/NICAM PAL UK

D/K 6.5 /6.2578125 D/K1

6.5/6.7421875 D/K2

6.5/5.85 D/K-NICAM

M M-Korea

Satellite Satellite

4.5

4.5/4.724212

6.5

7.02/7.2

Sound Modulation

FM-Stereo

FM-Mono/NICAM

FM-Mono FM-Stereo

Color System Country

SECAM-East USSR

Hungary

NTSC USA

Korea

PAL PAL

Europe (ASTRA) Europe (ASTRA)

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Roll-off fact

FM analog and modulated

Table 3–2: Summary of NICAM 728 sound coding characteristics

Characteristics Values

Audio sampling frequency 32 kHz

Number of channels 2

Initial resolution 14 bit/sample

Companding characteristics near instantaneous, with compression to 10 bits/sample in 32-sam-

ples (1 ms) blocks

Coding for compressed samples 2’s complement

Preemphasis CCITT Recommendation J.17 (6.5 dB attenuation at 800 Hz)

Audio overload level +12 dBm measured at the unity gain frequency of the preemphasis

network (2 kHz)

PRELIMINARY DATA SHEET

Table 3–3: Summary of NICAM 728 sound modulation parameters

Specification I B/G L D/K

Carrier frequency of digital sound

Transmission rate 728 kBit/s

Type of modulation Differentially encoded quadrature phase shift keying (DQPSK)

Spectrum shaping

Carrier frequency of analog sound componen

Power ratio between vision carrier and analog sound carrier

Power ratio between

digital sound carrier

6.552 MHz 5.85 MHz 5.85 MHz 5.85 MHz

by means of Roll-off filters

1.0 0.4 0.4 0.4

6.0 MHz mono

10 dB 13 dB 10 dB 16 dB 13 dB

10 dB 7 dB 17 dB 11 dB Hungary Poland

5.5 MHz mono

6.5 MHz AM mono 6.5 MHz

terrestrial

cable

12 dB 7 dB

mono

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MSP 34x5D

Table 3–4: Key parameters for B/G, D/K, and M 2-carrier sound system

Sound Carriers Carrier FM1 Carrier FM2

B/G D/K M B/G D/K M

Vision/sound power difference 13 dB 20 dB

Sound bandwidth 40 Hz to 15 kHz Pre-emphasis 50 µs 75 µs 50 µs 75 µs Frequency deviation ±50 kHz ±25 kHz ±50 kHz ±25 kHz

Sound Signal Components

Mono transmission mono mono

Stereo transmission (L+R)/2 (L+R)/2 R (L–R)/2

Dual sound transmission language A language B

Identification of Transmission Mode on Carrier FM2

Pilot carrier frequency in kHz 54.6875 55.0699

Type of modulation AM

Modulation depth 50%

Modulation frequency mono: unmodulated

Tuner

33 34 39 MHz 5 9 MHz

SAW Filter Sound IF Filter

Sound IF Mixer

Vision Demodulator

Mono

stereo: 117.5 Hz dual: 274.1 Hz

According to the mixing characteristics of the Sound-IF mixer, the Sound-IF filter may be omitted.

MSP 34x5D

149.9 Hz

276.0 Hz

Loudspeaker

Composite Video

SCART Inputs

Fig. 3–1: Typical MSP 34x5D application

SCART1

SCART2

I2S1

Dolby Pro Logic Processor DPLA

Digital Signal Source

I2S2

SCART1

SCART Output

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4. Architecture of the MSP 34x5D

Fig. 4–1 shows a simplified block diagram of the IC. Its architecture is split into three main functional blocks:

1. demodulator and NICAM decoder section

2. digital signal processing (DSP) section performing audio baseband processing

3. analog section containing two A/D-converters, four D/A-converters, and SCART switching facilities.

4.1. Demodulator and NICAM Decoder Section

4.1.1. Analog Sound IF – Input Section

The input pins ANA_IN1+ and ANA_IN– offer the possibility to connect sound IF (SIF) sources to the MSP 34x5D. The analog-to-digital conversion of the preselected sound IF signal is done by an A/D-converter, whose output can be used to control an analog automatic gain circuit (AGC), providing an optimal level for a wide range of input levels. It is possible to switch between automatic gain control and a fixed (setable) input gain. In the optimal case, the input range of the A/D converter is completely covered by the sound IF source. Some combinations of SAW filters and sound IF mixer ICs, however, show large picture components on their outputs. In this case, filtering is recommended. It was found, that the high pass filters formed by the coupling capacitors at pin ANA_IN1+ (as shown in the application diagram) are sufficient in most cases.

Sound IF

ANA_IN1+

Mono

MONO_IN

SC1_IN_L

SCART1

SC1_IN_R

SC2_IN_L

SCART2

SC2_IN_R

Demodulator

and NICAM

Decoder

A/D

S_DA_IN1

S_DA_OUT

I2S_DA_IN2

I2S Interface

I2S1/2L/R I2S_L/R

FM1/AM

FM2

NICAM A

NICAM B

IDENT

DSP

SCART L

SCART R

I2S_CL

LOUDSPEAKER L

LOUDSPEAKER R

SCART1_L

SCART1_R

S_WS

XTAL_IN

D/A

XTAL_OUT

Audio PLL

D_CTR_OUT0/1

DACM_L

Loudspeaker

DACM_R

SC1_OUT_L

SCART

SC1_OUT_R

SCART Switching Facilities

Fig. 4–1: Architecture of the MSP 34x5D

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MSP 34x5D

4.1.2. Quadrature Mixers

The digital input coming from the integrated A/D converter may contain audio information at a frequency range of theoretically 0 to 9 MHz corresponding to the selected standards. By means of two programmable quadrature mixers, two different audio sources; for example, NICAM and FM-mono, may be shifted into baseband position. In the following, the two main channels are provided to process either:

– NICAM (MSP-Ch1) and FM/AM mono (MSP-Ch2) si-

multaneously or, alternatively,

– FM2 (MSP-Ch1) and FM1 (MSP-Ch2).

NICAM is not possible with MSP 3405D.

Two programmable registers, to be divided up into low and high part, determine frequency of the oscillator, which corresponds to the frequency of the desired audio carrier. In section 6.2., format and values of the registers are listed.

4.1.3. Low-pass Filtering Block for Mixed Sound IF Signals

Data shaping and/or FM bandwidth limitation is performed by a linear phase Finite Impulse Response (FIRfilter). Just like the oscillators’ frequency, the filter coefficients are programmable and are written into the IC by the CCU via the control bus. Thus, for example, different NICAM versions can easily be implemented. Two not necessarily different sets of coefficients are required, one for MSP-Ch1 (NICAM or FM2) and one for MSPCh2 (FM1 = FM-mono). In section 6.5.3., several coefficient sets are proposed.

VREFTOP

ANA_IN1+

ANA_IN-

FRAME NICAMA

DCO2

AD_CV[7:1]

AGC AD

Pins

Internal signal lines (see fig. 4–5)

Demodulator Write Registers

DCO1

Oscillator

FIR1

Mixer Lowpass

MSP sound IF channel 1 (MSP-Ch1: FM2, NICAM)

MSP sound IF channel 2 (MSP-Ch2: FM1, AM)

Mixer Lowpass

FIR2

Oscillator

DCO2

Phase and AM Discrimination

Amplitude

Phase and AM Discrimination

MODE_REG[6]

Phase

Amplitude

Differentiator

Phase

DQPSK Decoder

Differentiator

Carrier Detect

AD_CV[9]

Carrier Detect

MODE_REG[8]

MSP 3415D only

NICAM Decoder

LowpassMute

NICAMA

NICAMB

FM2

Mixer IDENT

FM1/AM

Fig. 4–2: Demodulator architecture of MSP 34x5D

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4.1.4. Phase and AM Discrimination

The filtered sound IF signals are demodulated by means of the phase and amplitude discriminator block. On the output, the phase and amplitude is available for further processing. AM signals are derived from the amplitude information, whereas the phase information serves for FM and NICAM (DQPSK) demodulation.

4.1.5. Differentiators

FM demodulation is completed by differentiating the phase information output.

4.1.6. Low-pass Filter Block for Demodulated Signals

The demodulated FM and AM signals are further lowpass filtered and decimated to a final sampling frequency of 32 kHz. The usable bandwidth of the final baseband signals is about 15 kHz.

4.1.7. High Deviation FM Mode

4.1.8. FM-Carrier-Mute Function in the Dual Carrier FM Mode

To prevent noise effects or FM identification problems in the absence of one of the two FM carriers, the MSP 3415 D offers a carrier detection feature, which must be activated by means of AD_CV[9]. If no FM carrier is available at the MSPD channel 1, the corresponding channel FM2 is muted. If no FM carrier is available at the MSPD channel 2, the corresponding channel FM1 is muted.

4.1.9. DQPSK-Decoder (MSP 3415D only)

In case of NICAM-mode, the phase samples are decoded according the DQPSK-coding scheme. The output of this block contains the original NICAM-bitstream.

4.1.10. NICAM-Decoder (MSP 3415D only)

Before any NICAM decoding can start, the MSP must lock to the NICAM frame structure by searching and synchronizing to the so-called Frame Alignment Words (FAW).

By means of MODE_REG [9], the maximum FM-deviation can be extended to approximately ±360 kHz. Since this mode can be applied only for the MSP sound IF channel 2, the corresponding matrices in the baseband processing must be set to sound A. Apart from this, the coefficient sets 380 kHz FIR2 or 500 kHz FIR2 must be chosen for the FIR2. In relation to the normal FM-mode, the audio level of the high-deviation mode is reduced by 6 dB. The FM-prescaler should be adjusted accordingly. In high deviation FM-mode, neither FM-stereo nor FMidentification nor NICAM processing is possible simultaneously.

To reconstruct the original digital sound samples, the NICAM-bitstream has to be descrambled, deinterleaved, and rescaled. Also, bit error detection and correction (concealment) is performed in this NICAM specific block.

To facilitate the Central Control Unit CCU to switch the TV-set to the actual sound mode, control information on the NICAM mode and bit error rate are supplied by the the NICAM-Decoder. It can be read out via the I

An automatic switching facility (AUTO_FM) between NICAM and FM/AM reduces the amount of CCU-instructions in case of bad NICAM reception.

C-Bus.

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MSP 34x5D

4.2. Analog Section

4.2.1. SCART Switching Facilities

The analog input and output sections include full matrix switching facilities, which are shown in Fig. 4–3.

The switches are controlled by the ACB bits defined in the audio processing interface (see section 7. Programming the DSP Section).

SCART_IN

SC1_IN_L/R

SC2_IN_L/R

MONO_IN

intern. signal lines

pins

ACB[5,9,8]

ACB[6,11,10]

to Audio Baseband Processing (DSP_IN)

SCARTL/R

SCART_OUT

4.3. DSP-Section (Audio Baseband Processing)

All audio baseband functions are performed by digital signal processing (DSP). The DSP functions are grouped into three processing parts: input preprocessing, channel source selection, and channel postprocessing (see Fig. 4–5 and section 7.).

The input preprocessing is intended to prepare the various signals of all input sources in order to form a standardized signal at the input to the channel selector. The signals can be adjusted in volume, are processed with the appropriate deemphasis, and are dematrixed if necessary.

Having prepared the signals that way, the channel selector makes it possible to distribute all possible source signals to the desired output channels.

All input and output signals can be processed simultaneously with the exception that FM2 cannot be processed at the same time as NICAM. FM-identification and adaptive deemphasis are not possible simultaneously (if adaptive deemphasis is active, the ID-level in stereo detection register is not valid).

from Audio Baseband Processing (DSP_OUT)

SCART1_L/R

SC1_OUT_L/R

Fig. 4–3: SCART switching facilities (see 7.3.18.) Switching positions show the default configuration after power-on reset. Note: SCART_OUT is undefined after RESET!

4.2.2. Stand-by Mode

If the MSP 34x5D is switched off by first pulling STANDBYQ low, and then disconnecting the 5 V, but keeping the 8 V power supply (‘Stand-by’-mode), the switches S1 and S2 (see Fig. 4–3) maintain their position and function. This facilitates the copying from selected SCART-inputs to SCART-outputs in the TV-set’s standby mode.

In case of power-on start or starting from stand-by, the IC switches automatically to the default configuration, shown in Fig. 4–3. This action takes place after the first

C transmission into the DSP part. By transmitting the ACB register first, the individual default setting mode of the TV set can be defined.

4.3.1. Dual Carrier FM Stereo/Bilingual Detection

For the terrestrial dual FM carrier systems, audio information can be transmitted in three modes: mono, stereo, or bilingual. To obtain information about the current audio operation mode, the MSP 34x5D detects the socalled identification signal. Information is supplied via the Stereo Detection Register to an external CCU.

IDENT

Demodu-

lation

Stereo

Detection

Filter

Bilingual Detection

Filter

Level

Detect

Level

Detect

Stereo

Detection

–

Fig. 4–4: Stereo/bilingual detection

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MSP 34x5D

PRELIMINARY DATA SHEET

Analog Inputs

Demodulated IF Inputs

S Bus

puts

SCARTL

SCARTR

FM1/AM

FM2

NICAMA

NICAMB

I2S1L

S1R

S2L

S2R

DC level readout FM1

Deemphasis

50/75 µs

DC level readout FM2

Deemphasis

J17

MSP 3415D only

SCART

Prescale

FM /AM

Prescale

NICAM

Prescale

I2S1

Prescale

FM-Matrix

Loudspeaker

Channel

Matrix

SCART1 Channel

Matrix

Channel Souce Select

Quasi-Peak

Detector

Channel

Matrix

Fig. 4–5: Audio Baseband Processing (DSP-Firmware)

Bass

AVC

Treble

Quasi peak readout L

Quasi peak readout R

I2S

Loudness

Beeper

NICAMA

Volume

Balance

Volume

Internal signal lines (see Fig. 4–2 and Fig. 4–3)

Loudspeaker L

Loudspeaker R

SCART1_L

SCART1_R

I2SR

Loudspeaker Outputs

SCART Output

Outputs

Table 4–1: Some examples for recommended channel assignments for demodulator and audio processing part

Mode MSP Sound IF-

Channel 1

B/G-Stereo FM2 (5.74 MHz): R FM1 (5.5 MHz): (L+R)/2 B/G Stereo Speakers: FM Stereo

B/G-Bilingual FM2 (5.74 MHz): Sound B FM1 (5.5 MHz): Sound A No Matrix Speakers: FM Speakers: Sound A

NICAM-I-ST/

NICAM (6.552 MHz) FM (6.0 MHz): mono No Matrix Speakers: NICAM Speakers: Stereo

FM-mono

Sat-Mono not used FM (6.5 MHz): mono No Matrix Speakers: FM Sound A

Sat-Stereo 7.2 MHz: R 7.02 MHz: L No Matrix Speakers: FM Stereo

Sat-Bilingual 7.38 MHz: Sound C 7.02 MHz: Sound A No Matrix Speakers: FM Speakers: Sound A

Sat-High Dev.

don’t care 6.552 MHz No Matrix Speakers: FM Speakers: Sound A

Mode

4.4. Audio PLL and Crystal Specifications

MSP Sound IFChannel 2

FMMatrix

ChannelSelect

Channel Matrix

H. Phone: Sound B

H. Phone: Sound A

H. Phone: Sound B=C

H. Phone: Sound A

sult, the whole audio system is supplied with a controlled 18.432 MHz clock.

The MSP 34x5D requires a 18.432 MHz (12 pF, parallel) crystal. The clock supply of the whole system depends on the MSP 34x5D operation mode:

1. FM-Stereo, FM-Mono:

Remark on using the crystal:

External capacitors at each crystal pin to ground are required (see General Crystal Recommendations on page

60).

The system clock runs free on the crystal’s 18.432 MHz.

4.5. Digital Control Output Pins

2. NICAM: An integrated clock PLL uses the 364 kHz baud-rate, accomplished in the NICAM demodulator block, to lock the system clock to the bit rate, respectively, 32 kHz sampling rate of the NICAM transmitter. As a re-

The static level of two output pins of the MSP 34x5D (D_CTR_OUT0/1) is switchable between HIGH and LOW by means of the I

C-bus. This enables the controlling of external hardware controlled switches or other devices via I

C-bus (see section 7.3.18.).

14 Micronas

PRELIMINARY DATA SHEET

MSP 34x5D

4.6. I2S Bus Interface

By means of this standardized interface, additional feature processors can be connected to the MSP 34x0D. Two possible formats are supported: The standard mode (MODE_REG[4]=0) selects the SONY format, where the I2S_WS signal changes at the word boundaries. The PHILIPS format, which is characterized by a change of the I2S_WS signal one I2S_CL period before the word boundaries, is selected by setting MODE_REG[4]=1.

The MSP 34x5D normally serves as the master on the I2S interface. Here, the clock and word strobe lines are driven by the MSP. By setting MODE_REG[3]=1, the MSP 34x5D is switched to a slave mode. Now, these lines are input to the MSP and the master clock is synchronized to 576 times the I2S_WS rate (32 kHz). NICAM operation is not possible in this mode.

The I2S bus interface consists of five pins:

1. I2S_DA_IN1, I2S_DA_IN2: For input, four channels (two channels per line, 2*16 bits) per sampling cycle (32 kHz) are transmitted.

2. I2S_DA_OUT: For output, two channels (2*16 bits) per sampling cycle (32 kHz) are transmitted.

3. I2S_CL: Gives the timing for the transmission of I2S serial data (1.024 MHz).

4. I2S_WS: The I2S_WS word strobe line defines the left and right sample.

A precise I2S timing diagram is shown in Fig. 4–6.

(Data: MSB first)

1/F

I2S_WS

SONY Mode SONY Mode

PHILIPS Mode

I2S_CL

I2S_DAIN

I2S_DAOUT

R LSB L MSB

Detail C Detail A,B

I2S_CL

I2S_WS as INPUT

PHILIPS/SONY Mode programmable by MODE_REG[4]

Detail A

16 bit left channel

Detail B

16 bit left channel 16 bit right channel

1/F

I2SCL

I2SWS1

I2S5

I2SWS2

I2S6

I2SWS

PHILIPS Mode

Detail C

L LSB R MSB

I2S_CL

I2S_DA_IN

16 bit right channel

I2S1

I2S3

R LSB L LSB

I2S2

I2S4

I2S_WS as OUTPUT

Fig. 4–6: I2S bus timing diagram

I2S_DA_OUT

15Micronas

MSP 34x5D

PRELIMINARY DATA SHEET

5. I2C Bus Interface: Device and Subaddresses

As a slave receiver, the MSP 34x5D can be controlled

via I

C bus. Access to internal memory locations is achieved by subaddressing. The demodulator and the DSP processor parts have two separate subaddressing register banks.

In order to allow for more MSP 34x5D ICs to be connected to the control bus, an ADR_SEL pin has been implemented. With ADR_SEL pulled to high, low, or left open, the MSP 34x5D responds to changed device addresses. Thus, three identical devices can be selected.

By means of the RESET bit in the CONTROL register, all devices with the same device address are reset.

The IC is selected by asserting a special device address in the address part of an I dress pair is defined as a write address (80, 84, or 88 and a read address (81, 85, or 89

C transmission. A device ad-

) (see Table 5–1).

hex

Writing is done by sending the device write address, followed by the subaddress byte, two address bytes, and two data bytes. Reading is done by sending the device write address, followed by the subaddress byte and two address bytes. Without sending a stop condition, reading of the addressed data is completed by sending the device read address (81, 85, or 89 bytes of data (see Fig. 5–1: “I

C Bus Protocol” and sec-

tion 5.2. “Proposal for MSP 34x5D I

) and reading two

hex

C Telegrams”).

Due to the internal architecture of the MSP 34x5D the IC cannot react immediately to an I

C request. The typical response time is about 0.3 ms for the DSP processor part and 1 ms for the demodulator part if NICAM processing is active. If the receiver (MSP) can’t receive another complete byte of data until it has performed some other function; for example, servicing an internal interrupt, it can hold the clock line I

C_CL LOW to force the transmitter into a wait state. The positions within a transmission where this may happen are indicated by ’Wait’ in section 5.1. The maximum Wait-period of the MSP during normal operation mode is less than 1 ms.

C bus error caused by MSP hardware problems: In case of any internal error, the MSPs wait-period is extended to 1.8 ms. Afterwards, the MSP does not acknowledge (NAK) the device address. The data line will be left HIGH by the MSP and the clock line will be released. The master can then generate a STOP condition

)

to abort the transfer.

By means of NAK, the master is able to recognize the error state and to reset the IC via I

C bus. While transmitting the reset protocol (see section 5.2.4. on page 18) to ‘CONTROL’, the master must ignore the not acknowledge bits (NAK) of the MSP.

A general timing diagram of the I

C bus is shown in

Fig. 5–2 on page 18.

Table 5–1: I

C Bus Device Addresses

ADR_SEL Low High Left Open

Mode Write Read Write Read Write Read

MSP device address 80

hex

Table 5–2: I2C Bus Subaddresses

Name Binary Value Hex Value Mode Function

CONTROL 0000 0000 00 W software reset

TEST 0000 0001 01 W only for internal use

WR_DEM 0001 0000 10 W write address demodulator

RD_DEM 0001 0001 11 W read address demodulator

WR_DSP 0001 0010 12 W write address DSP

hex

RD_DSP 0001 0011 13 W read address DSP

16 Micronas

PRELIMINARY DATA SHEET

MSP 34x5D

Table 5–3: Control Register (Subaddress: 00

hex

)

Name Subaddress MSB 14 13..1 LSB

CONTROL 00 hex 1 : RESET

0 0 0

0 : normal

5.1. Protocol Description

Write to DSP or Demodulator

S write

device

address

Wait ACK sub-addr ACK addr-byte

high

ACK addr-byte low ACK data-byte high ACK data-byte low ACK P

Read from DSP or Demodulator

S write

device

address

Wait ACK sub-addr ACK addr-byte

high

ACK addr-byte

low

ACK S read

device

address

Wait ACK data-byte

high

ACK data-byte

Write to Control or Test Registers

S write

device

address

Wait ACK sub-addr ACK data-byte high ACK data-byte low ACK P

Note: S = I2C-Bus Start Condition from master

P = I

C-Bus Stop Condition from master

ACK = Acknowledge-Bit: LOW on I2C_DA from slave (= MSP, gray)

or master (=CCU, hatched)

NAK = Not Acknowledge-Bit: HIGH on I2C_DA from master (= CCU, hatched) to indicate ‘End of Read’

or from MSP indicating internal error state

Wait = I

C-Clock line held low by the slave (=MSP) while interrupt is serviced (<1.8 ms)

low

NAK P

I2C_DA

C_CL

Fig. 5–1: I

C bus protocol

(MSB first; data must be stable while clock is high)

17Micronas

MSP 34x5D

I2C_CL

I2C4

1/f

I2C

PRELIMINARY DATA SHEET

I2C3

I2C1

I2C_DA as input

I2C_DA as output

Fig. 5–2: I2C bus timing diagram

5.2. Proposal for MSP 34x5D I

5.2.1. Symbols

daw write device address dar read device address < Start Condition > Stop Condition aa Address Byte dd Data Byte

I2C5

C Telegrams

Data: MSB first

I2COL2

I2C6

I2COL1

I2C2

5.2.2. Write Telegrams

<daw 00 d0 00> write to CONTROL register <daw 10 aa aa dd dd> write data into demodulator <daw 12 aa aa dd dd> write data into DSP

5.2.3. Read Telegrams

<daw 11 aa aa <dar dd dd> read data from demodulator <daw 13 aa aa <dar dd dd> read data from DSP

5.2.4. Examples

<80 00 80 00> RESET MSP statically <80 00 00 00> clear RESET <80 12 00 08 01 20> set loudspeaker channel source

to NICAM and Matrix to STEREO

18 Micronas

PRELIMINARY DATA SHEET

5.3. Start-Up Sequence: Power-Up and I2C-Controlling

After power-on or RESET (see Fig. 5–3), the IC is in an inactive state. The CCU has to transmit the required coefficient set for a given operation via the I

C bus. Initialization should start with the demodulator part. If required for any reason, the audio processing part can be loaded before the demodulator part.

DVSUP AVSUP

4.5 V

MSP 34x5D

RESETQ

0.7×DVSUP

0.45...0.55×DVSUP

Internal Reset

t/ms

Low-to-High Threshold

High-to-Low Threshold

t/ms

Reset Delay >2 ms

High

Low

Power-up reset: threshold and timing Note: 0.7×DVSUP means 3.5 Volt with DVSUP = 5.0 Volt

Fig. 5–3: Power-up sequence

t/ms

Note: The reset should not reach high level before the oscillator has started. This requires a reset delay of >2 ms

19Micronas

MSP 34x5D

6. Programming the Demodulator Section

6.1. Short-Programming and General Programming of the Demodulator Part

The Demodulator Part of the MSP 34x5D can be programmed in two different modes:

PRELIMINARY DATA SHEET

1. Demodulator Short-Programming facilitates a comfortable way to set up the demodulator for many terrestrial TV-sound standards with one single I transmission. The coding is listed in section 6.4.1.. If a parameter doesn’t coincide with the individual programming concept, it simply can be overwritten by using the General Programming mode. Some bits of the registers AD_CV (see section 6.5.1. ) and MODE_REG (see section 6.5.2. ) are not affected by the short-programming. They must be transmitted once if their reset status does not fit. The Demodulator Short-Programming is not compatible to MSP 3410B and MSP 3400C.

Autodetection for terrestrial TV standards (as part of the below Demodulator Short-Programming) provides the most comfortable way to set up the MSPD-demodulator. This feature facilitates within 0.5 s the detection and set-up of the actual TV-sound standard. Since the detected standard is readable by the control processor, the autodetection feature is mainly recommended for the primary set-up of a TV-set: after having determined once the corresponding TV-channels, their sound standards can be stored and later on programmed by the Demodulator Short-Programming (see sections 6.4.1. and

6.6.1.).

C-Bus

2. General Programming ensures the software compatibility to other MSPs. It offers a very flexible way to apply all of the MSP 34x5D demodulator facilities. All registers except 0020 corresponding to the individual requirements. For satellite applications, with their many variations, this mode must be selected.

All transmissions on the control bus are 16 bits wide. However, data for the demodulator part have only 8 or 12 significant bits. These data have to be inserted LSBbound and filled with zero bits into the 16-bit transmission word. Table 4–1 explains how to assign FM carriers to the MSP-Sound IF channels and the corresponding matrix modes in the audio processing part.

have to be written with values

hex

20 Micronas

PRELIMINARY DATA SHEET

6.2. Demodulator Write Registers: Table and Addresses

MSP 34x5D

Table 6–1: Demodulator Write Registers; Subaddress: 10

Demodulator Write Registers

Demodulator ShortProgramming

AUTO_FM/AM 0021 Only for NICAM (MSP 3415D): Automatic switching between NICAM and

Write Registers necessary for General Programming Mode only

AD_CV 00BB input selection, configuration of AGC, Mute Function and selection of

MODE_REG 0083 mode register

FIR1 FIR2

DCO1_LO DCO1_HI

DCO2_LO DCO2_HI

Address (hex)

0020 Write into this register to apply Demodulator Short Programming (see

0001 0005

0093 009B

00A3 00AB

Function

section 6.4.1.). If the internal setting coincidences with the individual requirements no more of the remaining Demodulator Write Registers have to be transferred.

FM/AM in case of bad NICAM reception (see section 6.4.2.)

A/D-converter, FM-Carrier-Mute on/off

filter coefficients channel 1 (6 ⋅ 8 bit) filter coefficients channel 2 (6 ⋅ 8 bit), + 3 ⋅ 8 bit offset (total 72 bit)

increment channel 1 Low Part increment channel 1 High Part

increment channel 2 Low Part increment channel 2 High Part

; these registers are not readable!

hex

PLL_CAPS 001F switchable PLL capacitors to tune open-loop frequency; to use only if

NICAM of MODE_REG = 0 normally not of interest for the customer

6.3. Demodulator Read Registers: Table and Addresses

Table 6–2: Demodulator Read Registers; Subaddress: 11

Demodulator Read Registers

Result of Autodetection

C_AD_BITS 0023 NICAM-Sync bit, NICAM-C-Bits, and three LSBs of additional data bits

ADD_BITS 0038 NICAM: bit [10:3] of additional data bits

CIB_BITS 003E NICAM: CIB1 and CIB2 control bits

ERROR_RATE 0057 NICAM error rate, updated with 182 ms

CONC_CT 0058 only to be used in MSPB compatibility mode

Address (hex)

007E see Table 6–13

Function

; these registers are not writeable!

hex

FAWCT_IST 0025 only to be used in MSPB compatibility mode

PLL_CAPS 021F Not for customer use.

AGC_GAIN 021E Not for customer use.

Note: All NICAM relevant registers are “0” for MSP 3405D.

21Micronas

MSP 34x5D

Reset, then

B/G

Terrestrial TV

PRELIMINARY DATA SHEET

6.4. Demodulator Write Registers for Short-Programming: Functions and Values

In the following, the functions of some registers are explained and their (default) values are defined:

6.4.1. Demodulator Short-Programming

Table 6–3: MSP 34x5D Demodulator Short-Programming

Demodulator Short-Programming 0020

hex

TV-Sound Standard Internal Setting

Description Code

(hex)

AD_CV

(see Table 6–5)

MODE_

REG

(see Table 6–8)

DCO1 (MHz)

DCO2 (MHz)

FIR1/2 Coefficients

Identification Mode

Autodetection 0001 Detects and sets one of the standards listed below, if available. Results are to be

read out of the demodulator read register ”Result of Autodetection” (Section 6.6.1.)

M Dual-FM 0002 AD_CV-FM M1 4.72421 4.5 Reset, then

Standard M

B/G Dual-FM 0003 AD_CV-FM M1 5.74218 5.5

D/K1 Dual-FM 0004 AD_CV-FM M1 6.25781 6.5

see Table 6–11: Terrestrial TVStandards

Standard

D/K2 Dual-FM 0005 AD_CV-FM M1 6.74218 6.5

0006/ 0007

reserved for future Dual FM Standards AUTO_

FM/AM

NICAM-Modes for MSP 3415D only; MSP 3405D responds with FM/AM Mono

B/G-NICAM-FM 0008 AD_CV-FM M2 5.85 5.5

L-NICAM-AM 0009 AD_CV-AM M3 5.85 6.5

see Table 6–11:

I-NICAM-FM 000A AD_CV-FM M2 6.552 6.0

Standards

D/K-NICAM-FM 000B AD_CV-FM M2 5.85 6.5

>000B reserved for future NICAM Standards

corresponds to the actual setting of AUTO_FM (Address = 0021

Bits of AD_CV or MODE_REG, which are not affected by the short-programming, must be transmitted sepa-

hex

)

rately if their reset status does not fit.

Note: All parameters in the DSP section (Audio Baseband Processing), except the identification mode register, are not affected by the Demodulator Short-Programming . They still have to be defined by the control processor.

22 Micronas

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Micronas Intermetall MSP3405D, MSP3415D Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual